From 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 22 Oct 2024 10:36:11 +0000
Subject: [PATCH] 修改4g拨号为QMI,需要在系统里后台执行quectel-CM
---
kernel/drivers/memory/mvebu-devbus.c | 41 +++++++++++++----------------------------
1 files changed, 13 insertions(+), 28 deletions(-)
diff --git a/kernel/drivers/memory/mvebu-devbus.c b/kernel/drivers/memory/mvebu-devbus.c
index 9818608..efc6c08 100644
--- a/kernel/drivers/memory/mvebu-devbus.c
+++ b/kernel/drivers/memory/mvebu-devbus.c
@@ -1,21 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Marvell EBU SoC Device Bus Controller
* (memory controller for NOR/NAND/SRAM/FPGA devices)
*
* Copyright (C) 2013-2014 Marvell
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
*/
#include <linux/kernel.h>
@@ -136,32 +124,32 @@
* The bus width is encoded into the register as 0 for 8 bits,
* and 1 for 16 bits, so we do the necessary conversion here.
*/
- if (r->bus_width == 8)
+ if (r->bus_width == 8) {
r->bus_width = 0;
- else if (r->bus_width == 16)
+ } else if (r->bus_width == 16) {
r->bus_width = 1;
- else {
+ } else {
dev_err(devbus->dev, "invalid bus width %d\n", r->bus_width);
return -EINVAL;
}
err = get_timing_param_ps(devbus, node, "devbus,badr-skew-ps",
- &r->badr_skew);
+ &r->badr_skew);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,turn-off-ps",
- &r->turn_off);
+ &r->turn_off);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,acc-first-ps",
- &r->acc_first);
+ &r->acc_first);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,acc-next-ps",
- &r->acc_next);
+ &r->acc_next);
if (err < 0)
return err;
@@ -187,17 +175,17 @@
}
err = get_timing_param_ps(devbus, node, "devbus,ale-wr-ps",
- &w->ale_wr);
+ &w->ale_wr);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,wr-low-ps",
- &w->wr_low);
+ &w->wr_low);
if (err < 0)
return err;
err = get_timing_param_ps(devbus, node, "devbus,wr-high-ps",
- &w->wr_high);
+ &w->wr_high);
if (err < 0)
return err;
@@ -279,7 +267,6 @@
struct devbus_read_params r;
struct devbus_write_params w;
struct devbus *devbus;
- struct resource *res;
struct clk *clk;
unsigned long rate;
int err;
@@ -289,15 +276,13 @@
return -ENOMEM;
devbus->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- devbus->base = devm_ioremap_resource(&pdev->dev, res);
+ devbus->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(devbus->base))
return PTR_ERR(devbus->base);
- clk = devm_clk_get(&pdev->dev, NULL);
+ clk = devm_clk_get_enabled(&pdev->dev, NULL);
if (IS_ERR(clk))
return PTR_ERR(clk);
- clk_prepare_enable(clk);
/*
* Obtain clock period in picoseconds,
--
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