From 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 22 Oct 2024 10:36:11 +0000
Subject: [PATCH] 修改4g拨号为QMI,需要在系统里后台执行quectel-CM
---
kernel/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h | 103 ++++++++++++++++++++++++++++++++++++++++++++-------
1 files changed, 88 insertions(+), 15 deletions(-)
diff --git a/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
index af700c7..0844321 100644
--- a/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
+++ b/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
@@ -59,6 +59,8 @@
struct drr_params {
uint32_t vertical_total_min;
uint32_t vertical_total_max;
+ uint32_t vertical_total_mid;
+ uint32_t vertical_total_mid_frame_num;
bool immediate_flip;
};
@@ -68,14 +70,6 @@
enum crtc_state {
CRTC_STATE_VBLANK = 0,
CRTC_STATE_VACTIVE
-};
-
-struct _dlg_otg_param {
- int vstartup_start;
- int vupdate_offset;
- int vupdate_width;
- int vready_offset;
- enum signal_type signal;
};
struct vupdate_keepout_params {
@@ -104,6 +98,21 @@
INTERSECT_WINDOW_NOT_A_NOT_B,
};
+#ifdef CONFIG_DRM_AMD_DC_DCN3_0
+enum otg_out_mux_dest {
+ OUT_MUX_DIO = 0,
+};
+#endif
+
+enum h_timing_div_mode {
+ H_TIMING_NO_DIV,
+ H_TIMING_DIV_BY2,
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+ H_TIMING_RESERVED,
+ H_TIMING_DIV_BY4,
+#endif
+};
+
struct crc_params {
/* Regions used to calculate CRC*/
uint16_t windowa_x_start;
@@ -118,6 +127,9 @@
enum crc_selection selection;
+ uint8_t dsc_mode;
+ uint8_t odm_mode;
+
bool continuous_mode;
bool enable;
};
@@ -126,7 +138,6 @@
const struct timing_generator_funcs *funcs;
struct dc_bios *bp;
struct dc_context *ctx;
- struct _dlg_otg_param dlg_otg_param;
int inst;
};
@@ -134,15 +145,30 @@
struct drr_params;
+
struct timing_generator_funcs {
bool (*validate_timing)(struct timing_generator *tg,
const struct dc_crtc_timing *timing);
void (*program_timing)(struct timing_generator *tg,
const struct dc_crtc_timing *timing,
- bool use_vbios);
- void (*program_vline_interrupt)(struct timing_generator *optc,
- const struct dc_crtc_timing *dc_crtc_timing,
- unsigned long long vsync_delta);
+ int vready_offset,
+ int vstartup_start,
+ int vupdate_offset,
+ int vupdate_width,
+ const enum signal_type signal,
+ bool use_vbios
+ );
+ void (*setup_vertical_interrupt0)(
+ struct timing_generator *optc,
+ uint32_t start_line,
+ uint32_t end_line);
+ void (*setup_vertical_interrupt1)(
+ struct timing_generator *optc,
+ uint32_t start_line);
+ void (*setup_vertical_interrupt2)(
+ struct timing_generator *optc,
+ uint32_t start_line);
+
bool (*enable_crtc)(struct timing_generator *tg);
bool (*disable_crtc)(struct timing_generator *tg);
bool (*is_counter_moving)(struct timing_generator *tg);
@@ -159,6 +185,8 @@
bool (*get_otg_active_size)(struct timing_generator *optc,
uint32_t *otg_active_width,
uint32_t *otg_active_height);
+ bool (*is_matching_timing)(struct timing_generator *tg,
+ const struct dc_crtc_timing *otg_timing);
void (*set_early_control)(struct timing_generator *tg,
uint32_t early_cntl);
void (*wait_for_state)(struct timing_generator *tg,
@@ -178,6 +206,10 @@
const struct dcp_gsl_params *gsl_params);
void (*unlock)(struct timing_generator *tg);
void (*lock)(struct timing_generator *tg);
+ void (*lock_doublebuffer_disable)(struct timing_generator *tg);
+ void (*lock_doublebuffer_enable)(struct timing_generator *tg);
+ void(*triplebuffer_unlock)(struct timing_generator *tg);
+ void(*triplebuffer_lock)(struct timing_generator *tg);
void (*enable_reset_trigger)(struct timing_generator *tg,
int source_tg_inst);
void (*enable_crtc_reset)(struct timing_generator *tg,
@@ -189,7 +221,8 @@
bool enable, const struct dc_crtc_timing *timing);
void (*set_drr)(struct timing_generator *tg, const struct drr_params *params);
void (*set_static_screen_control)(struct timing_generator *tg,
- uint32_t value);
+ uint32_t event_triggers,
+ uint32_t num_frames);
void (*set_test_pattern)(
struct timing_generator *tg,
enum controller_dp_test_pattern test_pattern,
@@ -197,7 +230,11 @@
bool (*arm_vert_intr)(struct timing_generator *tg, uint8_t width);
- void (*program_global_sync)(struct timing_generator *tg);
+ void (*program_global_sync)(struct timing_generator *tg,
+ int vready_offset,
+ int vstartup_start,
+ int vupdate_offset,
+ int vupdate_width);
void (*enable_optc_clock)(struct timing_generator *tg, bool enable);
void (*program_stereo)(struct timing_generator *tg,
const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags);
@@ -209,6 +246,14 @@
bool (*is_tg_enabled)(struct timing_generator *tg);
bool (*is_optc_underflow_occurred)(struct timing_generator *tg);
void (*clear_optc_underflow)(struct timing_generator *tg);
+
+ void (*set_dwb_source)(struct timing_generator *optc,
+ uint32_t dwb_pipe_inst);
+
+ void (*get_optc_source)(struct timing_generator *optc,
+ uint32_t *num_of_input_segments,
+ uint32_t *seg0_src_sel,
+ uint32_t *seg1_src_sel);
/**
* Configure CRCs for the given timing generator. Return false if TG is
@@ -224,6 +269,34 @@
bool (*get_crc)(struct timing_generator *tg,
uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb);
+ void (*program_manual_trigger)(struct timing_generator *optc);
+ void (*setup_manual_trigger)(struct timing_generator *optc);
+ bool (*get_hw_timing)(struct timing_generator *optc,
+ struct dc_crtc_timing *hw_crtc_timing);
+
+ void (*set_vtg_params)(struct timing_generator *optc,
+ const struct dc_crtc_timing *dc_crtc_timing);
+
+ void (*set_dsc_config)(struct timing_generator *optc,
+ enum optc_dsc_mode dsc_mode,
+ uint32_t dsc_bytes_per_pixel,
+ uint32_t dsc_slice_width);
+ void (*set_odm_bypass)(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing);
+ void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,
+ struct dc_crtc_timing *timing);
+ void (*set_gsl)(struct timing_generator *optc, const struct gsl_params *params);
+ void (*set_gsl_source_select)(struct timing_generator *optc,
+ int group_idx,
+ uint32_t gsl_ready_signal);
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+ void (*set_out_mux)(struct timing_generator *tg, enum otg_out_mux_dest dest);
+ void (*set_vrr_m_const)(struct timing_generator *optc,
+ double vtotal_avg);
+ void (*set_drr_trigger_window)(struct timing_generator *optc,
+ uint32_t window_start, uint32_t window_end);
+ void (*set_vtotal_change_limit)(struct timing_generator *optc,
+ uint32_t limit);
+#endif
};
#endif
--
Gitblit v1.6.2