From 8ac6c7a54ed1b98d142dce24b11c6de6a1e239a5 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 22 Oct 2024 10:36:11 +0000
Subject: [PATCH] 修改4g拨号为QMI,需要在系统里后台执行quectel-CM
---
kernel/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 99 ++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 96 insertions(+), 3 deletions(-)
diff --git a/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
index 74ad94b..0491720 100644
--- a/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+++ b/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
@@ -36,7 +36,35 @@
struct dpp_caps *caps;
struct pwl_params regamma_params;
struct pwl_params degamma_params;
+ struct dpp_cursor_attributes cur_attr;
+ struct pwl_params shaper_params;
+ bool cm_bypass_mode;
+};
+
+struct dpp_input_csc_matrix {
+ enum dc_color_space color_space;
+ uint16_t regval[12];
+};
+
+static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = {
+ {COLOR_SPACE_SRGB,
+ {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
+ {COLOR_SPACE_SRGB_LIMITED,
+ {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
+ {COLOR_SPACE_YCBCR601,
+ {0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
+ 0, 0x2000, 0x38b4, 0xe3a6} },
+ {COLOR_SPACE_YCBCR601_LIMITED,
+ {0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108,
+ 0, 0x2568, 0x40de, 0xdd3a} },
+ {COLOR_SPACE_YCBCR709,
+ {0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
+ 0x2000, 0x3b61, 0xe24f} },
+
+ {COLOR_SPACE_YCBCR709_LIMITED,
+ {0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0,
+ 0x2568, 0x43ee, 0xdbb2} }
};
struct dpp_grph_csc_adjustment {
@@ -44,7 +72,34 @@
enum graphics_gamut_adjust_type gamut_adjust_type;
};
+struct cnv_color_keyer_params {
+ int color_keyer_en;
+ int color_keyer_mode;
+ int color_keyer_alpha_low;
+ int color_keyer_alpha_high;
+ int color_keyer_red_low;
+ int color_keyer_red_high;
+ int color_keyer_green_low;
+ int color_keyer_green_high;
+ int color_keyer_blue_low;
+ int color_keyer_blue_high;
+};
+
+/* new for dcn2: set the 8bit alpha values based on the 2 bit alpha
+ *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0 default: 0b00000000
+ *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1 default: 0b01010101
+ *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2 default: 0b10101010
+ *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3 default: 0b11111111
+ */
+struct cnv_alpha_2bit_lut {
+ int lut0;
+ int lut1;
+ int lut2;
+ int lut3;
+};
+
struct dcn_dpp_state {
+ uint32_t is_enabled;
uint32_t igam_lut_mode;
uint32_t igam_input_format;
uint32_t dgam_lut_mode;
@@ -58,7 +113,29 @@
uint32_t gamut_remap_c33_c34;
};
+struct CM_bias_params {
+ uint32_t cm_bias_cr_r;
+ uint32_t cm_bias_y_g;
+ uint32_t cm_bias_cb_b;
+ uint32_t cm_bias_format;
+};
+
struct dpp_funcs {
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+ bool (*dpp_program_gamcor_lut)(
+ struct dpp *dpp_base, const struct pwl_params *params);
+
+ void (*dpp_set_pre_degam)(struct dpp *dpp_base,
+ enum dc_transfer_func_predefined tr);
+#endif
+
+ void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
+ uint32_t enable, uint32_t additive_blending);
+
+ void (*dpp_program_cm_bias)(
+ struct dpp *dpp_base,
+ struct CM_bias_params *bias_params);
+
void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
void (*dpp_reset)(struct dpp *dpp);
@@ -134,23 +211,27 @@
enum surface_pixel_format format,
enum expansion_mode mode,
struct dc_csc_transform input_csc_color_matrix,
- enum dc_color_space input_color_space);
+ enum dc_color_space input_color_space,
+ struct cnv_alpha_2bit_lut *alpha_2bit_lut);
void (*dpp_full_bypass)(struct dpp *dpp_base);
void (*set_cursor_attributes)(
struct dpp *dpp_base,
- enum dc_cursor_color_format color_format);
+ struct dc_cursor_attributes *cursor_attributes);
void (*set_cursor_position)(
struct dpp *dpp_base,
const struct dc_cursor_position *pos,
const struct dc_cursor_mi_param *param,
- uint32_t width
+ uint32_t width,
+ uint32_t height
);
+
void (*dpp_set_hdr_multiplier)(
struct dpp *dpp_base,
uint32_t multiplier);
+
void (*set_optional_cursor_attributes)(
struct dpp *dpp_base,
struct dpp_cursor_attributes *attr);
@@ -160,6 +241,18 @@
bool dppclk_div,
bool enable);
+ bool (*dpp_program_blnd_lut)(
+ struct dpp *dpp,
+ const struct pwl_params *params);
+ bool (*dpp_program_shaper_lut)(
+ struct dpp *dpp,
+ const struct pwl_params *params);
+ bool (*dpp_program_3dlut)(
+ struct dpp *dpp,
+ struct tetrahedral_params *params);
+ void (*dpp_cnv_set_alpha_keyer)(
+ struct dpp *dpp_base,
+ struct cnv_color_keyer_params *color_keyer);
};
--
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