From 890e1df1bec891d9203724541e81f8fbe5183388 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 19 Feb 2024 01:57:06 +0000
Subject: [PATCH] default settings GPIO PA4 PA6 PA3 PB5
---
kernel/include/linux/rockchip/cpu.h | 92 +++++++++++++++++++++++++++++++++++++--------
1 files changed, 75 insertions(+), 17 deletions(-)
diff --git a/kernel/include/linux/rockchip/cpu.h b/kernel/include/linux/rockchip/cpu.h
index eef266c..beaaf92 100644
--- a/kernel/include/linux/rockchip/cpu.h
+++ b/kernel/include/linux/rockchip/cpu.h
@@ -19,15 +19,19 @@
#define ROCKCHIP_CPU_MASK 0xffff0000
#define ROCKCHIP_CPU_SHIFT 16
#define ROCKCHIP_CPU_PX30 0x33260000
+#define ROCKCHIP_CPU_RV1103 0x11030000
+#define ROCKCHIP_CPU_RV1106 0x11060000
#define ROCKCHIP_CPU_RV1109 0x11090000
#define ROCKCHIP_CPU_RV1126 0x11260000
#define ROCKCHIP_CPU_RK312X 0x31260000
#define ROCKCHIP_CPU_RK3288 0x32880000
#define ROCKCHIP_CPU_RK3308 0x33080000
+#define ROCKCHIP_CPU_RK3528 0x35280000
#define ROCKCHIP_CPU_RK3566 0x35660000
+#define ROCKCHIP_CPU_RK3567 0x35670000
#define ROCKCHIP_CPU_RK3568 0x35680000
-#if IS_ENABLED(CONFIG_ROCKCHIP_CPUINFO)
+#if IS_REACHABLE(CONFIG_ROCKCHIP_CPUINFO)
extern unsigned long rockchip_soc_id;
@@ -96,6 +100,25 @@
static inline bool cpu_is_px30(void) { return false; }
#endif
+#if defined(CONFIG_CPU_RV1106)
+static inline bool cpu_is_rv1103(void)
+{
+ if (rockchip_soc_id)
+ return (rockchip_soc_id & ROCKCHIP_CPU_MASK) == ROCKCHIP_CPU_RV1103;
+ return of_machine_is_compatible("rockchip,rv1103");
+}
+
+static inline bool cpu_is_rv1106(void)
+{
+ if (rockchip_soc_id)
+ return (rockchip_soc_id & ROCKCHIP_CPU_MASK) == ROCKCHIP_CPU_RV1106;
+ return of_machine_is_compatible("rockchip,rv1106");
+}
+#else
+static inline bool cpu_is_rv1103(void) { return false; }
+static inline bool cpu_is_rv1106(void) { return false; }
+#endif
+
#if defined(CONFIG_CPU_RV1126) || defined(CONFIG_CPU_RV1109)
static inline bool cpu_is_rv1109(void)
{
@@ -147,10 +170,23 @@
if (rockchip_soc_id)
return (rockchip_soc_id & ROCKCHIP_CPU_MASK) == ROCKCHIP_CPU_RK3308;
- return of_machine_is_compatible("rockchip,rk3308");
+ return of_machine_is_compatible("rockchip,rk3308") ||
+ of_machine_is_compatible("rockchip,rk3308bs");
}
#else
static inline bool cpu_is_rk3308(void) { return false; }
+#endif
+
+#if defined(CONFIG_CPU_RK3528)
+static inline bool cpu_is_rk3528(void)
+{
+ if (rockchip_soc_id)
+ return (rockchip_soc_id & ROCKCHIP_CPU_MASK) == ROCKCHIP_CPU_RK3528;
+ return of_machine_is_compatible("rockchip,rk3528") ||
+ of_machine_is_compatible("rockchip,rk3528a");
+}
+#else
+static inline bool cpu_is_rk3528(void) { return false; }
#endif
#if defined(CONFIG_CPU_RK3568)
@@ -161,6 +197,13 @@
return of_machine_is_compatible("rockchip,rk3566");
}
+static inline bool cpu_is_rk3567(void)
+{
+ if (rockchip_soc_id)
+ return (rockchip_soc_id & ROCKCHIP_CPU_MASK) == ROCKCHIP_CPU_RK3567;
+ return of_machine_is_compatible("rockchip,rk3567");
+}
+
static inline bool cpu_is_rk3568(void)
{
if (rockchip_soc_id)
@@ -169,12 +212,15 @@
}
#else
static inline bool cpu_is_rk3566(void) { return false; }
+static inline bool cpu_is_rk3567(void) { return false; }
static inline bool cpu_is_rk3568(void) { return false; }
#endif
#define ROCKCHIP_SOC_MASK (ROCKCHIP_CPU_MASK | 0xff)
#define ROCKCHIP_SOC_PX30 (ROCKCHIP_CPU_PX30 | 0x00)
#define ROCKCHIP_SOC_PX30S (ROCKCHIP_CPU_PX30 | 0x01)
+#define ROCKCHIP_SOC_RV1103 (ROCKCHIP_CPU_RV1103 | 0x00)
+#define ROCKCHIP_SOC_RV1106 (ROCKCHIP_CPU_RV1106 | 0x00)
#define ROCKCHIP_SOC_RV1109 (ROCKCHIP_CPU_RV1109 | 0x00)
#define ROCKCHIP_SOC_RV1126 (ROCKCHIP_CPU_RV1126 | 0x00)
#define ROCKCHIP_SOC_RK3126 (ROCKCHIP_CPU_RK312X | 0x00)
@@ -185,30 +231,42 @@
#define ROCKCHIP_SOC_RK3288W (ROCKCHIP_CPU_RK3288 | 0x01)
#define ROCKCHIP_SOC_RK3308 (ROCKCHIP_CPU_RK3308 | 0x00)
#define ROCKCHIP_SOC_RK3308B (ROCKCHIP_CPU_RK3308 | 0x01)
+#define ROCKCHIP_SOC_RK3308BS (ROCKCHIP_CPU_RK3308 | 0x02)
+#define ROCKCHIP_SOC_RK3528 (ROCKCHIP_CPU_RK3528 | 0x00)
+#define ROCKCHIP_SOC_RK3528A (ROCKCHIP_CPU_RK3528 | 0x01)
#define ROCKCHIP_SOC_RK3566 (ROCKCHIP_CPU_RK3566 | 0x00)
+#define ROCKCHIP_SOC_RK3567 (ROCKCHIP_CPU_RK3567 | 0x00)
#define ROCKCHIP_SOC_RK3568 (ROCKCHIP_CPU_RK3568 | 0x00)
-#define ROCKCHIP_SOC(id, ID) \
+#define ROCKCHIP_SOC(CPU, id, ID) \
static inline bool soc_is_##id(void) \
{ \
+ if (!IS_ENABLED(CONFIG_CPU_##CPU)) \
+ return false; \
if (rockchip_soc_id) \
return ((rockchip_soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \
return of_machine_is_compatible("rockchip,"#id); \
}
-ROCKCHIP_SOC(px30, PX30)
-ROCKCHIP_SOC(px30s, PX30S)
-ROCKCHIP_SOC(rv1109, RV1109)
-ROCKCHIP_SOC(rv1126, RV1126)
-ROCKCHIP_SOC(rk3126, RK3126)
-ROCKCHIP_SOC(rk3126b, RK3126B)
-ROCKCHIP_SOC(rk3126c, RK3126C)
-ROCKCHIP_SOC(rk3128, RK3128)
-ROCKCHIP_SOC(rk3288, RK3288)
-ROCKCHIP_SOC(rk3288w, RK3288W)
-ROCKCHIP_SOC(rk3308, RK3308)
-ROCKCHIP_SOC(rk3308b, RK3308B)
-ROCKCHIP_SOC(rk3566, RK3566)
-ROCKCHIP_SOC(rk3568, RK3568)
+ROCKCHIP_SOC(PX30, px30, PX30)
+ROCKCHIP_SOC(PX30, px30s, PX30S)
+ROCKCHIP_SOC(RV1106, rv1103, RV1103)
+ROCKCHIP_SOC(RV1106, rv1106, RV1106)
+ROCKCHIP_SOC(RV1126, rv1109, RV1109)
+ROCKCHIP_SOC(RV1126, rv1126, RV1126)
+ROCKCHIP_SOC(RK312X, rk3126, RK3126)
+ROCKCHIP_SOC(RK312X, rk3126b, RK3126B)
+ROCKCHIP_SOC(RK312X, rk3126c, RK3126C)
+ROCKCHIP_SOC(RK312X, rk3128, RK3128)
+ROCKCHIP_SOC(RK3288, rk3288, RK3288)
+ROCKCHIP_SOC(RK3288, rk3288w, RK3288W)
+ROCKCHIP_SOC(RK3308, rk3308, RK3308)
+ROCKCHIP_SOC(RK3308, rk3308b, RK3308B)
+ROCKCHIP_SOC(RK3308, rk3308bs, RK3308BS)
+ROCKCHIP_SOC(RK3528, rk3528, RK3528)
+ROCKCHIP_SOC(RK3528, rk3528a, RK3528A)
+ROCKCHIP_SOC(RK3568, rk3566, RK3566)
+ROCKCHIP_SOC(RK3567, rk3567, RK3567)
+ROCKCHIP_SOC(RK3568, rk3568, RK3568)
#endif
--
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