From 748e4f3d702def1a4bff191e0cf93b6a05340f01 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 07:41:34 +0000
Subject: [PATCH] add gpio led uart

---
 kernel/arch/sh/Kconfig.cpu |   11 +----------
 1 files changed, 1 insertions(+), 10 deletions(-)

diff --git a/kernel/arch/sh/Kconfig.cpu b/kernel/arch/sh/Kconfig.cpu
index 4a4edc7..fff419f 100644
--- a/kernel/arch/sh/Kconfig.cpu
+++ b/kernel/arch/sh/Kconfig.cpu
@@ -13,7 +13,6 @@
 
 config CPU_BIG_ENDIAN
 	bool "Big Endian"
-	depends on !CPU_SH5
 
 endchoice
 
@@ -26,10 +25,6 @@
 	  have FPU units (ie, SH77xx).
 
 	  This option must be set in order to enable the FPU.
-
-config SH64_FPU_DENORM_FLUSH
-	bool "Flush floating point denorms to zero"
-	depends on SH_FPU && SUPERH64
 
 config SH_FPU_EMU
 	def_bool n
@@ -77,10 +72,6 @@
 
 	  If unsure, say N.
 
-config SH64_ID2815_WORKAROUND
-	bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
-	depends on CPU_SUBTYPE_SH5_101
-
 config CPU_HAS_INTEVT
 	bool
 
@@ -94,7 +85,7 @@
 	  that are lacking this bit must have another method in place for
 	  accomplishing what is taken care of by the banked registers.
 
-	  See <file:Documentation/sh/register-banks.txt> for further
+	  See <file:Documentation/sh/register-banks.rst> for further
 	  information on SR.RB and register banking in the kernel in general.
 
 config CPU_HAS_PTEAEX

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