From 6778948f9de86c3cfaf36725a7c87dcff9ba247f Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 11 Dec 2023 08:20:59 +0000
Subject: [PATCH] kernel_5.10 no rt
---
kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_gpuprops_backend.c | 65 +++++++++++++++-----------------
1 files changed, 31 insertions(+), 34 deletions(-)
diff --git a/kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_gpuprops_backend.c b/kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_gpuprops_backend.c
index 11088db..10e92ec 100644
--- a/kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_gpuprops_backend.c
+++ b/kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_gpuprops_backend.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
/*
*
- * (C) COPYRIGHT 2014-2021 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
@@ -26,32 +26,21 @@
#include <mali_kbase.h>
#include <device/mali_kbase_device.h>
#include <backend/gpu/mali_kbase_pm_internal.h>
+#include <backend/gpu/mali_kbase_cache_policy_backend.h>
#include <mali_kbase_hwaccess_gpuprops.h>
int kbase_backend_gpuprops_get(struct kbase_device *kbdev,
struct kbase_gpuprops_regdump *regdump)
{
int i;
- struct kbase_gpuprops_regdump registers;
+ struct kbase_gpuprops_regdump registers = { 0 };
/* Fill regdump with the content of the relevant registers */
registers.gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID));
registers.l2_features = kbase_reg_read(kbdev,
GPU_CONTROL_REG(L2_FEATURES));
- registers.core_features = 0;
-#if !MALI_USE_CSF
- /* TGOx */
- registers.core_features = kbase_reg_read(kbdev,
- GPU_CONTROL_REG(CORE_FEATURES));
-#else /* !MALI_USE_CSF */
- if (((registers.gpu_id & GPU_ID2_PRODUCT_MODEL) ==
- GPU_ID2_PRODUCT_TGRX) ||
- ((registers.gpu_id & GPU_ID2_PRODUCT_MODEL) ==
- GPU_ID2_PRODUCT_TVAX))
- registers.core_features =
- kbase_reg_read(kbdev, GPU_CONTROL_REG(CORE_FEATURES));
-#endif /* MALI_USE_CSF */
+
registers.tiler_features = kbase_reg_read(kbdev,
GPU_CONTROL_REG(TILER_FEATURES));
registers.mem_features = kbase_reg_read(kbdev,
@@ -146,7 +135,7 @@
curr_config_regdump->l2_present_hi = kbase_reg_read(kbdev,
GPU_CONTROL_REG(L2_PRESENT_HI));
- if (WARN_ON(kbase_is_gpu_removed(kbdev)))
+ if (kbase_is_gpu_removed(kbdev))
return -EIO;
return 0;
@@ -156,30 +145,27 @@
int kbase_backend_gpuprops_get_features(struct kbase_device *kbdev,
struct kbase_gpuprops_regdump *regdump)
{
- if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_COHERENCY_REG)) {
- u32 coherency_features;
+ u32 coherency_features;
+ int error = 0;
- /* Ensure we can access the GPU registers */
- kbase_pm_register_access_enable(kbdev);
+ /* Ensure we can access the GPU registers */
+ kbase_pm_register_access_enable(kbdev);
- coherency_features = kbase_reg_read(kbdev,
- GPU_CONTROL_REG(COHERENCY_FEATURES));
+ coherency_features = kbase_cache_get_coherency_features(kbdev);
- if (kbase_is_gpu_removed(kbdev))
- return -EIO;
+ if (kbase_is_gpu_removed(kbdev))
+ error = -EIO;
- regdump->coherency_features = coherency_features;
+ regdump->coherency_features = coherency_features;
- /* We're done accessing the GPU registers for now. */
- kbase_pm_register_access_disable(kbdev);
- } else {
- /* Pre COHERENCY_FEATURES we only supported ACE_LITE */
- regdump->coherency_features =
- COHERENCY_FEATURE_BIT(COHERENCY_NONE) |
- COHERENCY_FEATURE_BIT(COHERENCY_ACE_LITE);
- }
+ if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_CORE_FEATURES))
+ regdump->core_features = kbase_reg_read(kbdev, GPU_CONTROL_REG(CORE_FEATURES));
+ else
+ regdump->core_features = 0;
- return 0;
+ kbase_pm_register_access_disable(kbdev);
+
+ return error;
}
int kbase_backend_gpuprops_get_l2_features(struct kbase_device *kbdev,
@@ -190,13 +176,24 @@
GPU_CONTROL_REG(L2_FEATURES));
u32 l2_config =
kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG));
+ u32 asn_hash[ASN_HASH_COUNT] = {
+ 0,
+ };
+ int i;
+ if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_ASN_HASH)) {
+ for (i = 0; i < ASN_HASH_COUNT; i++)
+ asn_hash[i] = kbase_reg_read(
+ kbdev, GPU_CONTROL_REG(ASN_HASH(i)));
+ }
if (kbase_is_gpu_removed(kbdev))
return -EIO;
regdump->l2_features = l2_features;
regdump->l2_config = l2_config;
+ for (i = 0; i < ASN_HASH_COUNT; i++)
+ regdump->l2_asn_hash[i] = asn_hash[i];
}
return 0;
--
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