From 6778948f9de86c3cfaf36725a7c87dcff9ba247f Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 11 Dec 2023 08:20:59 +0000
Subject: [PATCH] kernel_5.10 no rt
---
kernel/arch/arc/kernel/entry-arcv2.S | 67 ++++++---------------------------
1 files changed, 13 insertions(+), 54 deletions(-)
diff --git a/kernel/arch/arc/kernel/entry-arcv2.S b/kernel/arch/arc/kernel/entry-arcv2.S
index 562089d..12d5f12 100644
--- a/kernel/arch/arc/kernel/entry-arcv2.S
+++ b/kernel/arch/arc/kernel/entry-arcv2.S
@@ -1,11 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
*
* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/linkage.h> /* ARC_{EXTRY,EXIT} */
@@ -70,7 +67,7 @@
ENTRY(handle_interrupt)
- INTERRUPT_PROLOGUE irq
+ INTERRUPT_PROLOGUE
# irq control APIs local_irq_save/restore/disable/enable fiddle with
# global interrupt enable bits in STATUS32 (.IE for 1 prio, .E[] for 2 prio)
@@ -82,7 +79,7 @@
#
# Note this disable is only for consistent book-keeping as further interrupts
# will be disabled anyways even w/o this. Hardware tracks active interrupts
- # seperately in AUX_IRQ_ACTIVE.active and will not take new interrupts
+ # seperately in AUX_IRQ_ACT.active and will not take new interrupts
# unless this one returns (or higher prio becomes pending in 2-prio scheme)
IRQ_DISABLE
@@ -203,17 +200,18 @@
ld r0, [sp, PT_status32] ; U/K mode at time of entry
lr r10, [AUX_IRQ_ACT]
- bmsk r11, r10, 15 ; AUX_IRQ_ACT.ACTIVE
+ bmsk r11, r10, 15 ; extract AUX_IRQ_ACT.active
breq r11, 0, .Lexcept_ret ; No intr active, ret from Exception
;####### Return from Intr #######
+
+.Lisr_ret:
debug_marker_l1:
; bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot
btst r0, STATUS_DE_BIT ; Z flag set if bit clear
bnz .Lintr_ret_to_delay_slot ; branch if STATUS_DE_BIT set
-.Lisr_ret_fast_path:
; Handle special case #1: (Entry via Exception, Return via IRQ)
;
; Exception in U mode, preempted in kernel, Intr taken (K mode), orig
@@ -226,7 +224,7 @@
bset.nz r11, r11, AUX_IRQ_ACT_BIT_U ; NZ means U
sr r11, [AUX_IRQ_ACT]
- INTERRUPT_EPILOGUE irq
+ INTERRUPT_EPILOGUE
rtie
;####### Return from Exception / pure kernel mode #######
@@ -247,8 +245,8 @@
;
; IRQ RTIE won't reliably restore DE bit and/or BTA, needs workaround
;
-; Solution is return from Intr w/o any delay slot quirks into a kernel trampoline
-; and from pure kernel mode return to delay slot which handles DS bit/BTA correctly
+; Solution is to drop out of interrupt context into pure kernel mode
+; and return from pure kernel mode which does right things for delay slot
.Lintr_ret_to_delay_slot:
debug_marker_ds:
@@ -257,48 +255,9 @@
add r2, r2, 1
st r2, [@intr_to_DE_cnt]
- ld r2, [sp, PT_ret]
- ld r3, [sp, PT_status32]
-
- ; STAT32 for Int return created from scratch
- ; (No delay dlot, disable Further intr in trampoline)
-
- bic r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK
- st r0, [sp, PT_status32]
-
- mov r1, .Lintr_ret_to_delay_slot_2
- st r1, [sp, PT_ret]
-
- ; Orig exception PC/STAT32 safekept @orig_r0 and @event stack slots
- st r2, [sp, 0]
- st r3, [sp, 4]
-
- b .Lisr_ret_fast_path
-
-.Lintr_ret_to_delay_slot_2:
- ; Trampoline to restore orig exception PC/STAT32/BTA/AUX_USER_SP
- sub sp, sp, SZ_PT_REGS
- st r9, [sp, -4]
-
- ld r9, [sp, 0]
- sr r9, [eret]
-
- ld r9, [sp, 4]
- sr r9, [erstatus]
-
- ; restore AUX_USER_SP if returning to U mode
- bbit0 r9, STATUS_U_BIT, 1f
- ld r9, [sp, PT_sp]
- sr r9, [AUX_USER_SP]
-
-1:
- ld r9, [sp, 8]
- sr r9, [erbta]
-
- ld r9, [sp, -4]
- add sp, sp, SZ_PT_REGS
-
- ; return from pure kernel mode to delay slot
- rtie
+ ; drop out of interrupt context (clear AUX_IRQ_ACT.active)
+ bmskn r11, r10, 15
+ sr r11, [AUX_IRQ_ACT]
+ b .Lexcept_ret
END(ret_from_exception)
--
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