From 61598093bbdd283a7edc367d900f223070ead8d2 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 07:43:03 +0000
Subject: [PATCH] add ax88772C AX88772C_eeprom_tools
---
kernel/drivers/clk/samsung/clk-s3c2410-dclk.c | 29 ++++++++++++++---------------
1 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/kernel/drivers/clk/samsung/clk-s3c2410-dclk.c b/kernel/drivers/clk/samsung/clk-s3c2410-dclk.c
index 5602baf..f5e0a6b 100644
--- a/kernel/drivers/clk/samsung/clk-s3c2410-dclk.c
+++ b/kernel/drivers/clk/samsung/clk-s3c2410-dclk.c
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*
* Common Clock Framework support for s3c24xx external clock output.
*/
@@ -12,13 +9,11 @@
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
+#include <linux/io.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/clk-s3c2410.h>
#include <linux/module.h>
#include "clk.h"
-
-/* legacy access to misccr, until dt conversion is finished */
-#include <mach/hardware.h>
-#include <mach/regs-gpio.h>
#define MUX_DCLK0 0
#define MUX_DCLK1 1
@@ -54,6 +49,7 @@
struct clk_hw hw;
u32 mask;
u8 shift;
+ unsigned int (*modify_misccr)(unsigned int clr, unsigned int chg);
};
#define to_s3c24xx_clkout(_hw) container_of(_hw, struct s3c24xx_clkout, hw)
@@ -64,7 +60,7 @@
int num_parents = clk_hw_get_num_parents(hw);
u32 val;
- val = readl_relaxed(S3C24XX_MISCCR) >> clkout->shift;
+ val = clkout->modify_misccr(0, 0) >> clkout->shift;
val >>= clkout->shift;
val &= clkout->mask;
@@ -78,7 +74,7 @@
{
struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw);
- s3c2410_modify_misccr((clkout->mask << clkout->shift),
+ clkout->modify_misccr((clkout->mask << clkout->shift),
(index << clkout->shift));
return 0;
@@ -94,9 +90,13 @@
const char *name, const char **parent_names, u8 num_parents,
u8 shift, u32 mask)
{
+ struct s3c2410_clk_platform_data *pdata = dev_get_platdata(dev);
struct s3c24xx_clkout *clkout;
- struct clk_init_data init = {};
+ struct clk_init_data init;
int ret;
+
+ if (!pdata)
+ return ERR_PTR(-EINVAL);
/* allocate the clkout */
clkout = kzalloc(sizeof(*clkout), GFP_KERNEL);
@@ -105,13 +105,14 @@
init.name = name;
init.ops = &s3c24xx_clkout_ops;
- init.flags = CLK_IS_BASIC;
+ init.flags = 0;
init.parent_names = parent_names;
init.num_parents = num_parents;
clkout->shift = shift;
clkout->mask = mask;
clkout->hw.init = &init;
+ clkout->modify_misccr = pdata->modify_misccr;
ret = clk_hw_register(dev, &clkout->hw);
if (ret)
@@ -240,7 +241,6 @@
static int s3c24xx_dclk_probe(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk;
- struct resource *mem;
struct s3c24xx_dclk_drv_data *dclk_variant;
struct clk_hw **clk_table;
int ret, i;
@@ -259,8 +259,7 @@
platform_set_drvdata(pdev, s3c24xx_dclk);
spin_lock_init(&s3c24xx_dclk->dclk_lock);
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- s3c24xx_dclk->base = devm_ioremap_resource(&pdev->dev, mem);
+ s3c24xx_dclk->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(s3c24xx_dclk->base))
return PTR_ERR(s3c24xx_dclk->base);
--
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