From 5a4414d1fd83d52b073fc27f6e12dc9fe3b32766 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 20 Nov 2023 05:50:24 +0000
Subject: [PATCH] add pcie r8169 driver
---
u-boot/drivers/adc/rockchip-saradc-v2.c | 33 +++++++++++++++++++++++++++++++--
1 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/u-boot/drivers/adc/rockchip-saradc-v2.c b/u-boot/drivers/adc/rockchip-saradc-v2.c
index c97142e..52fa2e4 100644
--- a/u-boot/drivers/adc/rockchip-saradc-v2.c
+++ b/u-boot/drivers/adc/rockchip-saradc-v2.c
@@ -181,6 +181,9 @@
if (IS_ERR_VALUE(ret))
return ret;
+ /* Wait until pll stable */
+ mdelay(5);
+
priv->active_channel = -1;
return 0;
@@ -220,9 +223,35 @@
.clk_rate = 1000000,
};
+static const struct rockchip_saradc_data rk3562_saradc_data = {
+ .num_bits = 10,
+ .num_channels = 8,
+ .clk_rate = 1000000,
+};
+
+static const struct rockchip_saradc_data rk1106_saradc_data = {
+ .num_bits = 10,
+ .num_channels = 2,
+ .clk_rate = 1000000,
+};
+
static const struct udevice_id rockchip_saradc_ids[] = {
- { .compatible = "rockchip,rk3588-saradc",
- .data = (ulong)&rk3588_saradc_data },
+ {
+ .compatible = "rockchip,rk3588-saradc",
+ .data = (ulong)&rk3588_saradc_data
+ },
+ {
+ .compatible = "rockchip,rk3528-saradc",
+ .data = (ulong)&rk3588_saradc_data
+ },
+ {
+ .compatible = "rockchip,rk3562-saradc",
+ .data = (ulong)&rk3562_saradc_data
+ },
+ {
+ .compatible = "rockchip,rv1106-saradc",
+ .data = (ulong)&rk1106_saradc_data
+ },
{ }
};
--
Gitblit v1.6.2