From 557c24d082b6ecb9bfe5407b77ae43fa7650a5dc Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 17 Feb 2023 11:02:20 +0000
Subject: [PATCH] add eDP LVDS PCIE WIFI6
---
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi | 176 ++++++++++++++++++++++++++++++++++++++++++++--------------
1 files changed, 133 insertions(+), 43 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
index 9424547..69afddb 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/display/media-bus-format.h>
#include "rk3568.dtsi"
#include "rk3568-evb.dtsi"
@@ -58,7 +59,9 @@
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-always-on;
enable-active-high;
+ regulator-boot-on;
gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&dc_12v>;
@@ -88,13 +91,9 @@
nk_io_init {
compatible = "nk_io_control";
-// usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
@@ -102,23 +101,55 @@
air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
- spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
-
- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
-
+ spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
-
+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
pinctrl-names = "default";
- pinctrl-0 = <&nk_io_gpio>;
- nodka_lvds = <9>;
+ pinctrl-0 = <&nk_io_gpio>;
};
+
+ panel: panel {
+ compatible = "simple-panel";
+ backlight = <&backlight>;
+ power-supply = <&vcc3v3_lcd0_n>;
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
+ bpc = <8>;
+ prepare-delay-ms = <200>;
+ enable-delay-ms = <20>;
+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
+ nodka-lvds = <9>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <142300000>;
+ hactive = <1920>;
+ vactive = <1080>;
+ hfront-porch = <48>;
+ hsync-len = <32>;
+ hback-porch = <100>;
+ vfront-porch = <7>;
+ vsync-len = <20>;
+ vback-porch = <23>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ ports {
+ panel_in: endpoint {
+ remote-endpoint = <&edp_out>;
+ };
+ };
+ };
};
&combphy0_us {
@@ -134,11 +165,11 @@
};
&csi2_dphy_hw {
- status = "okay";
+ status = "disabled";
};
&csi2_dphy0 {
- status = "okay";
+ status = "disabled";
ports {
#address-cells = <1>;
@@ -181,8 +212,12 @@
* video_phy0 needs to be enabled
* when dsi0 is enabled
*/
+&video_phy0 {
+ status = "disabled";
+};
+
&dsi0 {
- status = "okay";
+ status = "disabled";
};
&dsi0_in_vp0 {
@@ -190,7 +225,7 @@
};
&dsi0_in_vp1 {
- status = "okay";
+ status = "disabled";
};
&dsi0_panel {
@@ -201,6 +236,10 @@
* video_phy1 needs to be enabled
* when dsi1 is enabled
*/
+
+&video_phy1 {
+ status = "disabled";
+};
&dsi1 {
status = "disabled";
};
@@ -217,22 +256,82 @@
power-supply = <&vcc3v3_lcd1_n>;
};
+/*
+* edp_start
+*/
+
&edp {
- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
- status = "okay";
+ force-hpd;
+ status = "okay";
+ ports {
+ port@1 {
+ reg = <1>;
+ edp_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
};
&edp_phy {
- status = "okay";
+ status = "okay";
};
&edp_in_vp0 {
- status = "okay";
+ status = "disabled";
};
&edp_in_vp1 {
+ status = "okay";
+};
+
+&route_edp {
+ status = "okay";
+ connect = <&vp1_out_edp>;
+};
+
+&route_edp {
+ status = "okay";
+};
+/*
+* edp_end
+*/
+
+/*
+* Hdmi_start
+*/
+
+&hdmi {
+ status = "okay";
+ rockchip,phy-table =
+ <92812500 0x8009 0x0000 0x0270>,
+ <165000000 0x800b 0x0000 0x026d>,
+ <185625000 0x800b 0x0000 0x01ed>,
+ <297000000 0x800b 0x0000 0x01ad>,
+ <594000000 0x8029 0x0000 0x0088>,
+ <000000000 0x0000 0x0000 0x0000>;
+};
+
+&route_hdmi {
+ status = "okay";
+ connect = <&vp0_out_hdmi>;
+};
+
+&hdmi_in_vp0 {
+ status = "okay";
+};
+
+&hdmi_in_vp1 {
status = "disabled";
};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+/*
+ * Hdmi_END
+*/
&gmac0 {
phy-mode = "rgmii";
@@ -409,20 +508,14 @@
};
};
-&video_phy0 {
- status = "okay";
-};
-&video_phy1 {
- status = "disabled";
-};
&pcie30phy {
status = "okay";
};
-&pcie3x2 {
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+&pcie2x1 {
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
@@ -477,15 +570,15 @@
};
&rkisp {
- status = "okay";
+ status = "disabled";
};
&rkisp_mmu {
- status = "okay";
+ status = "disabled";
};
&rkisp_vir0 {
- status = "okay";
+ status = "disabled";
port {
#address-cells = <1>;
@@ -499,14 +592,11 @@
};
&route_dsi0 {
- status = "okay";
+ status = "disabled";
connect = <&vp1_out_dsi0>;
};
-&route_edp {
- status = "okay";
- connect = <&vp0_out_edp>;
-};
+
&sata2 {
status = "okay";
@@ -545,7 +635,7 @@
};
&vcc3v3_lcd0_n {
- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
--
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