From 2f7c68cb55ecb7331f2381deb497c27155f32faf Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 03 Jan 2024 09:43:39 +0000
Subject: [PATCH] update kernel to 5.10.198

---
 kernel/drivers/video/rockchip/mpp/mpp_common.h |   57 +--------------------------------------------------------
 1 files changed, 1 insertions(+), 56 deletions(-)

diff --git a/kernel/drivers/video/rockchip/mpp/mpp_common.h b/kernel/drivers/video/rockchip/mpp/mpp_common.h
index a088d62..8daeb08 100644
--- a/kernel/drivers/video/rockchip/mpp/mpp_common.h
+++ b/kernel/drivers/video/rockchip/mpp/mpp_common.h
@@ -24,6 +24,7 @@
 #include <linux/poll.h>
 #include <linux/platform_device.h>
 #include <soc/rockchip/pm_domains.h>
+#include <uapi/linux/rk-mpp.h>
 
 #define MHZ				(1000 * 1000)
 #define MPP_WORK_TIMEOUT_DELAY		(500)
@@ -31,13 +32,6 @@
 #define MPP_MAX_MSG_NUM			(16)
 #define MPP_MAX_REG_TRANS_NUM		(60)
 #define MPP_MAX_TASK_CAPACITY		(16)
-/* define flags for mpp_request */
-#define MPP_FLAGS_MULTI_MSG		(0x00000001)
-#define MPP_FLAGS_LAST_MSG		(0x00000002)
-#define MPP_FLAGS_REG_FD_NO_TRANS	(0x00000004)
-#define MPP_FLAGS_SCL_FD_NO_TRANS	(0x00000008)
-#define MPP_FLAGS_REG_NO_OFFSET		(0x00000010)
-#define MPP_FLAGS_SECURE_MODE		(0x00010000)
 
 /* grf mask for get value */
 #define MPP_GRF_VAL_MASK		(0xFFFF)
@@ -91,45 +85,6 @@
 	MPP_DRIVER_AV1DEC,
 	MPP_DRIVER_VDPP,
 	MPP_DRIVER_BUTT,
-};
-
-/**
- * Command type: keep the same as user space
- */
-enum MPP_DEV_COMMAND_TYPE {
-	MPP_CMD_QUERY_BASE		= 0,
-	MPP_CMD_QUERY_HW_SUPPORT	= MPP_CMD_QUERY_BASE + 0,
-	MPP_CMD_QUERY_HW_ID		= MPP_CMD_QUERY_BASE + 1,
-	MPP_CMD_QUERY_CMD_SUPPORT	= MPP_CMD_QUERY_BASE + 2,
-	MPP_CMD_QUERY_BUTT,
-
-	MPP_CMD_INIT_BASE		= 0x100,
-	MPP_CMD_INIT_CLIENT_TYPE	= MPP_CMD_INIT_BASE + 0,
-	MPP_CMD_INIT_DRIVER_DATA	= MPP_CMD_INIT_BASE + 1,
-	MPP_CMD_INIT_TRANS_TABLE	= MPP_CMD_INIT_BASE + 2,
-	MPP_CMD_INIT_BUTT,
-
-	MPP_CMD_SEND_BASE		= 0x200,
-	MPP_CMD_SET_REG_WRITE		= MPP_CMD_SEND_BASE + 0,
-	MPP_CMD_SET_REG_READ		= MPP_CMD_SEND_BASE + 1,
-	MPP_CMD_SET_REG_ADDR_OFFSET	= MPP_CMD_SEND_BASE + 2,
-	MPP_CMD_SET_RCB_INFO		= MPP_CMD_SEND_BASE + 3,
-	MPP_CMD_SET_SESSION_FD		= MPP_CMD_SEND_BASE + 4,
-	MPP_CMD_SEND_BUTT,
-
-	MPP_CMD_POLL_BASE		= 0x300,
-	MPP_CMD_POLL_HW_FINISH		= MPP_CMD_POLL_BASE + 0,
-	MPP_CMD_POLL_HW_IRQ		= MPP_CMD_POLL_BASE + 1,
-	MPP_CMD_POLL_BUTT,
-
-	MPP_CMD_CONTROL_BASE		= 0x400,
-	MPP_CMD_RESET_SESSION		= MPP_CMD_CONTROL_BASE + 0,
-	MPP_CMD_TRANS_FD_TO_IOVA	= MPP_CMD_CONTROL_BASE + 1,
-	MPP_CMD_RELEASE_FD		= MPP_CMD_CONTROL_BASE + 2,
-	MPP_CMD_SEND_CODEC_INFO		= MPP_CMD_CONTROL_BASE + 3,
-	MPP_CMD_CONTROL_BUTT,
-
-	MPP_CMD_BUTT,
 };
 
 enum MPP_CLOCK_MODE {
@@ -194,15 +149,6 @@
 struct mpp_dma_session;
 struct mpp_taskqueue;
 struct iommu_domain;
-
-/* data common struct for parse out */
-struct mpp_request {
-	__u32 cmd;
-	__u32 flags;
-	__u32 size;
-	__u32 offset;
-	void __user *data;
-};
 
 /* struct use to collect task set and poll message */
 struct mpp_task_msgs {
@@ -544,7 +490,6 @@
 	u32 core_id_max;
 	u32 core_count;
 	unsigned long dev_active_flags;
-	u32 iommu_fault;
 };
 
 struct mpp_reset_group {

--
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