From 2f7c68cb55ecb7331f2381deb497c27155f32faf Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Wed, 03 Jan 2024 09:43:39 +0000 Subject: [PATCH] update kernel to 5.10.198 --- kernel/drivers/usb/dwc3/Kconfig | 49 +++++++++++++++++++++++++++++++++++-------------- 1 files changed, 35 insertions(+), 14 deletions(-) diff --git a/kernel/drivers/usb/dwc3/Kconfig b/kernel/drivers/usb/dwc3/Kconfig index 89add57..e0e9645 100644 --- a/kernel/drivers/usb/dwc3/Kconfig +++ b/kernel/drivers/usb/dwc3/Kconfig @@ -4,6 +4,7 @@ tristate "DesignWare USB3 DRD Core Support" depends on (USB || USB_GADGET) && HAS_DMA select USB_XHCI_PLATFORM if USB_XHCI_HCD + select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE help Say Y or M here if your system has a Dual Role SuperSpeed USB controller based on the DesignWare USB3 IP Core. @@ -89,27 +90,37 @@ platform, please say 'Y' or 'M' here. config USB_DWC3_KEYSTONE - tristate "Texas Instruments Keystone2 Platforms" - depends on ARCH_KEYSTONE || COMPILE_TEST + tristate "Texas Instruments Keystone2/AM654 Platforms" + depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST default USB_DWC3 help - Support of USB2/3 functionality in TI Keystone2 platforms. + Support of USB2/3 functionality in TI Keystone2 and AM654 platforms. Say 'Y' or 'M' here if you have one such device +config USB_DWC3_MESON_G12A + tristate "Amlogic Meson G12A Platforms" + depends on OF && COMMON_CLK + depends on ARCH_MESON || COMPILE_TEST + default USB_DWC3 + select USB_ROLE_SWITCH + select REGMAP_MMIO + help + Support USB2/3 functionality in Amlogic G12A platforms. + Say 'Y' or 'M' if you have one such device. + config USB_DWC3_OF_SIMPLE - tristate "Generic OF Simple Glue Layer" - depends on OF && COMMON_CLK - default USB_DWC3 - help - Support USB2/3 functionality in simple SoC integrations. - Currently supports Xilinx and Qualcomm DWC USB3 IP. - Say 'Y' or 'M' if you have one such device. + tristate "Generic OF Simple Glue Layer" + depends on OF && COMMON_CLK + default USB_DWC3 + help + Support USB2/3 functionality in simple SoC integrations. + Currently supports Xilinx and Qualcomm DWC USB3 IP. + Say 'Y' or 'M' if you have one such device. config USB_DWC3_ROCKCHIP_INNO - tristate "Rockchip Platforms with INNO PHY" + bool "Rockchip Platforms with INNO PHY" depends on OF && COMMON_CLK && (ARCH_ROCKCHIP || COMPILE_TEST) - depends on USB=y || USB=USB_DWC3 - default USB_DWC3 + default USB_DWC3 && PHY_ROCKCHIP_INNO_USB3 && NO_GKI help Support of USB2/3 functionality in Rockchip platforms with INNO USB 3.0 PHY IP inside. @@ -128,7 +139,7 @@ tristate "Qualcomm Platform" depends on ARCH_QCOM || COMPILE_TEST depends on EXTCON || !EXTCON - depends on OF + depends on (OF || ACPI) default USB_DWC3 help Some Qualcomm SoCs use DesignWare Core IP for USB2/3 @@ -137,4 +148,14 @@ for peripheral mode support. Say 'Y' or 'M' if you have one such device. +config USB_DWC3_IMX8MP + tristate "NXP iMX8MP Platform" + depends on OF && COMMON_CLK + depends on (ARCH_MXC && ARM64) || COMPILE_TEST + default USB_DWC3 + help + NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3 + functionality. + Say 'Y' or 'M' if you have one such device. + endif -- Gitblit v1.6.2