From 2f7c68cb55ecb7331f2381deb497c27155f32faf Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Wed, 03 Jan 2024 09:43:39 +0000 Subject: [PATCH] update kernel to 5.10.198 --- kernel/drivers/mmc/host/dw_mmc.c | 55 +++++++++++++++++++++++++++++++++++++------------------ 1 files changed, 37 insertions(+), 18 deletions(-) diff --git a/kernel/drivers/mmc/host/dw_mmc.c b/kernel/drivers/mmc/host/dw_mmc.c index a88d9b9..5997010 100644 --- a/kernel/drivers/mmc/host/dw_mmc.c +++ b/kernel/drivers/mmc/host/dw_mmc.c @@ -124,6 +124,8 @@ EXPORT_SYMBOL(rv1106_sdmmc_put_lock); #endif +#define RV1106_RAMDON_DATA_SIZE 508 + #if defined(CONFIG_DEBUG_FS) static int dw_mci_req_show(struct seq_file *s, void *v) { @@ -525,8 +527,7 @@ tasklet_schedule(&host->tasklet); } - if (host->need_xfer_timer && - host->dir_status == DW_MCI_RECV_STATUS) + if (host->need_xfer_timer) del_timer(&host->xfer_timer); } @@ -739,7 +740,7 @@ if (host->is_rv1106_sd && (data->flags & MMC_DATA_WRITE)) { desc->des0 = desc_last->des0; desc->des2 = desc_last->des2; - desc->des1 = 0x8; /* Random dirty data for last one desc */ + desc->des1 = RV1106_RAMDON_DATA_SIZE; /* Random dirty data for last one desc */ desc_last = desc; } @@ -1447,13 +1448,6 @@ return; } - if (host->is_rv1106_sd) { - u32 reg; - - readl_poll_timeout(host->regs + SDMMC_STATUS, reg, - reg & BIT(2), USEC_PER_MSEC, 500 * USEC_PER_MSEC); - } - spin_lock_bh(&host->lock); if (host->is_rv1106_sd) @@ -1549,9 +1543,11 @@ slot->host->vqmmc_enabled = true; } +#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT_MMC /* Reset our state machine after powering on */ dw_mci_ctrl_reset(slot->host, SDMMC_CTRL_ALL_RESET_FLAGS); +#endif } /* Adjust clock / bus width after power is up */ @@ -1874,6 +1870,9 @@ WARN_ON(host->cmd || host->data); + if (host->need_xfer_timer) + del_timer(&host->xfer_timer); + host->slot->mrq = NULL; host->mrq = NULL; if (!list_empty(&host->queue)) { @@ -2019,8 +2018,10 @@ host->bus_hz); /* add a bit spare time */ - xfer_ms += 100; - + if (host->dir_status == DW_MCI_RECV_STATUS) + xfer_ms += 100; + else + xfer_ms += 2500; spin_lock_irqsave(&host->irq_lock, irqflags); if (!test_bit(EVENT_XFER_COMPLETE, &host->pending_events)) mod_timer(&host->xfer_timer, @@ -2155,6 +2156,13 @@ send_stop_abort(host, data); dw_mci_stop_dma(host); state = STATE_DATA_ERROR; + if (host->dir_status == DW_MCI_SEND_STATUS) { + data->bytes_xfered = 0; + data->error = -ETIMEDOUT; + host->data = NULL; + dw_mci_request_end(host, mrq); + goto unlock; + } break; } @@ -2166,8 +2174,7 @@ */ if (host->dir_status == DW_MCI_RECV_STATUS) dw_mci_set_drto(host); - if (host->need_xfer_timer && - host->dir_status == DW_MCI_RECV_STATUS) + if (host->need_xfer_timer) dw_mci_set_xfer_timeout(host); break; } @@ -2209,6 +2216,8 @@ */ if (host->dir_status == DW_MCI_RECV_STATUS) dw_mci_set_drto(host); + if (host->need_xfer_timer && host->dir_status == DW_MCI_SEND_STATUS) + dw_mci_set_xfer_timeout(host); break; } @@ -2225,8 +2234,19 @@ } /* stop command for open-ended transfer*/ - if (data->stop) + if (data->stop) { + if (host->is_rv1106_sd && (data->flags & MMC_DATA_WRITE)) { + int fifo_count; + + if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, fifo_count, + ((fifo_count >> 17) & 0x7FF) <= RV1106_RAMDON_DATA_SIZE / 4, + 0, 5000 * USEC_PER_MSEC)) + data->error = -ETIMEDOUT; + udelay(1); + dw_mci_reset(host); + } send_stop_abort(host, data); + } } else { /* * If we don't have a command complete now we'll @@ -2757,8 +2777,7 @@ del_timer(&host->cto_timer); mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); host->cmd_status = pending; - if ((host->need_xfer_timer) && - host->dir_status == DW_MCI_RECV_STATUS) + if (host->need_xfer_timer) del_timer(&host->xfer_timer); smp_wmb(); /* drain writebuffer */ set_bit(EVENT_CMD_COMPLETE, &host->pending_events); @@ -3663,7 +3682,7 @@ mci_writel(host, INTMASK, ret); } - if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) + if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); /* Force setup bus to guarantee available clock output */ -- Gitblit v1.6.2