From 1c055e55a242a33e574e48be530e06770a210dcd Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 19 Feb 2024 03:26:26 +0000
Subject: [PATCH] add r8169 read mac form eeprom
---
kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdpcm.h | 47 ++++++++++++++++++++++++++++++++++++-----------
1 files changed, 36 insertions(+), 11 deletions(-)
diff --git a/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdpcm.h b/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdpcm.h
index 56941c2..b0736c0 100644
--- a/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdpcm.h
+++ b/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdpcm.h
@@ -1,16 +1,17 @@
-/* SPDX-License-Identifier: GPL-2.0 */
/*
* Broadcom SDIO/PCMCIA
* Software-specific definitions shared between device and host side
*
- * Copyright (C) 1999-2019, Broadcom Corporation
- *
+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
+ *
+ * Copyright (C) 1999-2017, Broadcom Corporation
+ *
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2 (the "GPL"),
* available at http://www.broadcom.com/licenses/GPLv2.php, with the
* following added to such license:
- *
+ *
* As a special exception, the copyright holders of this software give you
* permission to link this software with independent modules, and to copy and
* distribute the resulting executable under terms of your choice, provided that
@@ -18,7 +19,7 @@
* the license of that module. An independent module is a module which is not
* derived from this software. The special exception does not apply to any
* modifications of the software.
- *
+ *
* Notwithstanding the above, under no circumstances may you combine this
* software in any way with any other Broadcom software provided under a license
* other than the GPL, without Broadcom's express prior written consent.
@@ -26,7 +27,7 @@
*
* <<Broadcom-WL-IPTag/Open:>>
*
- * $Id: bcmsdpcm.h 514727 2014-11-12 03:02:48Z $
+ * $Id$
*/
#ifndef _bcmsdpcm_h_
@@ -52,6 +53,16 @@
#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */
/* tosbmailboxdata */
+
+#ifdef DS_PROT
+/* Bit msgs for custom deep sleep protocol */
+#define SMB_DATA_D3INFORM 0x100 /* host announcing D3 entry */
+#define SMB_DATA_DSACK 0x200 /* host acking a deepsleep request */
+#define SMB_DATA_DSNACK 0x400 /* host nacking a deepsleep request */
+#endif /* DS_PROT */
+/* force a trap */
+#define SMB_DATA_TRAP 0x800 /* host forcing trap */
+
#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */
#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */
@@ -60,16 +71,16 @@
*/
/* intstatus bits */
+#define I_HMB_INT_ACK I_HMB_SW0 /* To Host Mailbox Dev Interrupt ACK */
#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */
#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */
#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */
#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */
-#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT)
+#define I_TOHOSTMAIL (I_HMB_INT_ACK | I_HMB_FRAME_IND | I_HMB_HOST_INT)
/* tohostmailbox bits corresponding to intstatus bits */
-#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */
-#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */
+#define HMB_INT_ACK (1 << 0) /* To Host Mailbox Dev Interrupt ACK */
#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */
#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */
#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */
@@ -80,6 +91,15 @@
#define HMB_DATA_FC 0x04 /* per prio flowcontrol update flag to host */
#define HMB_DATA_FWREADY 0x08 /* firmware is ready for protocol activity */
#define HMB_DATA_FWHALT 0x10 /* firmware has halted operation */
+
+#ifdef DS_PROT
+/* Bit msgs for custom deep sleep protocol */
+#define HMB_DATA_DSREQ 0x100 /* firmware requesting deepsleep entry */
+#define HMB_DATA_DSEXIT 0x200 /* firmware announcing deepsleep exit */
+#define HMB_DATA_D3ACK 0x400 /* firmware acking a D3 notice from host */
+#define HMB_DATA_D3EXIT 0x800 /* firmware announcing D3 exit */
+#define HMB_DATA_DSPROT_MASK 0xf00
+#endif /* DS_PROT */
#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */
#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */
@@ -114,7 +134,7 @@
/* Data Offset from SOF (HW Tag, SW Tag, Pad) */
#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
-#define SDPCM_DOFFSET_VALUE(p) (((uint8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
+#define SDPCM_DOFFSET_VALUE(p) (((uint8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
#define SDPCM_DOFFSET_MASK 0xff000000
#define SDPCM_DOFFSET_SHIFT 24
@@ -265,6 +285,7 @@
#define SDPCM_SHARED_IN_BRPT 0x0800
#define SDPCM_SHARED_SET_BRPT 0x1000
#define SDPCM_SHARED_PENDING_BRPT 0x2000
+#define SDPCM_SHARED_FATAL_LOGBUF_VALID 0x100000
typedef struct {
uint32 flags;
@@ -275,8 +296,12 @@
uint32 console_addr; /* Address of hnd_cons_t */
uint32 msgtrace_addr;
uint32 fwid;
+ uint32 device_fatal_logbuf_start;
+ uint32 debug_info_addr; /* Address of debug_info area */
} sdpcm_shared_t;
-extern sdpcm_shared_t sdpcm_shared;
+/* Device F/W provides the following access function:
+ * sdpcm_shared_t *hnd_get_sdpcm_shared(void);
+ */
#endif /* _bcmsdpcm_h_ */
--
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