From 1543e317f1da31b75942316931e8f491a8920811 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Thu, 04 Jan 2024 10:08:02 +0000
Subject: [PATCH] disable FB
---
kernel/drivers/video/rockchip/rga3/rga_policy.c | 122 ++++++++++++++++++++++++++++++++--------
1 files changed, 98 insertions(+), 24 deletions(-)
diff --git a/kernel/drivers/video/rockchip/rga3/rga_policy.c b/kernel/drivers/video/rockchip/rga3/rga_policy.c
index 4e26797..c87ce18 100644
--- a/kernel/drivers/video/rockchip/rga3/rga_policy.c
+++ b/kernel/drivers/video/rockchip/rga3/rga_policy.c
@@ -15,7 +15,7 @@
#define GET_GCD(n1, n2) \
({ \
int i; \
- int gcd = 0; \
+ int gcd = 1; \
for (i = 1; i <= (n1) && i <= (n2); i++) { \
if ((n1) % i == 0 && (n2) % i == 0) \
gcd = i; \
@@ -46,6 +46,53 @@
return feature;
}
+static bool rga_check_csc_constant(const struct rga_hw_data *data, struct rga_req *rga_base,
+ uint32_t mode, uint32_t flag)
+{
+ if (mode & flag)
+ return true;
+
+ if ((rga_base->full_csc.flag & 0x1) && (data->feature & RGA_FULL_CSC))
+ return true;
+
+ return false;
+}
+
+static bool rga_check_csc(const struct rga_hw_data *data, struct rga_req *rga_base)
+{
+ switch (rga_base->yuv2rgb_mode) {
+ case 0x1:
+ return rga_check_csc_constant(data, rga_base,
+ data->csc_y2r_mode, RGA_MODE_CSC_BT601L);
+ case 0x2:
+ return rga_check_csc_constant(data, rga_base,
+ data->csc_y2r_mode, RGA_MODE_CSC_BT601F);
+ case 0x3:
+ return rga_check_csc_constant(data, rga_base,
+ data->csc_y2r_mode, RGA_MODE_CSC_BT709);
+ case 0x1 << 2:
+ return rga_check_csc_constant(data, rga_base,
+ data->csc_r2y_mode, RGA_MODE_CSC_BT601F);
+ case 0x2 << 2:
+ return rga_check_csc_constant(data, rga_base,
+ data->csc_r2y_mode, RGA_MODE_CSC_BT601L);
+ case 0x3 << 2:
+ return rga_check_csc_constant(data, rga_base,
+ data->csc_r2y_mode, RGA_MODE_CSC_BT709);
+ default:
+ break;
+ }
+
+ if ((rga_base->full_csc.flag & 0x1)) {
+ if (data->feature & RGA_FULL_CSC)
+ return true;
+ else
+ return false;
+ }
+
+ return true;
+}
+
static bool rga_check_resolution(const struct rga_rect_range *range, int width, int height)
{
if (width > range->max.width || height > range->max.height)
@@ -61,32 +108,34 @@
int rd_mode, int format, int win_num)
{
int i;
- bool matched = false;
+ const uint32_t *formats;
+ uint32_t format_count;
- if (rd_mode == RGA_RASTER_MODE) {
- for (i = 0; i < data->win[win_num].num_of_raster_formats; i++) {
- if (format == data->win[win_num].raster_formats[i]) {
- matched = true;
- break;
- }
- }
- } else if (rd_mode == RGA_FBC_MODE) {
- for (i = 0; i < data->win[win_num].num_of_fbc_formats; i++) {
- if (format == data->win[win_num].fbc_formats[i]) {
- matched = true;
- break;
- }
- }
- } else if (rd_mode == RGA_TILE_MODE) {
- for (i = 0; i < data->win[win_num].num_of_tile_formats; i++) {
- if (format == data->win[win_num].tile_formats[i]) {
- matched = true;
- break;
- }
- }
+ switch (rd_mode) {
+ case RGA_RASTER_MODE:
+ formats = data->win[win_num].formats[RGA_RASTER_INDEX];
+ format_count = data->win[win_num].formats_count[RGA_RASTER_INDEX];
+ break;
+ case RGA_FBC_MODE:
+ formats = data->win[win_num].formats[RGA_AFBC16x16_INDEX];
+ format_count = data->win[win_num].formats_count[RGA_AFBC16x16_INDEX];
+ break;
+ case RGA_TILE_MODE:
+ formats = data->win[win_num].formats[RGA_TILE8x8_INDEX];
+ format_count = data->win[win_num].formats_count[RGA_TILE8x8_INDEX];
+ break;
+ default:
+ return false;
}
- return matched;
+ if (formats == NULL || format_count == 0)
+ return false;
+
+ for (i = 0; i < format_count; i++)
+ if (format == formats[i])
+ return true;
+
+ return false;
}
static bool rga_check_align(uint32_t byte_stride_align, uint32_t format, uint16_t w_stride)
@@ -118,6 +167,12 @@
if (!rga_check_resolution(&data->input_range, src0->act_w, src0->act_h))
return false;
+ if (data == &rga3_data &&
+ !rga_check_resolution(&data->input_range,
+ src0->act_w + src0->x_offset,
+ src0->act_h + src0->y_offset))
+ return false;
+
if (!rga_check_format(data, src0->rd_mode, src0->format, 0))
return false;
@@ -133,6 +188,12 @@
if (!rga_check_resolution(&data->input_range, src1->act_w, src1->act_h))
return false;
+ if (data == &rga3_data &&
+ !rga_check_resolution(&data->input_range,
+ src1->act_w + src1->x_offset,
+ src1->act_h + src1->y_offset))
+ return false;
+
if (!rga_check_format(data, src1->rd_mode, src1->format, 1))
return false;
@@ -146,6 +207,12 @@
struct rga_img_info_t *dst)
{
if (!rga_check_resolution(&data->output_range, dst->act_w, dst->act_h))
+ return false;
+
+ if (data == &rga3_data &&
+ !rga_check_resolution(&data->output_range,
+ dst->act_w + dst->x_offset,
+ dst->act_h + dst->y_offset))
return false;
if (!rga_check_format(data, dst->rd_mode, dst->format, 2))
@@ -306,6 +373,13 @@
continue;
}
+ if (!rga_check_csc(data, rga_base)) {
+ if (DEBUGGER_EN(MSG))
+ pr_info("core = %d, break on rga_check_csc",
+ scheduler->core);
+ continue;
+ }
+
optional_cores |= scheduler->core;
}
--
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