From 1543e317f1da31b75942316931e8f491a8920811 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Thu, 04 Jan 2024 10:08:02 +0000
Subject: [PATCH] disable FB
---
kernel/drivers/pci/controller/pcie-rockchip.c | 74 +++++++++++++++----------------------
1 files changed, 30 insertions(+), 44 deletions(-)
diff --git a/kernel/drivers/pci/controller/pcie-rockchip.c b/kernel/drivers/pci/controller/pcie-rockchip.c
index c4b0b79..064e54d 100644
--- a/kernel/drivers/pci/controller/pcie-rockchip.c
+++ b/kernel/drivers/pci/controller/pcie-rockchip.c
@@ -14,7 +14,8 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
-#include <linux/of_address.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
#include <linux/of_pci.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
@@ -28,8 +29,6 @@
struct device *dev = rockchip->dev;
struct platform_device *pdev = to_platform_device(dev);
struct device_node *node = dev->of_node;
- struct device_node *mem;
- struct resource reg;
struct resource *regs;
int err;
@@ -48,9 +47,8 @@
return -EINVAL;
}
- regs = platform_get_resource_byname(pdev, IORESOURCE_MEM,
- "apb-base");
- rockchip->apb_base = devm_ioremap_resource(dev, regs);
+ rockchip->apb_base =
+ devm_platform_ioremap_resource_byname(pdev, "apb-base");
if (IS_ERR(rockchip->apb_base))
return PTR_ERR(rockchip->apb_base);
@@ -86,7 +84,7 @@
}
rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev,
- "mgmt-sticky");
+ "mgmt-sticky");
if (IS_ERR(rockchip->mgmt_sticky_rst)) {
if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER)
dev_err(dev, "missing mgmt-sticky reset property in node\n");
@@ -122,11 +120,11 @@
}
if (rockchip->is_rc) {
- rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", GPIOD_OUT_HIGH);
- if (IS_ERR(rockchip->ep_gpio)) {
- dev_err(dev, "invalid ep-gpios property in node\n");
- return PTR_ERR(rockchip->ep_gpio);
- }
+ rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(rockchip->ep_gpio))
+ return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio),
+ "failed to get ep GPIO\n");
}
rockchip->aclk_pcie = devm_clk_get(dev, "aclk");
@@ -153,41 +151,15 @@
return PTR_ERR(rockchip->clk_pcie_pm);
}
- if (rockchip->is_rc) {
- mem = of_parse_phandle(node, "memory-region", 0);
- if (!mem) {
- dev_warn(dev, "missing \"memory-region\" property\n");
- return 0;
- }
-
- err = of_address_to_resource(mem, 0, ®);
- if (err < 0) {
- dev_warn(dev, "missing \"reg\" property\n");
- return 0;
- }
-
- rockchip->mem_reserve_start = reg.start;
- rockchip->mem_reserve_size = resource_size(®);
-
- err = of_property_read_u32(node, "rockchip,dma_trx_enabled",
- &rockchip->dma_trx_enabled);
- if (err < 0) {
- dev_warn(dev,
- "missing \"rockchip,dma_trx_enabled\" property\n");
- return 0;
- }
-
- err = of_property_read_u32(node, "rockchip,deferred",
- &rockchip->deferred);
- if (err < 0) {
- dev_warn(dev, "missing \"rockchip,deferred\" property\n");
- return 0;
- }
- }
-
return 0;
}
EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
+
+#define rockchip_pcie_read_addr(addr) rockchip_pcie_read(rockchip, addr)
+/* 100 ms max wait time for PHY PLLs to lock */
+#define RK_PHY_PLL_LOCK_TIMEOUT_US 100000
+/* Sleep should be less than 20ms */
+#define RK_PHY_PLL_LOCK_SLEEP_US 1000
int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
{
@@ -288,6 +260,16 @@
dev_err(dev, "power on phy%d err %d\n", i, err);
goto err_power_off_phy;
}
+ }
+
+ err = readx_poll_timeout(rockchip_pcie_read_addr,
+ PCIE_CLIENT_SIDE_BAND_STATUS,
+ regs, !(regs & PCIE_CLIENT_PHY_ST),
+ RK_PHY_PLL_LOCK_SLEEP_US,
+ RK_PHY_PLL_LOCK_TIMEOUT_US);
+ if (err) {
+ dev_err(dev, "PHY PLLs could not lock, %d\n", err);
+ goto err_power_off_phy;
}
/*
@@ -457,3 +439,7 @@
rockchip_pcie_write(rockchip, 0x0, PCIE_CORE_OB_REGION_DESC1);
}
EXPORT_SYMBOL_GPL(rockchip_pcie_cfg_configuration_accesses);
+
+MODULE_AUTHOR("Rockchip Inc");
+MODULE_DESCRIPTION("Rockchip AXI PCIe driver");
+MODULE_LICENSE("GPL v2");
--
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