From 1543e317f1da31b75942316931e8f491a8920811 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Thu, 04 Jan 2024 10:08:02 +0000
Subject: [PATCH] disable FB
---
kernel/drivers/media/platform/rockchip/cif/hw.h | 116 ++++++++++++++++++++++++++++++++++++++--------------------
1 files changed, 76 insertions(+), 40 deletions(-)
diff --git a/kernel/drivers/media/platform/rockchip/cif/hw.h b/kernel/drivers/media/platform/rockchip/cif/hw.h
index 18b663a..4faa9c4 100644
--- a/kernel/drivers/media/platform/rockchip/cif/hw.h
+++ b/kernel/drivers/media/platform/rockchip/cif/hw.h
@@ -18,11 +18,14 @@
#include <linux/rk-camera-module.h>
#include "regs.h"
#include "version.h"
+#include "dev.h"
-#define RKCIF_DEV_MAX 2
+#define RKCIF_DEV_MAX 7
#define RKCIF_HW_DRIVER_NAME "rkcifhw"
-#define RKCIF_MAX_BUS_CLK 8
+#define RKCIF_MAX_BUS_CLK 15
#define RKCIF_MAX_RESET 15
+
+#define RKCIF_MAX_GROUP 4
#define write_cif_reg(base, addr, val) \
writel(val, (addr) + (base))
@@ -32,6 +35,58 @@
writel(readl((addr) + (base)) | (val), (addr) + (base))
#define write_cif_reg_and(base, addr, val) \
writel(readl((addr) + (base)) & (val), (addr) + (base))
+
+/*
+ * multi sensor sync mode
+ * RKCIF_NOSYNC_MODE: not used sync mode
+ * RKCIF_MASTER_MASTER: internal master->external master
+ * RKCIF_MASTER_SLAVE: internal master->slave
+ * RKCIF_MASTER_MASTER: pwm/gpio->external master
+ * RKCIF_MASTER_MASTER: pwm/gpio->slave
+ */
+enum rkcif_sync_mode {
+ RKCIF_NOSYNC_MODE,
+ RKCIF_MASTER_MASTER,
+ RKCIF_MASTER_SLAVE,
+ RKCIF_EXT_MASTER,
+ RKCIF_EXT_SLAVE,
+};
+
+struct rkcif_sync_dev {
+ struct rkcif_device *cif_dev[RKCIF_DEV_MAX];
+ int count;
+ bool is_streaming[RKCIF_DEV_MAX];
+};
+
+struct rkcif_multi_sync_config {
+ struct rkcif_sync_dev int_master;
+ struct rkcif_sync_dev ext_master;
+ struct rkcif_sync_dev slave;
+ enum rkcif_sync_mode mode;
+ int dev_cnt;
+ int streaming_cnt;
+ u32 sync_code;
+ u32 sync_mask;
+ u32 update_code;
+ u32 update_cache;
+ u32 frame_idx;
+ bool is_attach;
+};
+
+struct rkcif_dummy_buffer {
+ struct list_head list;
+ struct dma_buf *dbuf;
+ dma_addr_t dma_addr;
+ struct page **pages;
+ void *mem_priv;
+ void *vaddr;
+ u32 size;
+ int dma_fd;
+ bool is_need_vaddr;
+ bool is_need_dbuf;
+ bool is_need_dmafd;
+ bool is_free;
+};
/*
* add new chip id in tail in time order
@@ -47,6 +102,9 @@
CHIP_RV1126_CIF,
CHIP_RV1126_CIF_LITE,
CHIP_RK3568_CIF,
+ CHIP_RK3588_CIF,
+ CHIP_RV1106_CIF,
+ CHIP_RK3562_CIF,
};
struct rkcif_hw_match_data {
@@ -56,35 +114,6 @@
int clks_num;
int rsts_num;
const struct cif_reg *cif_regs;
-};
-
-/*
- * the detecting mode of cif reset timer
- * related with dts property:rockchip,cif-monitor
- */
-enum rkcif_monitor_mode {
- RKCIF_MONITOR_MODE_IDLE = 0x0,
- RKCIF_MONITOR_MODE_CONTINUE,
- RKCIF_MONITOR_MODE_TRIGGER,
- RKCIF_MONITOR_MODE_HOTPLUG,
-};
-
-struct rkcif_hw_timer {
- struct timer_list timer;
- spinlock_t timer_lock;
- unsigned long cycle_jif;
- /* unit: us */
- unsigned int run_cnt;
- unsigned int max_run_cnt;
- unsigned int stop_index_of_run_cnt;
- unsigned int monitor_cycle;
- unsigned int err_ref_cnt;
- unsigned int err_time_interval;
- unsigned int is_reset_by_user;
- bool is_running;
- bool has_been_init;
- enum rkcif_monitor_mode monitor_mode;
- enum rkmodule_reset_src reset_src;
};
/*
@@ -101,25 +130,32 @@
struct regmap *grf;
struct clk *clks[RKCIF_MAX_BUS_CLK];
int clk_size;
- bool iommu_en;
struct iommu_domain *domain;
struct reset_control *cif_rst[RKCIF_MAX_RESET];
int chip_id;
const struct cif_reg *cif_regs;
- bool can_be_reset;
-
- struct rkcif_device *cif_dev[RKCIF_DEV_MAX];
- int dev_num;
-
- atomic_t power_cnt;
+ const struct vb2_mem_ops *mem_ops;
+ struct rkcif_device *cif_dev[RKCIF_DEV_MAX];
+ int dev_num;
+ atomic_t power_cnt;
const struct rkcif_hw_match_data *match_data;
struct mutex dev_lock;
- struct rkcif_hw_timer hw_timer;
- struct rkcif_reset_info reset_info;
+ struct rkcif_multi_sync_config sync_config[RKCIF_MAX_GROUP];
+ spinlock_t group_lock;
+ struct notifier_block reset_notifier; /* reset for mipi csi crc err */
+ struct rkcif_dummy_buffer dummy_buf;
+ bool iommu_en;
+ bool can_be_reset;
+ bool is_dma_sg_ops;
+ bool is_dma_contig;
+ bool adapt_to_usbcamerahal;
+ u64 irq_time;
+ bool is_rk3588s2;
};
void rkcif_hw_soft_reset(struct rkcif_hw *cif_hw, bool is_rst_iommu);
void rkcif_disable_sys_clk(struct rkcif_hw *cif_hw);
int rkcif_enable_sys_clk(struct rkcif_hw *cif_hw);
+int rk_cif_plat_drv_init(void);
#endif
--
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