From 10ebd8556b7990499c896a550e3d416b444211e6 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 02:23:07 +0000
Subject: [PATCH] add led
---
kernel/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 12 +++++++-----
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/kernel/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index d4ad19a..7a4614e 100644
--- a/kernel/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/kernel/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
- * (C) Copyright 2017 - 2018, Xilinx, Inc.
+ * (C) Copyright 2017 - 2019, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@ -10,7 +10,7 @@
/dts-v1/;
#include "zynqmp.dtsi"
-#include "zynqmp-clk.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -50,11 +50,12 @@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@c {
+ phy0: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
+ ti,dp83867-rxctrl-strap-quirk;
};
};
@@ -117,9 +118,9 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
- tca6416_u97: gpio@21 {
+ tca6416_u97: gpio@20 {
compatible = "ti,tca6416";
- reg = <0x21>;
+ reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
/*
@@ -188,6 +189,7 @@
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
+ dr_mode = "host";
};
&watchdog0 {
--
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