From 10ebd8556b7990499c896a550e3d416b444211e6 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 02:23:07 +0000
Subject: [PATCH] add led
---
kernel/arch/arm64/boot/dts/rockchip/rk3568-evb5-ddr4-v10.dtsi | 16 +++++++++++++---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb5-ddr4-v10.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb5-ddr4-v10.dtsi
index 22617ca..beba4ab 100644
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb5-ddr4-v10.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb5-ddr4-v10.dtsi
@@ -95,8 +95,12 @@
status = "okay";
};
-&combphy2_psq {
+&combphy1_usq {
rockchip,sgmii-mac-sel = <0>;
+ status = "okay";
+};
+
+&combphy2_psq {
status = "okay";
};
@@ -219,7 +223,7 @@
pinctrl-0 = <&gmac0_miim>;
power-domains = <&power RK3568_PD_PIPE>;
- phys = <&combphy2_psq PHY_TYPE_SGMII>;
+ phys = <&combphy1_usq PHY_TYPE_SGMII>;
phy-handle = <&sgmii_phy>;
status = "okay";
@@ -300,6 +304,7 @@
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&cif_clk>;
+ power-domains = <&power RK3568_PD_VI>;
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
rockchip,grf = <&grf>;
@@ -482,9 +487,14 @@
connect = <&vp1_out_dsi0>;
};
+&sata2 {
+ status = "okay";
+};
+
&sdmmc2 {
max-frequency = <150000000>;
- supports-sdio;
+ no-sd;
+ no-mmc;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
--
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