From 10ebd8556b7990499c896a550e3d416b444211e6 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 02:23:07 +0000
Subject: [PATCH] add led

---
 kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi |   63 ++++++++++++++++++++-----------
 1 files changed, 40 insertions(+), 23 deletions(-)

diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index adf9222..68f2544 100644
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -452,21 +452,17 @@
 		compatible = "rockchip,mpp-service";
 		rockchip,taskqueue-count = <5>;
 		rockchip,resetgroup-count = <5>;
-		rockchip,grf = <&grf>;
-		rockchip,grf-mem-offset = <0x20010>, <0x40034>, <0x40034>,
-					  <0x600e0>, <0x600e0>;
-		rockchip,grf-mem-on-values =  <0x00000021>, <0x0f040000>, <0x0f040000>,
-					      <0xf0040000>, <0xf0040000>;
-		rockchip,grf-mem-off-values = <0xffff0021>, <0x0f040f04>, <0x0f040f04>,
-					      <0xf004f004>, <0xf004f004>;
-		rockchip,grf-names = "grf_rkvenc2", "grf_vdpu1", "grf_vdpu2",
-				     "grf_iep2", "grf_vdpp";
 		status = "disabled";
 	};
 
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
+	};
+
+	rkvtunnel: rkvtunnel {
+		compatible = "rockchip,video-tunnel";
+		status = "disabled";
 	};
 
 	rockchip_suspend: rockchip-suspend {
@@ -494,6 +490,12 @@
 		rockchip,temp-hysteresis = <5000>; /* millicelsius */
 		rockchip,offline-cpu-temp = <105000>; /* millicelsius */
 		rockchip,temp-offline-cpus = "2-3";
+	};
+
+	secure_otp: secure-otp {
+		compatible = "rockchip,secure-otp";
+		rockchip,otp-size = <32>;
+		status = "disabled";
 	};
 
 	thermal_zones: thermal-zones {
@@ -645,12 +647,14 @@
 			resets = <&cru SRST_ARESETN_USB3OTG>;
 			reset-names = "usb3-otg";
 			snps,dis_enblslpm_quirk;
-			snps,dis-u1u2-quirk;
+			snps,dis-u1-entry-quirk;
+			snps,dis-u2-entry-quirk;
 			snps,dis-u2-freeclk-exists-quirk;
 			snps,dis-del-phy-power-chg-quirk;
 			snps,dis-tx-ipgap-linecheck-quirk;
-			snps,xhci-trb-ent-quirk;
 			snps,dis_rxdet_inp3_quirk;
+			snps,parkmode-disable-hs-quirk;
+			snps,parkmode-disable-ss-quirk;
 			quirk-skip-phy-init;
 			status = "disabled";
 		};
@@ -810,7 +814,6 @@
 	qos_vdpp: qos@ff270480 {
 		compatible = "syscon";
 		reg = <0x0 0xff270480 0x0 0x20>;
-		priority-init = <0x202>;
 	};
 
 	qos_vop: qos@ff270500 {
@@ -987,7 +990,6 @@
 			};
 			pd_vo@RK3528_PD_VO {
 				reg = <RK3528_PD_VO>;
-				pm_qos = <&qos_vdpp>;
 			};
 			pd_vpu@RK3528_PD_VPU {
 				reg = <RK3528_PD_VPU>;
@@ -1195,7 +1197,6 @@
 		clock-names = "aclk", "iface", "clk_hevc_cabac";
 		#iommu-cells = <0>;
 		rockchip,shootdown-entire;
-		rockchip,master-handle-irq;
 		status = "disabled";
 	};
 
@@ -1214,6 +1215,9 @@
 		assigned-clock-rates = <300000000>, <300000000>;
 		iommus = <&rkvenc_mmu>;
 		rockchip,srv = <&mpp_srv>;
+		rockchip,grf = <&grf>;
+		rockchip,grf-mem-offset = <0x20010>;
+		rockchip,grf-mem-values = <0x00000021>, <0xffff0021>;
 		rockchip,taskqueue-node = <1>;
 		rockchip,resetgroup-node = <1>;
 		status = "disabled";
@@ -1245,6 +1249,9 @@
 		reset-names = "shared_video_a", "shared_video_h";
 		iommus = <&vdpu_mmu>;
 		rockchip,srv = <&mpp_srv>;
+		rockchip,grf = <&grf>;
+		rockchip,grf-mem-offset = <0x40034>;
+		rockchip,grf-mem-values = <0x0f040000>, <0x0f040f04>;
 		rockchip,taskqueue-node = <2>;
 		rockchip,resetgroup-node = <2>;
 		rockchip,disable-auto-freq;
@@ -1400,7 +1407,6 @@
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
 		rockchip,shootdown-entire;
-		rockchip,disable-mmu-reset;
 		status = "disabled";
 	};
 
@@ -1418,6 +1424,9 @@
 			 <&cru SRST_RESETN_CORE_VDPP>;
 		reset-names = "shared_rst_a", "shared_rst_h", "shared_rst_s";
 		rockchip,srv = <&mpp_srv>;
+		rockchip,grf = <&grf>;
+		rockchip,grf-mem-offset = <0x600e0>;
+		rockchip,grf-mem-values = <0xf0040000>, <0xf004f004>;
 		rockchip,taskqueue-node = <3>;
 		rockchip,resetgroup-node = <3>;
 		rockchip,disable-auto-freq;
@@ -1522,14 +1531,13 @@
 			 <&cru CLK_SFR_HDMI>,
 			 <&cru CLK_CEC_HDMI>,
 			 <&inno_hdmiphy_clk>;
-		clock-names = "iahb", "isfr", "cec", "dclk_vop";
+		clock-names = "iahb", "isfr", "cec", "dclk_vp0";
 		ddc-i2c-scl-high-time-ns = <9625>;
 		ddc-i2c-scl-low-time-ns = <10000>;
 		reg-io-width = <4>;
 		rockchip,grf = <&grf>;
-		pinctrl-names = "default", "idle";
+		pinctrl-names = "default";
 		pinctrl-0 = <&hdmi_pins>;
-		pinctrl-1 = <&hdmi_pins_idle>;
 		phys = <&hdmiphy>;
 		phy-names = "hdmi";
 		#sound-dai-cells = <0>;
@@ -1794,6 +1802,7 @@
 	pwm0: pwm@ffa90000 {
 		compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xffa90000 0x0 0x10>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0m0_pins>;
@@ -1805,6 +1814,7 @@
 	pwm1: pwm@ffa90010 {
 		compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xffa90010 0x0 0x10>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1m0_pins>;
@@ -1816,6 +1826,7 @@
 	pwm2: pwm@ffa90020 {
 		compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xffa90020 0x0 0x10>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2m0_pins>;
@@ -1840,6 +1851,7 @@
 	pwm4: pwm@ffa98000 {
 		compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xffa98000 0x0 0x10>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm4m0_pins>;
@@ -1851,6 +1863,7 @@
 	pwm5: pwm@ffa98010 {
 		compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xffa98010 0x0 0x10>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm5m0_pins>;
@@ -1862,6 +1875,7 @@
 	pwm6: pwm@ffa98020 {
 		compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xffa98020 0x0 0x10>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm6m0_pins>;
@@ -1896,8 +1910,6 @@
 		reg = <0x0 0xffac0000 0x0 0x100>;
 		clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
 		clock-names = "tclk", "pclk";
-		resets = <&cru SRST_PRESETN_WDT_NS>;
-		reset-names = "reset";
 		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
 	};
@@ -1917,6 +1929,8 @@
 		rockchip,hw-tshut-temp = <120000>;
 		rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
 		rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+		nvmem-cells = <&cpu_tsadc_trim_l>, <&cpu_tsadc_trim_h>;
+		nvmem-cell-names = "trim_l", "trim_h";
 		status = "disabled";
 	};
 
@@ -1938,13 +1952,10 @@
 		interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru MCLK_SAI_I2S3>, <&cru HCLK_SAI_I2S3>;
 		clock-names = "mclk", "hclk";
-		assigned-clocks = <&cru MCLK_SAI_I2S3>;
-		assigned-clock-rates = <6144000>;
 		dmas = <&dmac 5>;
 		dma-names = "tx";
 		resets = <&cru SRST_MRESETN_SAI_I2S3>, <&cru SRST_HRESETN_SAI_I2S3>;
 		reset-names = "m", "h";
-		rockchip,always-on;
 		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
@@ -2320,6 +2331,12 @@
 		dmc_opp_info: dmc-opp-info@3e {
 			reg = <0x3e 0x6>;
 		};
+		cpu_tsadc_trim_l: cpu-tsadc-trim-l@44 {
+			reg = <0x44 0x1>;
+		};
+		cpu_tsadc_trim_h: cpu-tsadc-trim-h@45 {
+			reg = <0x45 0x1>;
+		};
 	};
 
 	dmac: dma-controller@ffd60000 {

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