From 102a0743326a03cd1a1202ceda21e175b7d3575c Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Tue, 20 Feb 2024 01:20:52 +0000 Subject: [PATCH] add new system file --- kernel/drivers/tty/hvc/Kconfig | 58 ++++++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 38 insertions(+), 20 deletions(-) diff --git a/kernel/drivers/tty/hvc/Kconfig b/kernel/drivers/tty/hvc/Kconfig index 4293c17..ee2eba4 100644 --- a/kernel/drivers/tty/hvc/Kconfig +++ b/kernel/drivers/tty/hvc/Kconfig @@ -1,4 +1,4 @@ -if TTY +# SPDX-License-Identifier: GPL-2.0 config HVC_DRIVER bool @@ -24,7 +24,6 @@ config HVC_OLD_HVSI bool "Old driver for pSeries serial port (/dev/hvsi*)" depends on HVC_CONSOLE - default n config HVC_OPAL bool "OPAL Console support" @@ -70,27 +69,48 @@ Xen driver for secondary virtual consoles config HVC_UDBG - bool "udbg based fake hypervisor console" - depends on PPC - select HVC_DRIVER - default n - help - This is meant to be used during HW bring up or debugging when - no other console mechanism exist but udbg, to get you a quick - console for userspace. Do NOT enable in production kernels. + bool "udbg based fake hypervisor console" + depends on PPC + select HVC_DRIVER + help + This is meant to be used during HW bring up or debugging when + no other console mechanism exist but udbg, to get you a quick + console for userspace. Do NOT enable in production kernels. config HVC_DCC - bool "ARM JTAG DCC console" - depends on ARM || ARM64 - select HVC_DRIVER - help - This console uses the JTAG DCC on ARM to create a console under the HVC - driver. This console is used through a JTAG only on ARM. If you don't have - a JTAG then you probably don't want this option. + bool "ARM JTAG DCC console" + depends on ARM || ARM64 + select HVC_DRIVER + select SERIAL_CORE_CONSOLE + help + This console uses the JTAG DCC on ARM to create a console under the HVC + driver. This console is used through a JTAG only on ARM. If you don't have + a JTAG then you probably don't want this option. + +config HVC_DCC_SERIALIZE_SMP + bool "Use DCC only on core 0" + depends on SMP && HVC_DCC + help + Some debuggers, such as Trace32 from Lauterbach GmbH, do not handle + reads/writes from/to DCC on more than one core. Each core has its + own DCC device registers, so when a core reads or writes from/to DCC, + it only accesses its own DCC device. Since kernel code can run on + any core, every time the kernel wants to write to the console, it + might write to a different DCC. + + In SMP mode, Trace32 only uses the DCC on core 0. In AMP mode, it + creates multiple windows, and each window shows the DCC output + only from that core's DCC. The result is that console output is + either lost or scattered across windows. + + Selecting this option will enable code that serializes all console + input and output to core 0. The DCC driver will create input and + output FIFOs that all cores will use. Reads and writes from/to DCC + are handled by a workqueue that runs only core 0. config HVC_RISCV_SBI bool "RISC-V SBI console support" - depends on RISCV + depends on RISCV_SBI_V01 select HVC_DRIVER help This enables support for console output via RISC-V SBI calls, which @@ -114,5 +134,3 @@ will depend on arch specific APIs exported from hvcserver.ko which will also be compiled when this driver is built as a module. - -endif # TTY -- Gitblit v1.6.2