From 102a0743326a03cd1a1202ceda21e175b7d3575c Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 20 Feb 2024 01:20:52 +0000
Subject: [PATCH] add new system file
---
kernel/drivers/rkflash/sfc_nand.c | 49 ++++++++++++++++++++++---------------------------
1 files changed, 22 insertions(+), 27 deletions(-)
diff --git a/kernel/drivers/rkflash/sfc_nand.c b/kernel/drivers/rkflash/sfc_nand.c
index 81f58c9..4accf3d 100644
--- a/kernel/drivers/rkflash/sfc_nand.c
+++ b/kernel/drivers/rkflash/sfc_nand.c
@@ -112,11 +112,7 @@
/* HYF2GQ4UHCCAE */
{ 0xC9, 0x5A, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
/* HYF4GQ4UAACBE */
- { 0xC9, 0xD4, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0xE, 1, { 0x20, 0x40, 0x24, 0x44 }, &sfc_nand_get_ecc_status0 },
- /* HYF2GQ4IAACAE */
- { 0xC9, 0x82, 0x00, 4, 0x40, 1, 2048, 0x4C, 20, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
- /* HYF1GQ4IDACAE */
- { 0xC9, 0x81, 0x00, 4, 0x40, 1, 1024, 0x4C, 20, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+ { 0xC9, 0xD4, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x4, 1, { 0x20, 0x40, 0x24, 0x44 }, &sfc_nand_get_ecc_status0 },
/* FS35ND01G-S1 */
{ 0xCD, 0xB1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
@@ -153,10 +149,6 @@
{ 0xE5, 0xF4, 0x00, 4, 0x40, 2, 2048, 0x0C, 20, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
/* DS35M1GB-IB */
{ 0xE5, 0xA1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
- /* DS35Q12B-IB */
- { 0xE5, 0xF5, 0x00, 4, 0x40, 1, 512, 0x0C, 17, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
- /* DS35M12B-IB */
- { 0xE5, 0xA5, 0x00, 4, 0x40, 1, 512, 0x0C, 17, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
/* EM73C044VCC-H */
{ 0xD5, 0x22, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
@@ -214,16 +206,10 @@
{ 0xEA, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
/* TX25G01 */
{ 0xA1, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
- /* ANV1GCP0CLG, HYF1GQ4UTXCAE */
- { 0x01, 0x15, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status9 },
- /* S35ML02G3, ANV1GCP0CLG */
- { 0x01, 0x25, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x4, 0, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
+ /* S35ML02G3 */
+ { 0x01, 0x25, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x4, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
/* S35ML04G3 */
- { 0x01, 0x35, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 0, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
- /* GSS01GSAK1 */
- { 0x52, 0xBA, 0x13, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
- /* GSS02GSAK1 */
- { 0x52, 0xBA, 0x23, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+ { 0x01, 0x35, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
};
static struct nand_info *p_nand_info;
@@ -325,7 +311,7 @@
return ret;
}
-static int sfc_nand_wait_busy(u8 *data, int timeout)
+static int sfc_nand_wait_busy_sleep(u8 *data, int timeout, int sleep_us)
{
int ret;
int i;
@@ -333,7 +319,9 @@
*data = 0;
- for (i = 0; i < timeout; i++) {
+ for (i = 0; i < timeout; i += sleep_us) {
+ usleep_range(sleep_us, sleep_us + 50);
+
ret = sfc_nand_read_feature(0xC0, &status);
if (ret != SFC_OK)
@@ -343,8 +331,6 @@
if (!(status & (1 << 0)))
return SFC_OK;
-
- sfc_delay(1);
}
return SFC_NAND_WAIT_TIME_OUT;
@@ -808,7 +794,7 @@
if (ret != SFC_OK)
return ret;
- ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+ ret = sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 1000);
if (status & (1 << 2))
return SFC_NAND_PROG_ERASE_ERROR;
@@ -865,6 +851,7 @@
op.sfctrl.d32 = 0;
op.sfctrl.b.datalines = sfc_nand_dev.prog_lines;
op.sfctrl.b.addrbits = 16;
+ op.sfctrl.b.enbledma = 0;
plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
sfc_request(&op, plane, p_page_buf, page_size);
@@ -877,7 +864,7 @@
if (p_nand_info->id0 == MID_GIGADEV) {
sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size)) {
- rkflash_print_error("%s %x cache bitflip\n", __func__, addr);
+ rkflash_print_error("%s cache bitflip1\n", __func__);
msleep(1000);
sfc_request(&op, plane, p_page_buf, page_size);
}
@@ -894,7 +881,8 @@
if (ret != SFC_OK)
return ret;
- ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+ ret = sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 200);
+
if (status & (1 << 3))
return SFC_NAND_PROG_ERASE_ERROR;
@@ -945,9 +933,9 @@
sfc_get_version() < SFC_VER_3)
sfc_nand_rw_preset();
- sfc_nand_wait_busy(&status, 1000 * 1000);
+ sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 50);
if (sfc_nand_dev.manufacturer == 0x01 && status)
- sfc_nand_wait_busy(&status, 1000 * 1000);
+ sfc_nand_wait_busy_sleep(&status, 1000 * 1000, 50);
ecc_result = p_nand_info->ecc_status();
@@ -959,6 +947,7 @@
op.sfctrl.d32 = 0;
op.sfctrl.b.datalines = sfc_nand_dev.read_lines;
op.sfctrl.b.addrbits = 16;
+ op.sfctrl.b.enbledma = 0;
plane = p_nand_info->plane_per_die == 2 ? ((row >> 6) & 0x1) << 12 : 0;
ret = sfc_request(&op, plane | column, p_page_buf, len);
@@ -983,7 +972,9 @@
u32 sec_per_page = p_nand_info->sec_per_page;
u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
struct nand_mega_area *meta = &p_nand_info->meta;
+ int retries = 0;
+retry:
ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
memcpy(p_data, gp_page_buf, data_size);
p_spare[0] = gp_page_buf[(data_size + meta->off0) / 4];
@@ -1005,6 +996,10 @@
if (p_spare)
rkflash_print_hex("spare:", p_spare, 4, 2);
+ if (ret == SFC_NAND_ECC_ERROR && retries < 1) {
+ retries++;
+ goto retry;
+ }
}
return ret;
--
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