From 08f87f769b595151be1afeff53e144f543faa614 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 06 Dec 2023 09:51:13 +0000
Subject: [PATCH] add dts config
---
kernel/drivers/gpu/arm/bifrost/mali_kbase_debug_mem_view.c | 139 +++++++++++++++++++++++++++++++++++++++-------
1 files changed, 117 insertions(+), 22 deletions(-)
diff --git a/kernel/drivers/gpu/arm/bifrost/mali_kbase_debug_mem_view.c b/kernel/drivers/gpu/arm/bifrost/mali_kbase_debug_mem_view.c
index 5a99b5e..ce87a00 100644
--- a/kernel/drivers/gpu/arm/bifrost/mali_kbase_debug_mem_view.c
+++ b/kernel/drivers/gpu/arm/bifrost/mali_kbase_debug_mem_view.c
@@ -31,6 +31,22 @@
#if IS_ENABLED(CONFIG_DEBUG_FS)
+#define SHOW_GPU_MEM_DATA(type, format) \
+{ \
+ unsigned int i, j; \
+ const type *ptr = (type *)cpu_addr; \
+ const unsigned int col_width = sizeof(type); \
+ const unsigned int row_width = (col_width == sizeof(u64)) ? 32 : 16; \
+ const unsigned int num_cols = row_width / col_width; \
+ for (i = 0; i < PAGE_SIZE; i += row_width) { \
+ seq_printf(m, "%016llx:", gpu_addr + i); \
+ for (j = 0; j < num_cols; j++) \
+ seq_printf(m, format, ptr[j]); \
+ ptr += num_cols; \
+ seq_putc(m, '\n'); \
+ } \
+}
+
struct debug_mem_mapping {
struct list_head node;
@@ -44,6 +60,7 @@
struct debug_mem_data {
struct list_head mapping_list;
struct kbase_context *kctx;
+ unsigned int column_width;
};
struct debug_mem_seq_off {
@@ -111,9 +128,9 @@
struct debug_mem_data *mem_data = m->private;
struct debug_mem_seq_off *data = v;
struct debug_mem_mapping *map;
- int i, j;
+ unsigned long long gpu_addr;
struct page *page;
- uint32_t *mapping;
+ void *cpu_addr;
pgprot_t prot = PAGE_KERNEL;
map = list_entry(data->lh, struct debug_mem_mapping, node);
@@ -130,20 +147,33 @@
prot = pgprot_writecombine(prot);
page = as_page(map->alloc->pages[data->offset]);
- mapping = vmap(&page, 1, VM_MAP, prot);
- if (!mapping)
+ cpu_addr = vmap(&page, 1, VM_MAP, prot);
+ if (!cpu_addr)
goto out;
- for (i = 0; i < PAGE_SIZE; i += 4*sizeof(*mapping)) {
- seq_printf(m, "%016llx:", i + ((map->start_pfn +
- data->offset) << PAGE_SHIFT));
+ gpu_addr = (map->start_pfn + data->offset) << PAGE_SHIFT;
- for (j = 0; j < 4*sizeof(*mapping); j += sizeof(*mapping))
- seq_printf(m, " %08x", mapping[(i+j)/sizeof(*mapping)]);
- seq_putc(m, '\n');
+ /* Cases for 4 supported values of column_width for showing
+ * the GPU memory contents.
+ */
+ switch (mem_data->column_width) {
+ case 1:
+ SHOW_GPU_MEM_DATA(u8, " %02hhx");
+ break;
+ case 2:
+ SHOW_GPU_MEM_DATA(u16, " %04hx");
+ break;
+ case 4:
+ SHOW_GPU_MEM_DATA(u32, " %08x");
+ break;
+ case 8:
+ SHOW_GPU_MEM_DATA(u64, " %016llx");
+ break;
+ default:
+ dev_warn(mem_data->kctx->kbdev->dev, "Unexpected column width");
}
- vunmap(mapping);
+ vunmap(cpu_addr);
seq_putc(m, '\n');
@@ -207,6 +237,14 @@
if (get_file_rcu(kctx->filp) == 0)
return -ENOENT;
+ /* Check if file was opened in write mode. GPU memory contents
+ * are returned only when the file is not opened in write mode.
+ */
+ if (file->f_mode & FMODE_WRITE) {
+ file->private_data = kctx;
+ return 0;
+ }
+
ret = seq_open(file, &ops);
if (ret)
goto open_fail;
@@ -222,6 +260,8 @@
INIT_LIST_HEAD(&mem_data->mapping_list);
kbase_gpu_vm_lock(kctx);
+
+ mem_data->column_width = kctx->mem_view_column_width;
ret = debug_mem_zone_open(&kctx->reg_rbtree_same, mem_data);
if (ret != 0) {
@@ -240,6 +280,20 @@
kbase_gpu_vm_unlock(kctx);
goto out;
}
+
+#if MALI_USE_CSF
+ ret = debug_mem_zone_open(&kctx->reg_rbtree_exec_fixed, mem_data);
+ if (ret != 0) {
+ kbase_gpu_vm_unlock(kctx);
+ goto out;
+ }
+
+ ret = debug_mem_zone_open(&kctx->reg_rbtree_fixed, mem_data);
+ if (ret != 0) {
+ kbase_gpu_vm_unlock(kctx);
+ goto out;
+ }
+#endif
kbase_gpu_vm_unlock(kctx);
@@ -270,25 +324,62 @@
static int debug_mem_release(struct inode *inode, struct file *file)
{
struct kbase_context *const kctx = inode->i_private;
- struct seq_file *sfile = file->private_data;
- struct debug_mem_data *mem_data = sfile->private;
- struct debug_mem_mapping *mapping;
- seq_release(inode, file);
+ /* If the file wasn't opened in write mode, then release the
+ * memory allocated to show the GPU memory contents.
+ */
+ if (!(file->f_mode & FMODE_WRITE)) {
+ struct seq_file *sfile = file->private_data;
+ struct debug_mem_data *mem_data = sfile->private;
+ struct debug_mem_mapping *mapping;
- while (!list_empty(&mem_data->mapping_list)) {
- mapping = list_first_entry(&mem_data->mapping_list,
+ seq_release(inode, file);
+
+ while (!list_empty(&mem_data->mapping_list)) {
+ mapping = list_first_entry(&mem_data->mapping_list,
struct debug_mem_mapping, node);
- kbase_mem_phy_alloc_put(mapping->alloc);
- list_del(&mapping->node);
- kfree(mapping);
- }
+ kbase_mem_phy_alloc_put(mapping->alloc);
+ list_del(&mapping->node);
+ kfree(mapping);
+ }
- kfree(mem_data);
+ kfree(mem_data);
+ }
fput(kctx->filp);
return 0;
+}
+
+static ssize_t debug_mem_write(struct file *file, const char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ struct kbase_context *const kctx = file->private_data;
+ unsigned int column_width = 0;
+ int ret = 0;
+
+ CSTD_UNUSED(ppos);
+
+ ret = kstrtouint_from_user(ubuf, count, 0, &column_width);
+
+ if (ret)
+ return ret;
+ if (!is_power_of_2(column_width)) {
+ dev_dbg(kctx->kbdev->dev,
+ "Column width %u not a multiple of power of 2", column_width);
+ return -EINVAL;
+ }
+ if (column_width > 8) {
+ dev_dbg(kctx->kbdev->dev,
+ "Column width %u greater than 8 not supported", column_width);
+ return -EINVAL;
+ }
+
+ kbase_gpu_vm_lock(kctx);
+ kctx->mem_view_column_width = column_width;
+ kbase_gpu_vm_unlock(kctx);
+
+ return count;
}
static const struct file_operations kbase_debug_mem_view_fops = {
@@ -296,6 +387,7 @@
.open = debug_mem_open,
.release = debug_mem_release,
.read = seq_read,
+ .write = debug_mem_write,
.llseek = seq_lseek
};
@@ -308,6 +400,9 @@
WARN_ON(IS_ERR_OR_NULL(kctx->kctx_dentry)))
return;
+ /* Default column width is 4 */
+ kctx->mem_view_column_width = sizeof(u32);
+
debugfs_create_file("mem_view", 0400, kctx->kctx_dentry, kctx,
&kbase_debug_mem_view_fops);
}
--
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