From 08f87f769b595151be1afeff53e144f543faa614 Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Wed, 06 Dec 2023 09:51:13 +0000 Subject: [PATCH] add dts config --- kernel/arch/powerpc/platforms/powermac/cache.S | 17 +++++++---------- 1 files changed, 7 insertions(+), 10 deletions(-) diff --git a/kernel/arch/powerpc/platforms/powermac/cache.S b/kernel/arch/powerpc/platforms/powermac/cache.S index 27862fe..b8ae56e 100644 --- a/kernel/arch/powerpc/platforms/powermac/cache.S +++ b/kernel/arch/powerpc/platforms/powermac/cache.S @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * This file contains low-level cache management functions * used for sleep and CPU speed changes on Apple machines. @@ -6,12 +7,6 @@ * * Copyright (C) 2004 Paul Mackerras (paulus@samba.org) and * Benjamin Herrenschmidt (benh@kernel.crashing.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * */ #include <asm/processor.h> @@ -28,7 +23,7 @@ */ _GLOBAL(flush_disable_caches) -#ifndef CONFIG_6xx +#ifndef CONFIG_PPC_BOOK3S_32 blr #else BEGIN_FTR_SECTION @@ -53,7 +48,7 @@ /* Stop DST streams */ BEGIN_FTR_SECTION - DSSALL + PPC_DSSALL sync END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) @@ -189,6 +184,7 @@ mtlr r10 blr +_ASM_NOKPROBE_SYMBOL(flush_disable_75x) /* This code is for 745x processors */ flush_disable_745x: @@ -201,7 +197,7 @@ isync /* Stop prefetch streams */ - DSSALL + PPC_DSSALL sync /* Disable L2 prefetching */ @@ -356,4 +352,5 @@ mtmsr r11 /* restore DR and EE */ isync blr -#endif /* CONFIG_6xx */ +_ASM_NOKPROBE_SYMBOL(flush_disable_745x) +#endif /* CONFIG_PPC_BOOK3S_32 */ -- Gitblit v1.6.2