From 08f87f769b595151be1afeff53e144f543faa614 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 06 Dec 2023 09:51:13 +0000
Subject: [PATCH] add dts config
---
kernel/arch/arm/boot/dts/rv1126.dtsi | 65 ++++++++++++++++++--------------
1 files changed, 37 insertions(+), 28 deletions(-)
diff --git a/kernel/arch/arm/boot/dts/rv1126.dtsi b/kernel/arch/arm/boot/dts/rv1126.dtsi
index 5eebdbd..1c64f55 100644
--- a/kernel/arch/arm/boot/dts/rv1126.dtsi
+++ b/kernel/arch/arm/boot/dts/rv1126.dtsi
@@ -24,7 +24,6 @@
interrupt-parent = <&gic>;
aliases {
- ethernet0 = &gmac;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -126,15 +125,16 @@
clocks = <&cru PLL_APLL>;
rockchip,bin-scaling-sel = <
0 5
- 1 18
+ 1 9
>;
rockchip,bin-voltage-sel = <
1 0
>;
rockchip,pvtm-voltage-sel = <
- 0 106000 1
- 106001 112000 2
- 112001 999999 3
+ 0 100500 1
+ 100501 104500 2
+ 104501 109500 3
+ 109501 999999 4
>;
rockchip,pvtm-freq = <408000>;
rockchip,pvtm-volt = <800000>;
@@ -172,6 +172,7 @@
opp-microvolt-L1 = <775000 775000 1000000>;
opp-microvolt-L2 = <775000 775000 1000000>;
opp-microvolt-L3 = <750000 750000 1000000>;
+ opp-microvolt-L4 = <725000 725000 1000000>;
clock-latency-ns = <40000>;
};
opp-1200000000 {
@@ -181,22 +182,27 @@
opp-microvolt-L1 = <850000 850000 1000000>;
opp-microvolt-L2 = <850000 850000 1000000>;
opp-microvolt-L3 = <825000 825000 1000000>;
+ opp-microvolt-L4 = <800000 800000 1000000>;
clock-latency-ns = <40000>;
};
opp-1296000000 {
opp-hz = /bits/ 64 <1296000000>;
opp-microvolt = <875000 875000 1000000>;
+ opp-microvolt-L0 = <925000 925000 1000000>;
opp-microvolt-L1 = <875000 875000 1000000>;
opp-microvolt-L2 = <875000 875000 1000000>;
opp-microvolt-L3 = <850000 850000 1000000>;
+ opp-microvolt-L4 = <825000 825000 1000000>;
clock-latency-ns = <40000>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <925000 925000 1000000>;
+ opp-microvolt-L0 = <975000 975000 1000000>;
opp-microvolt-L1 = <925000 925000 1000000>;
opp-microvolt-L2 = <925000 925000 1000000>;
opp-microvolt-L3 = <900000 900000 1000000>;
+ opp-microvolt-L4 = <875000 875000 1000000>;
clock-latency-ns = <40000>;
};
opp-1512000000 {
@@ -205,6 +211,7 @@
opp-microvolt-L1 = <975000 975000 1000000>;
opp-microvolt-L2 = <950000 950000 1000000>;
opp-microvolt-L3 = <925000 925000 1000000>;
+ opp-microvolt-L4 = <900000 900000 1000000>;
clock-latency-ns = <40000>;
};
};
@@ -390,8 +397,6 @@
console-size = <0x40000>;
ftrace-size = <0x00000>;
pmsg-size = <0x40000>;
- mcu-log-size = <0x40000>;
- mcu-log-count = <0x1>;
status = "disabled";
};
};
@@ -1163,13 +1168,14 @@
};
mipi_dphy: mipi-dphy@ff4d0000 {
- compatible = "rockchip,rv1126-mipi-dphy", "rockchip,rk1808-mipi-dphy";
- reg = <0xff4d0000 0x500>;
+ compatible = "rockchip,rv1126-mipi-dphy", "rockchip,rk3568-video-phy";
+ reg = <0xff4d0000 0x500>, <0xffb30000 0x500>;
+ reg-names = "phy", "host";
assigned-clocks = <&pmucru CLK_MIPIDSIPHY_REF>;
assigned-clock-rates = <24000000>;
- clocks = <&pmucru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
- clock-names = "ref", "pclk";
- clock-output-names = "mipi_dphy_pll";
+ clocks = <&pmucru CLK_MIPIDSIPHY_REF>,
+ <&cru PCLK_DSIPHY>, <&cru PCLK_DSIHOST>;
+ clock-names = "ref", "pclk", "pclk_host";
#clock-cells = <0>;
resets = <&cru SRST_DSIPHY_P>;
reset-names = "apb";
@@ -1625,7 +1631,7 @@
};
pdm: pdm@ff830000 {
- compatible = "rockchip,rv1126-pdm";
+ compatible = "rockchip,rv1126-pdm", "rockchip,pdm";
reg = <0xff830000 0x1000>;
clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>;
clock-names = "pdm_clk", "pdm_hclk";
@@ -1904,12 +1910,12 @@
compatible = "rockchip,rv1126-mipi-dsi";
reg = <0xffb30000 0x500>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_DSIHOST>, <&mipi_dphy>;
- clock-names = "pclk", "hs_clk";
+ clocks = <&cru PCLK_DSIHOST>, <&cru HCLK_PDVO>;
+ clock-names = "pclk", "hclk";
resets = <&cru SRST_DSIHOST_P>;
reset-names = "apb";
phys = <&mipi_dphy>;
- phy-names = "mipi_dphy";
+ phy-names = "dphy";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
@@ -2107,7 +2113,7 @@
};
rkvdec: rkvdec@ffb80000 {
- compatible = "rockchip,rkv-decoder-rv1126", "rockchip,rkv-decoder-v1";
+ compatible = "rockchip,rkv-decoder-v1";
reg = <0xffb80000 0x400>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
@@ -2125,7 +2131,7 @@
iommus = <&rkvdec_mmu>;
rockchip,srv = <&mpp_srv>;
rockchip,taskqueue-node = <0>;
- rockchip,resetgroup-node = <1>;
+ rockchip,resetgroup-node = <0>;
status = "disabled";
};
@@ -2231,7 +2237,7 @@
clocks = <&pmucru PLL_GPLL>;
rockchip,bin-scaling-sel = <
0 37
- 1 43
+ 1 40
>;
rockchip,bin-voltage-sel = <
1 0
@@ -2253,6 +2259,7 @@
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <750000 750000 1000000>;
+ opp-microvolt-L0 = <800000 800000 1000000>;
};
opp-594000000 {
opp-hz = /bits/ 64 <594000000>;
@@ -2398,7 +2405,7 @@
status = "disabled";
};
- sfc: sfc@ffc90000 {
+ sfc: spi@ffc90000 {
compatible = "rockchip,sfc";
reg = <0xffc90000 0x4000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
@@ -2409,6 +2416,8 @@
assigned-clocks = <&cru SCLK_SFC>;
assigned-clock-rates = <80000000>;
power-domains = <&power RV1126_PD_NVM>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
@@ -2449,9 +2458,9 @@
2 0
>;
rockchip,pvtm-voltage-sel = <
- 0 112500 1
- 112501 117500 2
- 117501 999999 3
+ 0 108500 1
+ 108501 113500 2
+ 113501 999999 3
>;
rockchip,pvtm-freq = <396000>;
rockchip,pvtm-volt = <800000>;
@@ -2466,27 +2475,27 @@
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <750000 750000 1000000>;
- opp-microvolt-L0 = <800000 800000 1000000>;
+ opp-microvolt-L0 = <775000 775000 1000000>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <750000 750000 1000000>;
- opp-microvolt-L0 = <800000 800000 1000000>;
+ opp-microvolt-L0 = <775000 775000 1000000>;
};
opp-396000000 {
opp-hz = /bits/ 64 <396000000>;
opp-microvolt = <750000 750000 1000000>;
- opp-microvolt-L0 = <800000 800000 1000000>;
+ opp-microvolt-L0 = <775000 775000 1000000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <750000 750000 1000000>;
- opp-microvolt-L0 = <800000 800000 1000000>;
+ opp-microvolt-L0 = <775000 775000 1000000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <750000 750000 1000000>;
- opp-microvolt-L0 = <800000 800000 1000000>;
+ opp-microvolt-L0 = <775000 775000 1000000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
--
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