From 04dd17822334871b23ea2862f7798fb0e0007777 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Sat, 11 May 2024 08:53:19 +0000
Subject: [PATCH] change otg to host mode
---
kernel/arch/arm/mach-socfpga/socfpga.c | 31 +++++++++++--------------------
1 files changed, 11 insertions(+), 20 deletions(-)
diff --git a/kernel/arch/arm/mach-socfpga/socfpga.c b/kernel/arch/arm/mach-socfpga/socfpga.c
index dde14f7..9e4cb2f 100644
--- a/kernel/arch/arm/mach-socfpga/socfpga.c
+++ b/kernel/arch/arm/mach-socfpga/socfpga.c
@@ -1,24 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2012-2015 Altera Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/reboot.h>
+#include <linux/reset/socfpga.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
@@ -32,7 +21,7 @@
void __iomem *sdr_ctl_base_addr;
unsigned long socfpga_cpu1start_addr;
-void __init socfpga_sysmgr_init(void)
+static void __init socfpga_sysmgr_init(void)
{
struct device_node *np;
@@ -64,6 +53,7 @@
if (IS_ENABLED(CONFIG_EDAC_ALTERA_OCRAM))
socfpga_init_ocram_ecc();
+ socfpga_reset_init();
}
static void __init socfpga_arria10_init_irq(void)
@@ -74,6 +64,7 @@
socfpga_init_arria10_l2_ecc();
if (IS_ENABLED(CONFIG_EDAC_ALTERA_OCRAM))
socfpga_init_arria10_ocram_ecc();
+ socfpga_reset_init();
}
static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd)
@@ -82,10 +73,10 @@
temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
- if (mode == REBOOT_HARD)
- temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
- else
+ if (mode == REBOOT_WARM)
temp |= RSTMGR_CTRL_SWWARMRSTREQ;
+ else
+ temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
}
@@ -95,10 +86,10 @@
temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL);
- if (mode == REBOOT_HARD)
- temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
- else
+ if (mode == REBOOT_WARM)
temp |= RSTMGR_CTRL_SWWARMRSTREQ;
+ else
+ temp |= RSTMGR_CTRL_SWCOLDRSTREQ;
writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL);
}
--
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