From 01573e231f18eb2d99162747186f59511f56b64d Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 08 Dec 2023 10:40:48 +0000
Subject: [PATCH] 移去rt
---
kernel/sound/soc/codecs/rt5677.h | 62 +++++++++++++++++++++++++++---
1 files changed, 55 insertions(+), 7 deletions(-)
diff --git a/kernel/sound/soc/codecs/rt5677.h b/kernel/sound/soc/codecs/rt5677.h
index 183d92b..944ae02 100644
--- a/kernel/sound/soc/codecs/rt5677.h
+++ b/kernel/sound/soc/codecs/rt5677.h
@@ -1,12 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* rt5677.h -- RT5677 ALSA SoC audio driver
*
* Copyright 2013 Realtek Semiconductor Corp.
* Author: Oder Chiou <oder_chiou@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __RT5677_H__
@@ -1339,6 +1336,8 @@
#define RT5677_PLL_M_SFT 12
#define RT5677_PLL_M_BP (0x1 << 11)
#define RT5677_PLL_M_BP_SFT 11
+#define RT5677_PLL_UPDATE_PLL1 (0x1 << 1)
+#define RT5677_PLL_UPDATE_PLL1_SFT 1
/* Global Clock Control 1 (0x80) */
#define RT5677_SCLK_SRC_MASK (0x3 << 14)
@@ -1456,9 +1455,37 @@
#define RT5677_I2S4_CLK_SEL_MASK (0xf)
#define RT5677_I2S4_CLK_SEL_SFT 0
+/* VAD Function Control 1 (0x9c) */
+#define RT5677_VAD_MIN_DUR_MASK (0x3 << 13)
+#define RT5677_VAD_MIN_DUR_SFT 13
+#define RT5677_VAD_ADPCM_BYPASS (1 << 10)
+#define RT5677_VAD_ADPCM_BYPASS_BIT 10
+#define RT5677_VAD_FG2ENC (1 << 9)
+#define RT5677_VAD_FG2ENC_BIT 9
+#define RT5677_VAD_BUF_OW (1 << 8)
+#define RT5677_VAD_BUF_OW_BIT 8
+#define RT5677_VAD_CLR_FLAG (1 << 7)
+#define RT5677_VAD_CLR_FLAG_BIT 7
+#define RT5677_VAD_BUF_POP (1 << 6)
+#define RT5677_VAD_BUF_POP_BIT 6
+#define RT5677_VAD_BUF_PUSH (1 << 5)
+#define RT5677_VAD_BUF_PUSH_BIT 5
+#define RT5677_VAD_DET_ENABLE (1 << 4)
+#define RT5677_VAD_DET_ENABLE_BIT 4
+#define RT5677_VAD_FUNC_ENABLE (1 << 3)
+#define RT5677_VAD_FUNC_ENABLE_BIT 3
+#define RT5677_VAD_FUNC_RESET (1 << 2)
+#define RT5677_VAD_FUNC_RESET_BIT 2
+
/* VAD Function Control 4 (0x9f) */
-#define RT5677_VAD_SRC_MASK (0x7 << 8)
+#define RT5677_VAD_OUT_SRC_RATE_MASK (0x1 << 11)
+#define RT5677_VAD_OUT_SRC_RATE_SFT 11
+#define RT5677_VAD_OUT_SRC_MASK (0x1 << 10)
+#define RT5677_VAD_OUT_SRC_SFT 10
+#define RT5677_VAD_SRC_MASK (0x3 << 8)
#define RT5677_VAD_SRC_SFT 8
+#define RT5677_VAD_LV_DIFF_MASK (0xff << 0)
+#define RT5677_VAD_LV_DIFF_SFT 0
/* DSP InBound Control (0xa3) */
#define RT5677_IB01_SRC_MASK (0x7 << 12)
@@ -1636,6 +1663,12 @@
#define RT5677_GPIO6_P_NOR (0x0 << 0)
#define RT5677_GPIO6_P_INV (0x1 << 0)
+/* General Control (0xfa) */
+#define RT5677_IRQ_DEBOUNCE_SEL_MASK (0x3 << 3)
+#define RT5677_IRQ_DEBOUNCE_SEL_MCLK (0x0 << 3)
+#define RT5677_IRQ_DEBOUNCE_SEL_RC (0x1 << 3)
+#define RT5677_IRQ_DEBOUNCE_SEL_SLIM (0x2 << 3)
+
/* Virtual DSP Mixer Control (0xf7 0xf8 0xf9) */
#define RT5677_DSP_IB_01_H (0x1 << 15)
#define RT5677_DSP_IB_01_H_SFT 15
@@ -1674,6 +1707,8 @@
#define RT5677_FIRMWARE1 "rt5677_dsp_fw1.bin"
#define RT5677_FIRMWARE2 "rt5677_dsp_fw2.bin"
+#define RT5677_DRV_NAME "rt5677"
+
/* System Clock Source */
enum {
RT5677_SCLK_S_MCLK,
@@ -1697,6 +1732,7 @@
RT5677_AIF4,
RT5677_AIF5,
RT5677_AIFS,
+ RT5677_DSPBUFF,
};
enum {
@@ -1713,6 +1749,7 @@
RT5677_IRQ_JD1,
RT5677_IRQ_JD2,
RT5677_IRQ_JD3,
+ RT5677_IRQ_NUM,
};
enum rt5677_type {
@@ -1791,6 +1828,7 @@
struct rt5677_priv {
struct snd_soc_component *component;
+ struct device *dev;
struct rt5677_platform_data pdata;
struct regmap *regmap, *regmap_physical;
const struct firmware *fw1, *fw2;
@@ -1810,10 +1848,20 @@
#ifdef CONFIG_GPIOLIB
struct gpio_chip gpio_chip;
#endif
- bool dsp_vad_en;
- struct regmap_irq_chip_data *irq_data;
+ bool dsp_vad_en_request; /* DSP VAD enable/disable request */
+ bool dsp_vad_en; /* dsp_work parameter */
bool is_dsp_mode;
bool is_vref_slow;
+ struct delayed_work dsp_work;
+
+ /* Interrupt handling */
+ struct irq_domain *domain;
+ struct mutex irq_lock;
+ unsigned int irq_en;
+ struct delayed_work resume_irq_check;
+ int irq;
+
+ int (*set_dsp_vad)(struct snd_soc_component *component, bool on);
};
int rt5677_sel_asrc_clk_src(struct snd_soc_component *component,
--
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