feat(mipi): add lcd-mipi-10-800-1280_AT101DS40I support

lin

2025-04-14 e0c033f30287744d392a8d700693b1c0b78afc7c

feat(mipi): add lcd-mipi-10-800-1280_AT101DS40I support

Signed-off-by: lin <lin@kickpi.com>

 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/Makefile
..
..
@@ -53,6 +53,7 @@
53
53
 disp-$(CONFIG_LCD_SUPPORT_K101_IM2BYL02_L_800X1280) += lcd/K101_IM2BYL02_L_800X1280.o
54
54
 disp-y				+= lcd/mipi_8_800x1280.o
55
55
 disp-y				+= lcd/mipi_10_800x1280.o
56
+disp-y				+= lcd/mipi_10_800x1280_AT101DS40I.o
56
57
 disp-y				+= lcd/mipi_5_720x1280.o
57
58
 
58
59
 ifeq ($(CONFIG_MACH_SUN8IW6),y)
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_10_800x1280_AT101DS40I.c
..
..
@@ -0,0 +1,391 @@
1
+#include "mipi_10_800x1280_AT101DS40I.h"
2
+
3
+static void lcd_power_on(u32 sel);
4
+static void lcd_power_off(u32 sel);
5
+static void lcd_bl_open(u32 sel);
6
+static void lcd_bl_close(u32 sel);
7
+
8
+static void lcd_panel_init(u32 sel);
9
+static void lcd_panel_exit(u32 sel);
10
+
11
+#define panel_reset(sel, val) sunxi_lcd_gpio_set_value(sel, 0, val)
12
+
13
+static void lcd_cfg_panel_info(panel_extend_para *info)
14
+{
15
+	u32 i = 0, j = 0;
16
+	u32 items;
17
+	u8 lcd_gamma_tbl[][2] = {
18
+		{0, 0},
19
+		{15, 15},
20
+		{30, 30},
21
+		{45, 45},
22
+		{60, 60},
23
+		{75, 75},
24
+		{90, 90},
25
+		{105, 105},
26
+		{120, 120},
27
+		{135, 135},
28
+		{150, 150},
29
+		{165, 165},
30
+		{180, 180},
31
+		{195, 195},
32
+		{210, 210},
33
+		{225, 225},
34
+		{240, 240},
35
+		{255, 255},
36
+	};
37
+
38
+	u32 lcd_cmap_tbl[2][3][4] = {
39
+		{
40
+			{LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
41
+			{LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
42
+			{LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
43
+		},
44
+		{
45
+			{LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
46
+			{LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
47
+			{LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
48
+		},
49
+	};
50
+
51
+	items = sizeof(lcd_gamma_tbl) / 2;
52
+	for (i = 0; i < items - 1; i++) {
53
+		u32 num = lcd_gamma_tbl[i + 1][0] - lcd_gamma_tbl[i][0];
54
+
55
+		for (j = 0; j < num; j++) {
56
+			u32 value = 0;
57
+
58
+			value = lcd_gamma_tbl[i][1] +
59
+				((lcd_gamma_tbl[i + 1][1] - lcd_gamma_tbl[i][1])
60
+				 * j) / num;
61
+			info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
62
+				(value << 16)
63
+				+ (value << 8) + value;
64
+		}
65
+	}
66
+	info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items - 1][1] << 16) +
67
+				   (lcd_gamma_tbl[items - 1][1] << 8)
68
+				   + lcd_gamma_tbl[items - 1][1];
69
+
70
+	memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
71
+
72
+}
73
+
74
+static s32 lcd_open_flow(u32 sel)
75
+{
76
+	LCD_OPEN_FUNC(sel, lcd_power_on, 10);
77
+	LCD_OPEN_FUNC(sel, lcd_panel_init, 10);
78
+	LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 50);
79
+	LCD_OPEN_FUNC(sel, lcd_bl_open, 0);
80
+
81
+	return 0;
82
+}
83
+
84
+static s32 lcd_close_flow(u32 sel)
85
+{
86
+	LCD_CLOSE_FUNC(sel, lcd_bl_close, 0);
87
+	LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 0);
88
+	LCD_CLOSE_FUNC(sel, lcd_panel_exit, 200);
89
+	LCD_CLOSE_FUNC(sel, lcd_power_off, 500);
90
+
91
+	return 0;
92
+}
93
+
94
+static void lcd_power_on(u32 sel)
95
+{
96
+	sunxi_lcd_pin_cfg(sel, 1);
97
+	sunxi_lcd_delay_ms(50);
98
+	panel_reset(sel, 1);
99
+	sunxi_lcd_delay_ms(5);
100
+	panel_reset(sel, 0);
101
+	sunxi_lcd_delay_ms(10);
102
+	panel_reset(sel, 1);
103
+	sunxi_lcd_delay_ms(120);
104
+
105
+}
106
+
107
+static void lcd_power_off(u32 sel)
108
+{
109
+	sunxi_lcd_pin_cfg(sel, 0);
110
+	sunxi_lcd_delay_ms(20);
111
+	panel_reset(sel, 0);
112
+	sunxi_lcd_delay_ms(5);
113
+}
114
+
115
+static void lcd_bl_open(u32 sel)
116
+{
117
+	sunxi_lcd_pwm_enable(sel);
118
+}
119
+
120
+static void lcd_bl_close(u32 sel)
121
+{
122
+	sunxi_lcd_pwm_disable(sel);
123
+}
124
+
125
+#define REGFLAG_DELAY 0XFC
126
+#define REGFLAG_END_OF_TABLE 0xFD /* END OF REGISTERS MARKER */
127
+
128
+struct LCM_setting_table {
129
+	u8 cmd;
130
+	u32 count;
131
+	u8 para_list[32];
132
+};
133
+
134
+static struct LCM_setting_table jd9365[] = {
135
+
136
+	{ 0xE0, 1, {0x00} },
137
+	{ 0xE1, 1, {0x93} },
138
+	{ 0xE2, 1, {0x65} },
139
+	{ 0xE3, 1, {0xF8} },
140
+	{ 0x80, 1, {0x03} },
141
+	{ 0xE0, 1, {0x01} },
142
+	{ 0x00, 1, {0x00} },
143
+	{ 0x01, 1, {0x5C} },
144
+	{ 0x17, 1, {0x00} },
145
+	{ 0x18, 1, {0xD7} },
146
+	{ 0x19, 1, {0x01} },
147
+	{ 0x1A, 1, {0x00} },
148
+	{ 0x1B, 1, {0xD7} },
149
+	{ 0x1C, 1, {0x01} },
150
+	{ 0x1F, 1, {0x70} },
151
+	{ 0x20, 1, {0x2D} },
152
+	{ 0x21, 1, {0x2D} },
153
+	{ 0x22, 1, {0x7E} },
154
+	{ 0x24, 1, {0xFD} },
155
+	{ 0x37, 1, {0x19} },
156
+	{ 0x35, 1, {0x28} },
157
+	{ 0x38, 1, {0x05} },
158
+	{ 0x39, 1, {0x08} },
159
+	{ 0x3A, 1, {0x12} },
160
+	{ 0x3C, 1, {0x7E} },
161
+	{ 0x3D, 1, {0xFF} },
162
+	{ 0x3E, 1, {0xFF} },
163
+	{ 0x3F, 1, {0x7F} },
164
+	{ 0x40, 1, {0x06} },
165
+	{ 0x41, 1, {0xA0} },
166
+	{ 0x43, 1, {0x1E} },
167
+	{ 0x44, 1, {0x0B} },
168
+	{ 0x55, 1, {0x01} },
169
+	{ 0x56, 1, {0x01} },
170
+	{ 0x57, 1, {0x6A} },
171
+	{ 0x58, 1, {0x09} },
172
+	{ 0x59, 1, {0x0A} },
173
+	{ 0x5A, 1, {0x2E} },
174
+	{ 0x5B, 1, {0x1A} },
175
+	{ 0x5C, 1, {0x15} },
176
+	{ 0x5D, 1, {0x7F} },
177
+	{ 0x5E, 1, {0x5A} },
178
+	{ 0x5F, 1, {0x47} },
179
+	{ 0x60, 1, {0x3A} },
180
+	{ 0x61, 1, {0x34} },
181
+	{ 0x62, 1, {0x24} },
182
+	{ 0x63, 1, {0x28} },
183
+	{ 0x64, 1, {0x12} },
184
+	{ 0x65, 1, {0x2A} },
185
+	{ 0x66, 1, {0x29} },
186
+	{ 0x67, 1, {0x29} },
187
+	{ 0x68, 1, {0x46} },
188
+	{ 0x69, 1, {0x34} },
189
+	{ 0x6A, 1, {0x37} },
190
+	{ 0x6B, 1, {0x28} },
191
+	{ 0x6C, 1, {0x25} },
192
+	{ 0x6D, 1, {0x1B} },
193
+	{ 0x6E, 1, {0x12} },
194
+	{ 0x6F, 1, {0x02} },
195
+	{ 0x70, 1, {0x7F} },
196
+	{ 0x71, 1, {0x5A} },
197
+	{ 0x72, 1, {0x47} },
198
+	{ 0x73, 1, {0x3A} },
199
+	{ 0x74, 1, {0x34} },
200
+	{ 0x75, 1, {0x24} },
201
+	{ 0x76, 1, {0x28} },
202
+	{ 0x77, 1, {0x12} },
203
+	{ 0x78, 1, {0x2A} },
204
+	{ 0x79, 1, {0x29} },
205
+	{ 0x7A, 1, {0x29} },
206
+	{ 0x7B, 1, {0x46} },
207
+	{ 0x7C, 1, {0x34} },
208
+	{ 0x7D, 1, {0x37} },
209
+	{ 0x7E, 1, {0x28} },
210
+	{ 0x7F, 1, {0x25} },
211
+	{ 0x80, 1, {0x1B} },
212
+	{ 0x81, 1, {0x12} },
213
+	{ 0x82, 1, {0x02} },
214
+	{ 0xE0, 1, {0x02} },
215
+	{ 0x00, 1, {0x52} },
216
+	{ 0x01, 1, {0x55} },
217
+	{ 0x02, 1, {0x55} },
218
+	{ 0x03, 1, {0x50} },
219
+	{ 0x04, 1, {0x77} },
220
+	{ 0x05, 1, {0x57} },
221
+	{ 0x06, 1, {0x55} },
222
+	{ 0x07, 1, {0x4E} },
223
+	{ 0x08, 1, {0x4C} },
224
+	{ 0x09, 1, {0x5F} },
225
+	{ 0x0A, 1, {0x4A} },
226
+	{ 0x0B, 1, {0x48} },
227
+	{ 0x0C, 1, {0x55} },
228
+	{ 0x0D, 1, {0x46} },
229
+	{ 0x0E, 1, {0x44} },
230
+	{ 0x0F, 1, {0x40} },
231
+	{ 0x10, 1, {0x55} },
232
+	{ 0x11, 1, {0x55} },
233
+	{ 0x12, 1, {0x55} },
234
+	{ 0x13, 1, {0x55} },
235
+	{ 0x14, 1, {0x55} },
236
+	{ 0x15, 1, {0x55} },
237
+	{ 0x16, 1, {0x53} },
238
+	{ 0x17, 1, {0x55} },
239
+	{ 0x18, 1, {0x55} },
240
+	{ 0x19, 1, {0x51} },
241
+	{ 0x1A, 1, {0x77} },
242
+	{ 0x1B, 1, {0x57} },
243
+	{ 0x1C, 1, {0x55} },
244
+	{ 0x1D, 1, {0x4F} },
245
+	{ 0x1E, 1, {0x4D} },
246
+	{ 0x1F, 1, {0x5F} },
247
+	{ 0x20, 1, {0x4B} },
248
+	{ 0x21, 1, {0x49} },
249
+	{ 0x22, 1, {0x55} },
250
+	{ 0x23, 1, {0x47} },
251
+	{ 0x24, 1, {0x45} },
252
+	{ 0x25, 1, {0x41} },
253
+	{ 0x26, 1, {0x55} },
254
+	{ 0x27, 1, {0x55} },
255
+	{ 0x28, 1, {0x55} },
256
+	{ 0x29, 1, {0x55} },
257
+	{ 0x2A, 1, {0x55} },
258
+	{ 0x2B, 1, {0x55} },
259
+	{ 0x2C, 1, {0x13} },
260
+	{ 0x2D, 1, {0x15} },
261
+	{ 0x2E, 1, {0x15} },
262
+	{ 0x2F, 1, {0x01} },
263
+	{ 0x30, 1, {0x37} },
264
+	{ 0x31, 1, {0x17} },
265
+	{ 0x32, 1, {0x15} },
266
+	{ 0x33, 1, {0x0D} },
267
+	{ 0x34, 1, {0x0F} },
268
+	{ 0x35, 1, {0x15} },
269
+	{ 0x36, 1, {0x05} },
270
+	{ 0x37, 1, {0x07} },
271
+	{ 0x38, 1, {0x15} },
272
+	{ 0x39, 1, {0x09} },
273
+	{ 0x3A, 1, {0x0B} },
274
+	{ 0x3B, 1, {0x11} },
275
+	{ 0x3C, 1, {0x15} },
276
+	{ 0x3D, 1, {0x15} },
277
+	{ 0x3E, 1, {0x15} },
278
+	{ 0x3F, 1, {0x15} },
279
+	{ 0x40, 1, {0x15} },
280
+	{ 0x41, 1, {0x15} },
281
+	{ 0x42, 1, {0x12} },
282
+	{ 0x43, 1, {0x15} },
283
+	{ 0x44, 1, {0x15} },
284
+	{ 0x45, 1, {0x00} },
285
+	{ 0x46, 1, {0x37} },
286
+	{ 0x47, 1, {0x17} },
287
+	{ 0x48, 1, {0x15} },
288
+	{ 0x49, 1, {0x0C} },
289
+	{ 0x4A, 1, {0x0E} },
290
+	{ 0x4B, 1, {0x15} },
291
+	{ 0x4C, 1, {0x04} },
292
+	{ 0x4D, 1, {0x06} },
293
+	{ 0x4E, 1, {0x15} },
294
+	{ 0x4F, 1, {0x08} },
295
+	{ 0x50, 1, {0x0A} },
296
+	{ 0x51, 1, {0x10} },
297
+	{ 0x52, 1, {0x15} },
298
+	{ 0x53, 1, {0x15} },
299
+	{ 0x54, 1, {0x15} },
300
+	{ 0x55, 1, {0x15} },
301
+	{ 0x56, 1, {0x15} },
302
+	{ 0x57, 1, {0x15} },
303
+	{ 0x58, 1, {0x40} },
304
+	{ 0x5B, 1, {0x10} },
305
+	{ 0x5C, 1, {0x06} },
306
+	{ 0x5D, 1, {0x40} },
307
+	{ 0x5E, 1, {0x00} },
308
+	{ 0x5F, 1, {0x00} },
309
+	{ 0x60, 1, {0x40} },
310
+	{ 0x61, 1, {0x03} },
311
+	{ 0x62, 1, {0x04} },
312
+	{ 0x63, 1, {0x6C} },
313
+	{ 0x64, 1, {0x6C} },
314
+	{ 0x65, 1, {0x75} },
315
+	{ 0x66, 1, {0x08} },
316
+	{ 0x67, 1, {0xB4} },
317
+	{ 0x68, 1, {0x08} },
318
+	{ 0x69, 1, {0x6C} },
319
+	{ 0x6A, 1, {0x6C} },
320
+	{ 0x6B, 1, {0x0C} },
321
+	{ 0x6D, 1, {0x00} },
322
+	{ 0x6E, 1, {0x00} },
323
+	{ 0x6F, 1, {0x88} },
324
+	{ 0x75, 1, {0xBB} },
325
+	{ 0x76, 1, {0x00} },
326
+	{ 0x77, 1, {0x05} },
327
+	{ 0x78, 1, {0x2A} },
328
+	{ 0xE0, 1, {0x04} },
329
+	{ 0x09, 1, {0x11} },
330
+	{ 0x0E, 1, {0x48} },
331
+
332
+	{ 0x37, 1, {0x58} },
333
+
334
+	{ 0x2D, 1, {0x03} },
335
+	{ 0xE0, 1, {0x00} },
336
+	{ 0xE6, 1, {0x02} },
337
+	{ 0xE7, 1, {0x06} },
338
+
339
+
340
+	{ 0x11, 0, { 0x00 } }, // SLPOUT
341
+	{ REGFLAG_DELAY, REGFLAG_DELAY, { 120 } },
342
+
343
+	//DISP ON
344
+	{ 0x29, 0, { 0x00 } }, // DSPON
345
+	{ REGFLAG_DELAY, REGFLAG_DELAY, { 20 } },
346
+	{ REGFLAG_END_OF_TABLE, REGFLAG_END_OF_TABLE, {} }
347
+
348
+};
349
+
350
+static void lcd_panel_init(u32 sel)
351
+{
352
+	__u32 i;
353
+	sunxi_lcd_dsi_clk_enable(sel);
354
+	sunxi_lcd_delay_ms(100);
355
+	for (i = 0;; i++) {
356
+		if (jd9365[i].count == REGFLAG_END_OF_TABLE)
357
+			break;
358
+		else if (jd9365[i].count == REGFLAG_DELAY) {
359
+			sunxi_lcd_delay_ms(jd9365[i].para_list[0]);
360
+		} else {
361
+			dsi_gen_wr(sel, jd9365[i].cmd,
362
+				   jd9365[i].para_list,
363
+				   jd9365[i].count);
364
+		}
365
+		/* break; */
366
+	}
367
+}
368
+
369
+static void lcd_panel_exit(u32 sel)
370
+{
371
+	sunxi_lcd_dsi_dcs_write_0para(sel, 0x10);
372
+	sunxi_lcd_delay_ms(80);
373
+	sunxi_lcd_dsi_dcs_write_0para(sel, 0x28);
374
+	sunxi_lcd_delay_ms(50);
375
+}
376
+
377
+/*sel: 0:lcd0; 1:lcd1*/
378
+static s32 lcd_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
379
+{
380
+	return 0;
381
+}
382
+
383
+__lcd_panel_t mipi_10_800x1280_AT101DS40I_panel = {
384
+	.name = "mipi_10_800x1280_AT101DS40I",
385
+	.func = {
386
+		.cfg_panel_info = lcd_cfg_panel_info,
387
+		.cfg_open_flow = lcd_open_flow,
388
+		.cfg_close_flow = lcd_close_flow,
389
+		.lcd_user_defined_func = lcd_user_defined_func,
390
+	},
391
+};
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_10_800x1280_AT101DS40I.h
..
..
@@ -0,0 +1,20 @@
1
+/* drivers/video/sunxi/disp2/disp/lcd/k101im2qa04.h
2
+ *
3
+ * Copyright (c) 2017 Allwinnertech Co., Ltd.
4
+ * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
5
+ *
6
+ * k101im2qa04 panel driver
7
+ *
8
+ * This program is free software; you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License version 2 as
10
+ * published by the Free Software Foundation.
11
+*/
12
+
13
+#ifndef _MIPI_10_800X1280_H
14
+#define _MIPI_10_800X1280_H
15
+
16
+#include "panels.h"
17
+
18
+extern __lcd_panel_t mipi_10_800x1280_AT101DS40I_panel;
19
+
20
+#endif /*End of file*/
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/panels.c
..
..
@@ -137,6 +137,7 @@
137
137
 
138
138
 	&mipi_8_800x1280_panel,
139
139
 	&mipi_10_800x1280_panel,
140
+	&mipi_10_800x1280_AT101DS40I_panel,
140
141
 	/* add new panel below */
141
142
     &mipi_5_720x1280_panel,
142
143
 	NULL,
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/panels.h
..
..
@@ -240,5 +240,6 @@
240
240
 extern __lcd_panel_t mipi_8_800x1280_panel;
241
241
 extern __lcd_panel_t mipi_10_800x1280_panel;
242
242
 extern __lcd_panel_t mipi_5_720x1280_panel;
243
+extern __lcd_panel_t mipi_10_800x1280_AT101DS40I_panel;
243
244
 
244
245
 #endif
 longan/device/config/chips/a133/configs/c3/kickpi-k5.dts
..
..
@@ -1443,4 +1443,5 @@
1443
1443
 //#include "lcd-lvds-21-1920-1080.dtsi"
1444
1444
 #include "lcd-lvds-7-1024-600.dtsi"
1445
1445
 //#include "lcd-mipi-10-800-1280.dtsi"
1446
+//#include "lcd-mipi-10-800-1280_AT101DS40I.dtsi"
1446
1447
 //#include "lcd-mipi-8-800-1280.dtsi"
 longan/device/config/chips/a133/configs/c3/kickpi-k5c.dts
..
..
@@ -1448,5 +1448,6 @@
1448
1448
 //#include "lcd-lvds-21-1920-1080.dtsi"
1449
1449
 #include "lcd-lvds-7-1024-600.dtsi"
1450
1450
 //#include "lcd-mipi-10-800-1280.dtsi"
1451
+//#include "lcd-mipi-10-800-1280_AT101DS40I.dtsi"
1451
1452
 //#include "lcd-mipi-8-800-1280.dtsi"
1452
1453
 //#include "lcd-mipi-5-720-1280.dtsi"
 longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/lcd-mipi-10-800-1280_AT101DS40I.dtsi
..
..
@@ -0,0 +1,226 @@
1
+&soc {
2
+/*----------------------------------------------------------------------------------
3
+disp init configuration
4
+
5
+disp_mode             (0:screen0<screen0,fb0>)
6
+screenx_output_type   (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
7
+screenx_output_mode   (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
8
+                      (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
9
+screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
10
+screenx_output_bits   (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
11
+screenx_output_eotf   (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
12
+screenx_output_cs     (for hdmi, 0:undefined  257:BT709 260:BT601  263:BT2020)
13
+screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
14
+screen0_output_range   (for hdmi, 0:default 1:full 2:limited)
15
+screen0_output_scan    (for hdmi, 0:no data 1:overscan 2:underscan)
16
+screen0_output_aspect_ratio  (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
17
+fbx format            (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
18
+fbx pixel sequence    (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
19
+fb0_scaler_mode_enable(scaler mode enable, used FE)
20
+fbx_width,fbx_height  (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
21
+lcdx_backlight        (lcd init backlight,the range:[0,256],default:197
22
+lcdx_yy               (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
23
+lcd0_contrast         (LCD contrast, 0~100)
24
+lcd0_saturation       (LCD saturation, 0~100)
25
+lcd0_hue              (LCD hue, 0~100)
26
+framebuffer software rotation setting:
27
+disp_rotation_used:   (0:disable; 1:enable,you must set fbX_width to lcd_y,
28
+set fbX_height to lcd_x)
29
+degreeX:              (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
30
+degreeX_Y:            (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
31
+devX_output_type : config output type in bootGUI framework in UBOOT-2018.
32
+				   (0:none; 1:lcd; 2:tv; 4:hdmi;)
33
+devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
34
+devX_screen_id   : config display index of bootGUI framework in UBOOT-2018
35
+devX_do_hpd      : whether do hpd detectation or not in UBOOT-2018
36
+chn_cfg_mode     : Hardware DE channel allocation config. 0:single display with 6
37
+				   channel, 1:dual display with 4 channel in main display and 2 channel in second
38
+                   display, 2:dual display with 3 channel in main display and 3 channel in second
39
+                   in display.
40
+----------------------------------------------------------------------------------*/
41
+                disp: disp@06000000 {
42
+                        disp_init_enable         = <1>;
43
+                        disp_mode                = <0>;
44
+
45
+                        screen0_output_type      = <1>;
46
+                        screen0_output_mode      = <4>;
47
+
48
+                        screen1_output_type      = <1>;
49
+                        screen1_output_mode      = <4>;
50
+
51
+                        screen1_output_format    = <0>;
52
+                        screen1_output_bits      = <0>;
53
+                        screen1_output_eotf      = <4>;
54
+                        screen1_output_cs        = <257>;
55
+                        screen1_output_dvi_hdmi  = <2>;
56
+                        screen1_output_range     = <2>;
57
+                        screen1_output_scan      = <0>;
58
+                        screen1_output_aspect_ratio = <8>;
59
+
60
+                        dev0_output_type         = <1>;
61
+                        dev0_output_mode         = <4>;
62
+                        dev0_screen_id           = <0>;
63
+                        dev0_do_hpd              = <0>;
64
+
65
+                        dev1_output_type         = <4>;
66
+                        dev1_output_mode         = <10>;
67
+                        dev1_screen_id           = <1>;
68
+                        dev1_do_hpd              = <1>;
69
+
70
+                        def_output_dev           = <0>;
71
+                        hdmi_mode_check          = <1>;
72
+
73
+                        fb0_format               = <0>;
74
+                        fb0_width                = <800>;
75
+                        fb0_height               = <1280>;
76
+
77
+                        fb1_format               = <0>;
78
+                        fb1_width                = <0>;
79
+                        fb1_height               = <0>;
80
+                        chn_cfg_mode             = <1>;
81
+
82
+                        disp_para_zone           = <1>;
83
+                        dc1sw-supply = <&reg_dc1sw>;
84
+                        eldo3-supply = <&reg_eldo3>;
85
+                        dldo2-supply = <&reg_dldo2>;
86
+                        dcdc1-supply = <&reg_dcdc1>;
87
+                };
88
+/*----------------------------------------------------------------------------------
89
+;lcd0 configuration
90
+
91
+;lcd_if:               0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
92
+;lcd_hv_if             0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
93
+;lcd_hv_clk_phase      0:0 degree;1:90 degree;2:180 degree;3:270 degree
94
+;lcd_hv_sync_polarity  0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
95
+;lcd_hv_syuv_seq       0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
96
+;lcd_cpu_if            0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
97
+;                      6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
98
+;lcd_cpu_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
99
+;lcd_dsi_if            0:video mode; 1: Command mode; 2:video burst mode
100
+;lcd_dsi_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
101
+;lcd_x:                lcd horizontal resolution
102
+;lcd_y:                lcd vertical resolution
103
+;lcd_width:            width of lcd in mm
104
+;lcd_height:           height of lcd in mm
105
+;lcd_dclk_freq:        in MHZ unit
106
+;lcd_pwm_freq:         in HZ unit
107
+;lcd_pwm_pol:          lcd backlight PWM polarity
108
+;lcd_pwm_max_limit     lcd backlight PWM max limit(<=255)
109
+;lcd_hbp:              hsync back porch(pixel) + hsync plus width(pixel);
110
+;lcd_ht:               hsync total cycle(pixel)
111
+;lcd_vbp:              vsync back porch(line) + vysnc plus width(line)
112
+;lcd_vt:               vysnc total cycle(line)
113
+;lcd_hspw:             hsync plus width(pixel)
114
+;lcd_vspw:             vysnc plus width(pixel)
115
+;lcd_lvds_if:          0:single link;  1:dual link
116
+;lcd_lvds_colordepth:  0:8bit; 1:6bit
117
+;lcd_lvds_mode:        0:NS mode; 1:JEIDA mode
118
+;lcd_frm:              0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
119
+;lcd_io_phase:         0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
120
+;                      8~11bit:dclk phase; 12~15bit:de phase)
121
+;lcd_gamma_en          lcd gamma correction enable
122
+;lcd_bright_curve_en   lcd bright curve correction enable
123
+;lcd_cmap_en           lcd color map function enable
124
+;deu_mode              0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
125
+;lcdgamma4iep:         Smart Backlight parameter, lcd gamma vale * 10;
126
+;                      decrease it while lcd is not bright enough; increase while lcd is too bright
127
+;smart_color           90:normal lcd screen 65:retina lcd screen(9.7inch)
128
+;Pin setting for special function ie.LVDS, RGB data or vsync
129
+;   name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
130
+;Pin setting for gpio:
131
+;   lcd_gpio_X     = port:PD12<pin function><pull up or pull down><drive ability><output level>
132
+;Pin setting for backlight enable pin
133
+;   lcd_bl_en     = port:PD12<pin function><pull up or pull down><drive ability><output level>
134
+;fsync setting, pulse to csi
135
+;lcd_fsync_en          (0:disable fsync,1:enable)
136
+;lcd_fsync_act_time    (active time of fsync, unit:pixel)
137
+;lcd_fsync_dis_time    (disactive time of fsync, unit:pixel)
138
+;lcd_fsync_pol         (0:positive;1:negative)
139
+;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
140
+pull up or pull down(default 0), driver level(default 1), data>
141
+;For dual link lvds: use lvds2link_pins_a  and lvds2link_pins_b instead
142
+;For rgb24: use rgb24_pins_a  and rgb24_pins_b instead
143
+;For lvds1: use lvds1_pins_a  and lvds1_pins_b instead
144
+;For lvds0: use lvds0_pins_a  and lvds0_pins_b instead
145
+;----------------------------------------------------------------------------------*/
146
+                lcd0: lcd0@01c0c000 {
147
+	lcd_used            = <1>;
148
+	status              = "okay";
149
+	lcd_driver_name     = "mipi_10_800x1280_AT101DS40I";
150
+	lcd_backlight       = <255>;
151
+	lcd_if              = <4>;
152
+
153
+	lcd_x               = <800>;
154
+	lcd_y               = <1280>;
155
+	lcd_width           = <135>;
156
+	lcd_height          = <216>;
157
+	lcd_dclk_freq       = <75>;
158
+
159
+	lcd_pwm_used        = <1>;
160
+	lcd_pwm_ch          = <2>;
161
+	lcd_pwm_freq        = <50000>;
162
+	lcd_pwm_pol         = <1>;
163
+	lcd_pwm_max_limit   = <255>;
164
+
165
+	lcd_hbp             = <88>;
166
+	lcd_ht              = <960>;
167
+	lcd_hspw            = <4>;
168
+	lcd_vbp             = <12>;
169
+	lcd_vt              = <1300>;
170
+	lcd_vspw            = <4>;
171
+
172
+        lcd_frm             = <0>;
173
+        lcd_gamma_en        = <0>;
174
+        lcd_bright_curve_en = <0>;
175
+        lcd_cmap_en         = <0>;
176
+        deu_mode            = <0>;
177
+        lcdgamma4iep        = <22>;
178
+        smart_color         = <90>;
179
+        lcd_dsi_if          = <0>;
180
+        lcd_dsi_lane        = <4>;
181
+        lcd_dsi_format      = <0>;
182
+        lcd_dsi_te          = <0>;
183
+        lcd_dsi_eotp        = <0>;
184
+
185
+
186
+        lcd_pin_power = "dcdc1";
187
+        lcd_pin_power1 = "eldo3";
188
+        //lcd_pin_power2 = "dldo2";
189
+
190
+        lcd_power = "dc1sw";
191
+        // lcd_bl_en = <&pio PD 21 1 0 3 1>;
192
+			
193
+        // reset
194
+        lcd_gpio_0 = <&pio PE 5 1 0 3 1>;
195
+                        
196
+        // power
197
+        lcd_gpio_1 = <&pio PD 21 1 0 3 1>;
198
+
199
+        pinctrl-0 = <&dsi4lane_pins_a>;
200
+        pinctrl-1 = <&dsi4lane_pins_b>;
201
+        //pinctrl-0 = <&lvds0_pins_a>;
202
+        //pinctrl-1 = <&lvds0_pins_b>;
203
+                };
204
+	};
205
+
206
+&twi0 {
207
+        ctp {
208
+                compatible = "gt9xx_ts";
209
+        	ctp_used = <1>;
210
+                device_type = "ctp";
211
+        	status = "okay";
212
+                ctp_twi_id = <0x0>;
213
+        	ctp_name = "gt9xx";
214
+                reg = <0x5D>;
215
+                ctp_screen_max_x = <1280>;
216
+                ctp_screen_max_y = <800>;
217
+                ctp_revert_x_flag = <0x1>;
218
+                ctp_revert_y_flag = <0x0>;
219
+                ctp_exchange_x_y_flag = <0x1>;
220
+                ctp_int_port = <&pio PE 3 6 0xffffffff 0xffffffff 0>;
221
+                ctp_wakeup =   <&pio PE 4 1 0xffffffff 0xffffffff 1>;
222
+                ctp_power_ldo = <3300>;
223
+                ctp_power_ldo_vol = <3300>;
224
+                ctp_power = <3300>;
225
+        };
226
+};
 longan/kernel/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/Makefile
..
..
@@ -27,7 +27,7 @@
27
27
 		lcd/he0801a068.o lcd/inet_dsi_panel.o lcd/lq101r1sx03.o  \
28
28
 		lcd/WilliamLcd.o lcd/fx070.o lcd/FX070_DHM18BOEL2_1024X600.o \
29
29
 		lcd/bp101wx1-206.o lcd/m133x56-105.o lcd/m133x56-105-two.o lcd/k101im2qa04.o lcd/k101im2byl02l.o \
30
-		conver_chips/lt8911ex.o lcd/K101_IM2BYL02_L_800X1280.o lcd/mipi_8_800x1280.o lcd/mipi_10_800x1280.o
30
+		conver_chips/lt8911ex.o lcd/K101_IM2BYL02_L_800X1280.o lcd/mipi_8_800x1280.o lcd/mipi_10_800x1280.o lcd/mipi_10_800x1280_AT101DS40I.o
31
31
 disp-objs += $(obj_low)
32
32
 
33
33
 disp-objs += lcd/mipi_5_720x1280.o 
 longan/kernel/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/mipi_10_800x1280_AT101DS40I.c
..
..
@@ -0,0 +1,389 @@
1
+#include "mipi_10_800x1280_AT101DS40I.h"
2
+
3
+static void lcd_power_on(u32 sel);
4
+static void lcd_power_off(u32 sel);
5
+static void lcd_bl_open(u32 sel);
6
+static void lcd_bl_close(u32 sel);
7
+
8
+static void lcd_panel_init(u32 sel);
9
+static void lcd_panel_exit(u32 sel);
10
+
11
+#define panel_reset(sel, val) sunxi_lcd_gpio_set_value(sel, 0, val)
12
+
13
+static void lcd_cfg_panel_info(struct panel_extend_para *info)
14
+{
15
+	u32 i = 0, j = 0;
16
+	u32 items;
17
+	u8 lcd_gamma_tbl[][2] = {
18
+		{0, 0},
19
+		{15, 15},
20
+		{30, 30},
21
+		{45, 45},
22
+		{60, 60},
23
+		{75, 75},
24
+		{90, 90},
25
+		{105, 105},
26
+		{120, 120},
27
+		{135, 135},
28
+		{150, 150},
29
+		{165, 165},
30
+		{180, 180},
31
+		{195, 195},
32
+		{210, 210},
33
+		{225, 225},
34
+		{240, 240},
35
+		{255, 255},
36
+	};
37
+
38
+	u32 lcd_cmap_tbl[2][3][4] = {
39
+		{
40
+			{LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
41
+			{LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
42
+			{LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
43
+		},
44
+		{
45
+			{LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
46
+			{LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
47
+			{LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
48
+		},
49
+	};
50
+
51
+	items = sizeof(lcd_gamma_tbl) / 2;
52
+	for (i = 0; i < items - 1; i++) {
53
+		u32 num = lcd_gamma_tbl[i + 1][0] - lcd_gamma_tbl[i][0];
54
+
55
+		for (j = 0; j < num; j++) {
56
+			u32 value = 0;
57
+
58
+			value = lcd_gamma_tbl[i][1] +
59
+				((lcd_gamma_tbl[i + 1][1] - lcd_gamma_tbl[i][1])
60
+				 * j) / num;
61
+			info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
62
+				(value << 16)
63
+				+ (value << 8) + value;
64
+		}
65
+	}
66
+	info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items - 1][1] << 16) +
67
+				   (lcd_gamma_tbl[items - 1][1] << 8)
68
+				   + lcd_gamma_tbl[items - 1][1];
69
+
70
+	memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
71
+
72
+}
73
+
74
+static s32 lcd_open_flow(u32 sel)
75
+{
76
+	LCD_OPEN_FUNC(sel, lcd_power_on, 10);
77
+	LCD_OPEN_FUNC(sel, lcd_panel_init, 10);
78
+	LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 50);
79
+	LCD_OPEN_FUNC(sel, lcd_bl_open, 0);
80
+
81
+	return 0;
82
+}
83
+
84
+static s32 lcd_close_flow(u32 sel)
85
+{
86
+	LCD_CLOSE_FUNC(sel, lcd_bl_close, 0);
87
+	LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 0);
88
+	LCD_CLOSE_FUNC(sel, lcd_panel_exit, 200);
89
+	LCD_CLOSE_FUNC(sel, lcd_power_off, 500);
90
+
91
+	return 0;
92
+}
93
+
94
+static void lcd_power_on(u32 sel)
95
+{
96
+	sunxi_lcd_pin_cfg(sel, 1);
97
+	sunxi_lcd_delay_ms(50);
98
+	panel_reset(sel, 1);
99
+	sunxi_lcd_delay_ms(5);
100
+	panel_reset(sel, 0);
101
+	sunxi_lcd_delay_ms(10);
102
+	panel_reset(sel, 1);
103
+	sunxi_lcd_delay_ms(120);
104
+
105
+}
106
+
107
+static void lcd_power_off(u32 sel)
108
+{
109
+	sunxi_lcd_pin_cfg(sel, 0);
110
+	sunxi_lcd_delay_ms(20);
111
+	panel_reset(sel, 0);
112
+	sunxi_lcd_delay_ms(5);
113
+}
114
+
115
+static void lcd_bl_open(u32 sel)
116
+{
117
+	sunxi_lcd_pwm_enable(sel);
118
+}
119
+
120
+static void lcd_bl_close(u32 sel)
121
+{
122
+	sunxi_lcd_pwm_disable(sel);
123
+}
124
+
125
+#define REGFLAG_DELAY 0XFC
126
+#define REGFLAG_END_OF_TABLE 0xFD /* END OF REGISTERS MARKER */
127
+
128
+struct LCM_setting_table {
129
+	u8 cmd;
130
+	u32 count;
131
+	u8 para_list[32];
132
+};
133
+
134
+static struct LCM_setting_table jd9365[] = {
135
+	{ 0xE0, 1, {0x00} },
136
+	{ 0xE1, 1, {0x93} },
137
+	{ 0xE2, 1, {0x65} },
138
+	{ 0xE3, 1, {0xF8} },
139
+	{ 0x80, 1, {0x03} },
140
+	{ 0xE0, 1, {0x01} },
141
+	{ 0x00, 1, {0x00} },
142
+	{ 0x01, 1, {0x5C} },
143
+	{ 0x17, 1, {0x00} },
144
+	{ 0x18, 1, {0xD7} },
145
+	{ 0x19, 1, {0x01} },
146
+	{ 0x1A, 1, {0x00} },
147
+	{ 0x1B, 1, {0xD7} },
148
+	{ 0x1C, 1, {0x01} },
149
+	{ 0x1F, 1, {0x70} },
150
+	{ 0x20, 1, {0x2D} },
151
+	{ 0x21, 1, {0x2D} },
152
+	{ 0x22, 1, {0x7E} },
153
+	{ 0x24, 1, {0xFD} },
154
+	{ 0x37, 1, {0x19} },
155
+	{ 0x35, 1, {0x28} },
156
+	{ 0x38, 1, {0x05} },
157
+	{ 0x39, 1, {0x08} },
158
+	{ 0x3A, 1, {0x12} },
159
+	{ 0x3C, 1, {0x7E} },
160
+	{ 0x3D, 1, {0xFF} },
161
+	{ 0x3E, 1, {0xFF} },
162
+	{ 0x3F, 1, {0x7F} },
163
+	{ 0x40, 1, {0x06} },
164
+	{ 0x41, 1, {0xA0} },
165
+	{ 0x43, 1, {0x1E} },
166
+	{ 0x44, 1, {0x0B} },
167
+	{ 0x55, 1, {0x01} },
168
+	{ 0x56, 1, {0x01} },
169
+	{ 0x57, 1, {0x6A} },
170
+	{ 0x58, 1, {0x09} },
171
+	{ 0x59, 1, {0x0A} },
172
+	{ 0x5A, 1, {0x2E} },
173
+	{ 0x5B, 1, {0x1A} },
174
+	{ 0x5C, 1, {0x15} },
175
+	{ 0x5D, 1, {0x7F} },
176
+	{ 0x5E, 1, {0x5A} },
177
+	{ 0x5F, 1, {0x47} },
178
+	{ 0x60, 1, {0x3A} },
179
+	{ 0x61, 1, {0x34} },
180
+	{ 0x62, 1, {0x24} },
181
+	{ 0x63, 1, {0x28} },
182
+	{ 0x64, 1, {0x12} },
183
+	{ 0x65, 1, {0x2A} },
184
+	{ 0x66, 1, {0x29} },
185
+	{ 0x67, 1, {0x29} },
186
+	{ 0x68, 1, {0x46} },
187
+	{ 0x69, 1, {0x34} },
188
+	{ 0x6A, 1, {0x37} },
189
+	{ 0x6B, 1, {0x28} },
190
+	{ 0x6C, 1, {0x25} },
191
+	{ 0x6D, 1, {0x1B} },
192
+	{ 0x6E, 1, {0x12} },
193
+	{ 0x6F, 1, {0x02} },
194
+	{ 0x70, 1, {0x7F} },
195
+	{ 0x71, 1, {0x5A} },
196
+	{ 0x72, 1, {0x47} },
197
+	{ 0x73, 1, {0x3A} },
198
+	{ 0x74, 1, {0x34} },
199
+	{ 0x75, 1, {0x24} },
200
+	{ 0x76, 1, {0x28} },
201
+	{ 0x77, 1, {0x12} },
202
+	{ 0x78, 1, {0x2A} },
203
+	{ 0x79, 1, {0x29} },
204
+	{ 0x7A, 1, {0x29} },
205
+	{ 0x7B, 1, {0x46} },
206
+	{ 0x7C, 1, {0x34} },
207
+	{ 0x7D, 1, {0x37} },
208
+	{ 0x7E, 1, {0x28} },
209
+	{ 0x7F, 1, {0x25} },
210
+	{ 0x80, 1, {0x1B} },
211
+	{ 0x81, 1, {0x12} },
212
+	{ 0x82, 1, {0x02} },
213
+	{ 0xE0, 1, {0x02} },
214
+	{ 0x00, 1, {0x52} },
215
+	{ 0x01, 1, {0x55} },
216
+	{ 0x02, 1, {0x55} },
217
+	{ 0x03, 1, {0x50} },
218
+	{ 0x04, 1, {0x77} },
219
+	{ 0x05, 1, {0x57} },
220
+	{ 0x06, 1, {0x55} },
221
+	{ 0x07, 1, {0x4E} },
222
+	{ 0x08, 1, {0x4C} },
223
+	{ 0x09, 1, {0x5F} },
224
+	{ 0x0A, 1, {0x4A} },
225
+	{ 0x0B, 1, {0x48} },
226
+	{ 0x0C, 1, {0x55} },
227
+	{ 0x0D, 1, {0x46} },
228
+	{ 0x0E, 1, {0x44} },
229
+	{ 0x0F, 1, {0x40} },
230
+	{ 0x10, 1, {0x55} },
231
+	{ 0x11, 1, {0x55} },
232
+	{ 0x12, 1, {0x55} },
233
+	{ 0x13, 1, {0x55} },
234
+	{ 0x14, 1, {0x55} },
235
+	{ 0x15, 1, {0x55} },
236
+	{ 0x16, 1, {0x53} },
237
+	{ 0x17, 1, {0x55} },
238
+	{ 0x18, 1, {0x55} },
239
+	{ 0x19, 1, {0x51} },
240
+	{ 0x1A, 1, {0x77} },
241
+	{ 0x1B, 1, {0x57} },
242
+	{ 0x1C, 1, {0x55} },
243
+	{ 0x1D, 1, {0x4F} },
244
+	{ 0x1E, 1, {0x4D} },
245
+	{ 0x1F, 1, {0x5F} },
246
+	{ 0x20, 1, {0x4B} },
247
+	{ 0x21, 1, {0x49} },
248
+	{ 0x22, 1, {0x55} },
249
+	{ 0x23, 1, {0x47} },
250
+	{ 0x24, 1, {0x45} },
251
+	{ 0x25, 1, {0x41} },
252
+	{ 0x26, 1, {0x55} },
253
+	{ 0x27, 1, {0x55} },
254
+	{ 0x28, 1, {0x55} },
255
+	{ 0x29, 1, {0x55} },
256
+	{ 0x2A, 1, {0x55} },
257
+	{ 0x2B, 1, {0x55} },
258
+	{ 0x2C, 1, {0x13} },
259
+	{ 0x2D, 1, {0x15} },
260
+	{ 0x2E, 1, {0x15} },
261
+	{ 0x2F, 1, {0x01} },
262
+	{ 0x30, 1, {0x37} },
263
+	{ 0x31, 1, {0x17} },
264
+	{ 0x32, 1, {0x15} },
265
+	{ 0x33, 1, {0x0D} },
266
+	{ 0x34, 1, {0x0F} },
267
+	{ 0x35, 1, {0x15} },
268
+	{ 0x36, 1, {0x05} },
269
+	{ 0x37, 1, {0x07} },
270
+	{ 0x38, 1, {0x15} },
271
+	{ 0x39, 1, {0x09} },
272
+	{ 0x3A, 1, {0x0B} },
273
+	{ 0x3B, 1, {0x11} },
274
+	{ 0x3C, 1, {0x15} },
275
+	{ 0x3D, 1, {0x15} },
276
+	{ 0x3E, 1, {0x15} },
277
+	{ 0x3F, 1, {0x15} },
278
+	{ 0x40, 1, {0x15} },
279
+	{ 0x41, 1, {0x15} },
280
+	{ 0x42, 1, {0x12} },
281
+	{ 0x43, 1, {0x15} },
282
+	{ 0x44, 1, {0x15} },
283
+	{ 0x45, 1, {0x00} },
284
+	{ 0x46, 1, {0x37} },
285
+	{ 0x47, 1, {0x17} },
286
+	{ 0x48, 1, {0x15} },
287
+	{ 0x49, 1, {0x0C} },
288
+	{ 0x4A, 1, {0x0E} },
289
+	{ 0x4B, 1, {0x15} },
290
+	{ 0x4C, 1, {0x04} },
291
+	{ 0x4D, 1, {0x06} },
292
+	{ 0x4E, 1, {0x15} },
293
+	{ 0x4F, 1, {0x08} },
294
+	{ 0x50, 1, {0x0A} },
295
+	{ 0x51, 1, {0x10} },
296
+	{ 0x52, 1, {0x15} },
297
+	{ 0x53, 1, {0x15} },
298
+	{ 0x54, 1, {0x15} },
299
+	{ 0x55, 1, {0x15} },
300
+	{ 0x56, 1, {0x15} },
301
+	{ 0x57, 1, {0x15} },
302
+	{ 0x58, 1, {0x40} },
303
+	{ 0x5B, 1, {0x10} },
304
+	{ 0x5C, 1, {0x06} },
305
+	{ 0x5D, 1, {0x40} },
306
+	{ 0x5E, 1, {0x00} },
307
+	{ 0x5F, 1, {0x00} },
308
+	{ 0x60, 1, {0x40} },
309
+	{ 0x61, 1, {0x03} },
310
+	{ 0x62, 1, {0x04} },
311
+	{ 0x63, 1, {0x6C} },
312
+	{ 0x64, 1, {0x6C} },
313
+	{ 0x65, 1, {0x75} },
314
+	{ 0x66, 1, {0x08} },
315
+	{ 0x67, 1, {0xB4} },
316
+	{ 0x68, 1, {0x08} },
317
+	{ 0x69, 1, {0x6C} },
318
+	{ 0x6A, 1, {0x6C} },
319
+	{ 0x6B, 1, {0x0C} },
320
+	{ 0x6D, 1, {0x00} },
321
+	{ 0x6E, 1, {0x00} },
322
+	{ 0x6F, 1, {0x88} },
323
+	{ 0x75, 1, {0xBB} },
324
+	{ 0x76, 1, {0x00} },
325
+	{ 0x77, 1, {0x05} },
326
+	{ 0x78, 1, {0x2A} },
327
+	{ 0xE0, 1, {0x04} },
328
+	{ 0x09, 1, {0x11} },
329
+	{ 0x0E, 1, {0x48} },
330
+
331
+	{ 0x37, 1, {0x58} },
332
+
333
+	{ 0x2D, 1, {0x03} },
334
+	{ 0xE0, 1, {0x00} },
335
+	{ 0xE6, 1, {0x02} },
336
+	{ 0xE7, 1, {0x06} },
337
+
338
+
339
+	{ 0x11, 0, { 0x00 } }, // SLPOUT
340
+	{ REGFLAG_DELAY, REGFLAG_DELAY, { 120 } },
341
+
342
+	//DISP ON
343
+	{ 0x29, 0, { 0x00 } }, // DSPON
344
+	{ REGFLAG_DELAY, REGFLAG_DELAY, { 20 } },
345
+	{ REGFLAG_END_OF_TABLE, REGFLAG_END_OF_TABLE, {} }
346
+};
347
+
348
+static void lcd_panel_init(u32 sel)
349
+{
350
+	__u32 i;
351
+	sunxi_lcd_dsi_clk_enable(sel);
352
+	sunxi_lcd_delay_ms(100);
353
+	for (i = 0;; i++) {
354
+		if (jd9365[i].count == REGFLAG_END_OF_TABLE)
355
+			break;
356
+		else if (jd9365[i].count == REGFLAG_DELAY) {
357
+			sunxi_lcd_delay_ms(jd9365[i].para_list[0]);
358
+		} else {
359
+			dsi_gen_wr(sel, jd9365[i].cmd,
360
+				   jd9365[i].para_list,
361
+				   jd9365[i].count);
362
+		}
363
+		/* break; */
364
+	}
365
+}
366
+
367
+static void lcd_panel_exit(u32 sel)
368
+{
369
+	sunxi_lcd_dsi_dcs_write_0para(sel, 0x10);
370
+	sunxi_lcd_delay_ms(80);
371
+	sunxi_lcd_dsi_dcs_write_0para(sel, 0x28);
372
+	sunxi_lcd_delay_ms(50);
373
+}
374
+
375
+/*sel: 0:lcd0; 1:lcd1*/
376
+static s32 lcd_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
377
+{
378
+	return 0;
379
+}
380
+
381
+__lcd_panel_t mipi_10_800x1280_AT101DS40I_panel = {
382
+	.name = "mipi_10_800x1280_AT101DS40I",
383
+	.func = {
384
+		.cfg_panel_info = lcd_cfg_panel_info,
385
+		.cfg_open_flow = lcd_open_flow,
386
+		.cfg_close_flow = lcd_close_flow,
387
+		.lcd_user_defined_func = lcd_user_defined_func,
388
+	},
389
+};
 longan/kernel/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/mipi_10_800x1280_AT101DS40I.h
..
..
@@ -0,0 +1,23 @@
1
+/* drivers/video/sunxi/disp2/disp/lcd/k101im2qa04.h
2
+ *
3
+ * Copyright (c) 2017 Allwinnertech Co., Ltd.
4
+ * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
5
+ *
6
+ * k101im2qa04 panel driver
7
+ *
8
+ * This program is free software; you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License version 2 as
10
+ * published by the Free Software Foundation.
11
+*/
12
+
13
+#ifndef _MIPI_10_800X1280_H
14
+#define _MIPI_10_800X1280_H
15
+
16
+#include "panels.h"
17
+
18
+typedef struct __lcd_panel __lcd_panel_t;
19
+
20
+extern struct __lcd_panel mipi_10_800x1280_AT101DS40I_panel;
21
+extern s32 bsp_disp_get_panel_info(u32 screen_id, struct disp_panel_para *info);
22
+
23
+#endif /*End of file*/
 longan/kernel/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/panels.c
..
..
@@ -41,6 +41,7 @@
41
41
 	&K101_IM2BYL02_L_800X1280_mipi_panel,
42
42
 	&mipi_8_800x1280_panel,
43
43
 	&mipi_10_800x1280_panel,
44
+	&mipi_10_800x1280_AT101DS40I_panel,
44
45
     &mipi_5_720x1280_panel,
45
46
 	NULL,
46
47
 };
 longan/kernel/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/panels.h
..
..
@@ -100,5 +100,6 @@
100
100
 extern struct __lcd_panel K101_IM2BYL02_L_800X1280_mipi_panel;
101
101
 extern struct __lcd_panel mipi_8_800x1280_panel;
102
102
 extern struct __lcd_panel mipi_10_800x1280_panel;
103
+extern struct __lcd_panel mipi_10_800x1280_AT101DS40I_panel;
103
104
 extern struct __lcd_panel mipi_5_720x1280_panel;
104
105
 #endif