feat(mipi): add 8' and 10' mipi support

lin

2025-01-10 2e0fe69425adee0529756dc3381ac1838197f3ac

feat(mipi): add 8' and 10' mipi support

Signed-off-by: lin <lin@kickpi.com>

 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/Makefile
..
..
@@ -51,8 +51,8 @@
51
51
 disp-$(CONFIG_LCD_SUPPORT_ST7789V_CPU) += lcd/st7789v_cpu.o
52
52
 disp-$(CONFIG_LCD_SUPPORT_M101B31) += lcd/M101B31.o
53
53
 disp-$(CONFIG_LCD_SUPPORT_K101_IM2BYL02_L_800X1280) += lcd/K101_IM2BYL02_L_800X1280.o
54
-disp-y				+= lcd/mipi_800x1280.o
55
-
54
+disp-y				+= lcd/mipi_8_800x1280.o
55
+disp-y				+= lcd/mipi_10_800x1280.o
56
56
 
57
57
 ifeq ($(CONFIG_MACH_SUN8IW6),y)
58
58
     export MIPI_DSI_IP_VERSION := 28
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_10_800x1280.c
..
..
@@ -0,0 +1,366 @@
1
+#include "mipi_10_800x1280.h"
2
+
3
+static void lcd_power_on(u32 sel);
4
+static void lcd_power_off(u32 sel);
5
+static void lcd_bl_open(u32 sel);
6
+static void lcd_bl_close(u32 sel);
7
+
8
+static void lcd_panel_init1(u32 sel);
9
+static void lcd_panel_exit(u32 sel);
10
+
11
+#define panel_reset(sel, val) sunxi_lcd_gpio_set_value(sel, 0, val)
12
+
13
+static void lcd_cfg_panel_info(panel_extend_para *info)
14
+{
15
+	u32 i = 0, j = 0;
16
+	u32 items;
17
+	u8 lcd_gamma_tbl[][2] = {
18
+		{0, 0},
19
+		{15, 15},
20
+		{30, 30},
21
+		{45, 45},
22
+		{60, 60},
23
+		{75, 75},
24
+		{90, 90},
25
+		{105, 105},
26
+		{120, 120},
27
+		{135, 135},
28
+		{150, 150},
29
+		{165, 165},
30
+		{180, 180},
31
+		{195, 195},
32
+		{210, 210},
33
+		{225, 225},
34
+		{240, 240},
35
+		{255, 255},
36
+	};
37
+
38
+	u32 lcd_cmap_tbl[2][3][4] = {
39
+	{
40
+		{LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
41
+		{LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
42
+		{LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
43
+		},
44
+		{
45
+		{LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
46
+		{LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
47
+		{LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
48
+		},
49
+	};
50
+
51
+	items = sizeof(lcd_gamma_tbl) / 2;
52
+	for (i = 0; i < items - 1; i++) {
53
+		u32 num = lcd_gamma_tbl[i+1][0] - lcd_gamma_tbl[i][0];
54
+
55
+		for (j = 0; j < num; j++) {
56
+			u32 value = 0;
57
+
58
+			value = lcd_gamma_tbl[i][1] +
59
+				((lcd_gamma_tbl[i+1][1] - lcd_gamma_tbl[i][1])
60
+				* j) / num;
61
+			info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
62
+							(value<<16)
63
+							+ (value<<8) + value;
64
+		}
65
+	}
66
+	info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items-1][1]<<16) +
67
+					(lcd_gamma_tbl[items-1][1]<<8)
68
+					+ lcd_gamma_tbl[items-1][1];
69
+
70
+	memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
71
+
72
+}
73
+
74
+static s32 lcd_open_flow(u32 sel)
75
+{
76
+	LCD_OPEN_FUNC(sel, lcd_power_on, 50);
77
+	LCD_OPEN_FUNC(sel, lcd_panel_init1, 20);
78
+	LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 20);
79
+	lcd_bl_open(sel);
80
+
81
+	return 0;
82
+}
83
+
84
+static s32 lcd_close_flow(u32 sel)
85
+{
86
+	LCD_CLOSE_FUNC(sel, lcd_bl_close, 0);
87
+	LCD_CLOSE_FUNC(sel, lcd_panel_exit, 1);
88
+	LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 10);
89
+	LCD_CLOSE_FUNC(sel, lcd_power_off, 0);
90
+
91
+	return 0;
92
+}
93
+
94
+static void lcd_power_on(u32 sel)
95
+{
96
+	sunxi_lcd_pin_cfg(sel, 1);
97
+
98
+	panel_reset(sel, 0);
99
+	sunxi_lcd_power_enable(sel, 0);
100
+	sunxi_lcd_power_enable(sel, 1);
101
+	sunxi_lcd_delay_ms(50);
102
+	panel_reset(sel, 1);
103
+	sunxi_lcd_delay_ms(10);
104
+	panel_reset(sel, 0);
105
+	sunxi_lcd_delay_ms(20);
106
+	panel_reset(sel, 1);
107
+	sunxi_lcd_delay_ms(120);
108
+}
109
+
110
+static void lcd_power_off(u32 sel)
111
+{
112
+	panel_reset(sel, 0);
113
+	sunxi_lcd_delay_ms(1);
114
+	sunxi_lcd_power_disable(sel, 1);
115
+	sunxi_lcd_delay_ms(1);
116
+	sunxi_lcd_power_disable(sel, 0);
117
+	sunxi_lcd_pin_cfg(sel, 0);
118
+}
119
+
120
+static void lcd_bl_open(u32 sel)
121
+{
122
+	sunxi_lcd_pwm_enable(sel);
123
+	sunxi_lcd_backlight_enable(sel);
124
+}
125
+
126
+static void lcd_bl_close(u32 sel)
127
+{
128
+	sunxi_lcd_backlight_disable(sel);
129
+	sunxi_lcd_pwm_disable(sel);
130
+}
131
+
132
+static void lcd_panel_init1(u32 sel)
133
+{
134
+	printk(KERN_ERR"------uboot----> mipi_10_800x1280 init\n");
135
+	sunxi_lcd_dsi_clk_enable(sel);
136
+	sunxi_lcd_delay_ms(5);
137
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE0, 0x00),
138
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE1, 0x93),
139
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE2, 0x65),
140
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE3, 0xF8),
141
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x80, 0x03), //0X03��o4-LANE;0X02��o3-LANE;0X01:2-LANE
142
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE0, 0x01),
143
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x00, 0x00),
144
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x01, 0x2F),
145
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x03, 0x00),
146
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x04, 0xa0),
147
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0C, 0x74),
148
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x17, 0x00),
149
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x18, 0xAF),
150
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x19, 0x01),
151
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1A, 0x00),
152
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1B, 0xAF),
153
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1C, 0x01),
154
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1F, 0x3E),
155
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x20, 0x28),
156
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x21, 0x28),
157
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x22, 0x7E),
158
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x24, 0xFE),
159
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x35, 0x26),
160
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x37, 0x09),
161
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x38, 0x04),
162
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x39, 0x00),
163
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3A, 0x01),
164
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3C, 0x7C),
165
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3D, 0xFF),
166
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3E, 0xFF),
167
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3F, 0x7F),
168
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x40, 0x06),
169
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x41, 0xA0),
170
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x42, 0x81),
171
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x43, 0x08),
172
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x44, 0x0B),
173
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x45, 0x28),
174
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x55, 0x02), 
175
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x57, 0x69),
176
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x59, 0x0A),
177
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5A, 0x28),
178
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5B, 0x14),
179
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5D, 0x7C),
180
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5E, 0x65),
181
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5F, 0x55),
182
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x60, 0x47),
183
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x61, 0x43),
184
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x62, 0x32),
185
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x63, 0x34),
186
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x64, 0x1C),
187
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x65, 0x33),
188
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x66, 0x31),
189
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x67, 0x30),
190
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x68, 0x4E),
191
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x69, 0x3C),
192
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6A, 0x44),
193
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6B, 0x35),
194
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6C, 0x31),
195
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6D, 0x23),
196
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6E, 0x11),
197
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6F, 0x00),
198
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x70, 0x7C),
199
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x71, 0x65),
200
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x72, 0x55),
201
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x73, 0x47),
202
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x74, 0x43),
203
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x75, 0x32),
204
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x76, 0x34),
205
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x77, 0x1C),
206
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x78, 0x33),
207
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x79, 0x31),
208
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x7A, 0x30),
209
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x7B, 0x4E),
210
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x7C, 0x3C),
211
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x7D, 0x44),
212
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x7E, 0x35),
213
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x7F, 0x31),
214
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x80, 0x23),
215
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x81, 0x11),
216
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x82, 0x00),
217
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE0, 0x02),
218
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x00, 0x1E),
219
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x01, 0x1E),
220
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x02, 0x41),
221
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x03, 0x41),
222
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x04, 0x43),
223
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x05, 0x43),
224
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x06, 0x1F),
225
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x07, 0x1F),
226
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x08, 0x1F),
227
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x09, 0x1F),
228
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0A, 0x1E),
229
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0B, 0x1E),
230
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0C, 0x1F),
231
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0D, 0x47),
232
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0E, 0x47),
233
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0F, 0x45),
234
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x10, 0x45),
235
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x11, 0x4B),
236
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x12, 0x4B),
237
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x13, 0x49),
238
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x14, 0x49),
239
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x15, 0x1F),
240
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x16, 0x1E),
241
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x17, 0x1E),
242
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x18, 0x40),
243
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x19, 0x40),
244
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1A, 0x42),
245
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1B, 0x42),
246
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1C, 0x1F),
247
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1D, 0x1F),
248
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1E, 0x1F),
249
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x1F, 0x1F),
250
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x20, 0x1E),
251
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x21, 0x1E),
252
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x22, 0x1F),
253
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x23, 0x46),
254
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x24, 0x46),
255
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x25, 0x44),
256
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x26, 0x44),
257
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x27, 0x4A),
258
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x28, 0x4A),
259
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x29, 0x48),
260
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x2A, 0x48),
261
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x2B, 0x1F),
262
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x2C, 0x1F),
263
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x2D, 0x1F),
264
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x2E, 0x00),
265
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x2F, 0x00),
266
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x30, 0x00),
267
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x31, 0x00),
268
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x32, 0x1E),
269
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x33, 0x1E),
270
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x34, 0x35),
271
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x35, 0x1F),
272
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x36, 0x15),
273
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x37, 0x15),
274
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x38, 0x1F),
275
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x39, 0x08),
276
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3A, 0x08),
277
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3B, 0x0A),
278
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3C, 0x0A),
279
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3D, 0x04),
280
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3E, 0x04),
281
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x3F, 0x06),
282
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x40, 0x06),
283
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x41, 0x1F),
284
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x42, 0x1F),
285
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x43, 0x1F),
286
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x44, 0x01),
287
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x45, 0x01),
288
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x46, 0x01),
289
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x47, 0x01),
290
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x48, 0x1E),
291
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x49, 0x1E),
292
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x4A, 0x35),
293
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x4B, 0x1F),
294
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x4C, 0x15),
295
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x4D, 0x15),
296
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x4E, 0x1F),
297
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x4F, 0x09),
298
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x50, 0x09),
299
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x51, 0x0B),
300
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x52, 0x0B),
301
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x53, 0x05),
302
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x54, 0x05),
303
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x55, 0x07),
304
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x56, 0x07),
305
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x57, 0x1F),
306
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x58, 0x40),
307
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5B, 0x30),
308
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5C, 0x03),
309
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5D, 0x30),
310
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5E, 0x01),
311
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x5F, 0x02),
312
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x63, 0x14),
313
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x64, 0x6A),
314
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x67, 0x73),
315
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x68, 0x05),
316
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x69, 0x14),
317
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6A, 0x6A),
318
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6B, 0x0C),
319
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6C, 0x00),
320
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6D, 0x00),
321
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6E, 0x00),
322
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x6F, 0x88),
323
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xE0, 0x04),
324
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x02, 0x23), //20200330 modify
325
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x09, 0x11),
326
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x0E, 0x48),
327
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x36, 0x49),
328
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x37, 0x58), //2022-1-22
329
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0xe0, 0x00),
330
+
331
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x11, 0x00), // SLPOUT
332
+	sunxi_lcd_delay_ms(5);
333
+	//DISP ON
334
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x29, 0x00), // SLPOUT
335
+	sunxi_lcd_delay_ms(5);
336
+	sunxi_lcd_dsi_dcs_write_1para(sel, 0x35, 0x00);
337
+	
338
+}
339
+
340
+
341
+static void lcd_panel_exit(u32 sel)
342
+{
343
+	sunxi_lcd_dsi_dcs_write_0para(sel, 0x28);
344
+	sunxi_lcd_delay_ms(1);
345
+	sunxi_lcd_dsi_dcs_write_0para(sel, 0x10);
346
+	sunxi_lcd_delay_ms(1);
347
+}
348
+
349
+/*sel: 0:lcd0; 1:lcd1*/
350
+static s32 lcd_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
351
+{
352
+	return 0;
353
+}
354
+
355
+__lcd_panel_t mipi_10_800x1280_panel = {
356
+	/* panel driver name, must mach the name of
357
+	 * lcd_drv_name in sys_config.fex
358
+	 */
359
+	.name = "mipi_10_800x1280",
360
+	.func = {
361
+		.cfg_panel_info = lcd_cfg_panel_info,
362
+		.cfg_open_flow = lcd_open_flow,
363
+		.cfg_close_flow = lcd_close_flow,
364
+		.lcd_user_defined_func = lcd_user_defined_func,
365
+	},
366
+};
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_800x1280.h
similarity index 80%copy from longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_800x1280.hcopy to longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_10_800x1280.h
..
..
@@ -10,11 +10,11 @@
10
10
  * published by the Free Software Foundation.
11
11
 */
12
12
 
13
-#ifndef _MIPI_800X1280_H
14
-#define _MIPI_800X1280_H
13
+#ifndef _MIPI_10_800X1280_H
14
+#define _MIPI_10_800X1280_H
15
15
 
16
16
 #include "panels.h"
17
17
 
18
-extern __lcd_panel_t mipi_800x1280_panel;
18
+extern __lcd_panel_t mipi_10_800x1280_panel;
19
19
 
20
20
 #endif /*End of file*/
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_800x1280.c
similarity index 99%rename from longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_800x1280.crename to longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_8_800x1280.c
..
..
@@ -1,4 +1,4 @@
1
-#include "mipi_800x1280.h"
1
+#include "mipi_8_800x1280.h"
2
2
 
3
3
 static void lcd_power_on(u32 sel);
4
4
 static void lcd_power_off(u32 sel);
..
..
@@ -359,11 +359,11 @@
359
359
 	return 0;
360
360
 }
361
361
 
362
-__lcd_panel_t mipi_800x1280_panel = {
362
+__lcd_panel_t mipi_8_800x1280_panel = {
363
363
 	/* panel driver name, must mach the name of
364
364
 	 * lcd_drv_name in sys_config.fex
365
365
 	 */
366
-	.name = "mipi_800x1280",
366
+	.name = "mipi_8_800x1280",
367
367
 	.func = {
368
368
 		.cfg_panel_info = lcd_cfg_panel_info,
369
369
 		.cfg_open_flow = lcd_open_flow,
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_800x1280.h
similarity index 81%rename from longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_800x1280.hrename to longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/mipi_8_800x1280.h
..
..
@@ -10,11 +10,11 @@
10
10
  * published by the Free Software Foundation.
11
11
 */
12
12
 
13
-#ifndef _MIPI_800X1280_H
14
-#define _MIPI_800X1280_H
13
+#ifndef _MIPI_8_800X1280_H
14
+#define _MIPI_8_800X1280_H
15
15
 
16
16
 #include "panels.h"
17
17
 
18
-extern __lcd_panel_t mipi_800x1280_panel;
18
+extern __lcd_panel_t mipi_8_800x1280_panel;
19
19
 
20
20
 #endif /*End of file*/
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/panels.c
..
..
@@ -135,8 +135,8 @@
135
135
 	&K101_IM2BYL02_L_800X1280_mipi_panel,
136
136
 #endif
137
137
 
138
-	&mipi_800x1280_panel,
139
-
138
+	&mipi_8_800x1280_panel,
139
+	&mipi_10_800x1280_panel,
140
140
 	/* add new panel below */
141
141
 
142
142
 	NULL,
 longan/brandy/brandy-2.0/u-boot-2018/drivers/video/sunxi/disp2/disp/lcd/panels.h
..
..
@@ -237,6 +237,7 @@
237
237
 extern __lcd_panel_t K101_IM2BYL02_L_800X1280_mipi_panel;
238
238
 #endif
239
239
 
240
-extern __lcd_panel_t mipi_800x1280_panel;
240
+extern __lcd_panel_t mipi_8_800x1280_panel;
241
+extern __lcd_panel_t mipi_10_800x1280_panel;
241
242
 
242
243
 #endif
 longan/device/config/chips/a133/configs/c3/kickpi-k5.dts
..
..
@@ -1443,3 +1443,4 @@
1443
1443
 //#include "lcd-lvds-21-1920-1080.dtsi"
1444
1444
 #include "lcd-lvds-7-1024-600.dtsi"
1445
1445
 //#include "lcd-mipi-10-800-1280.dtsi"
1446
+//#include "lcd-mipi-8-800-1280.dtsi"
 longan/device/config/chips/a133/configs/c3/kickpi-k5c.dts
..
..
@@ -1467,3 +1467,4 @@
1467
1467
 //#include "lcd-lvds-21-1920-1080.dtsi"
1468
1468
 #include "lcd-lvds-7-1024-600.dtsi"
1469
1469
 //#include "lcd-mipi-10-800-1280.dtsi"
1470
+//#include "lcd-mipi-8-800-1280.dtsi"
 longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/lcd-mipi-10-800-1280.dtsi
..
..
@@ -146,7 +146,7 @@
146
146
                 lcd0: lcd0@01c0c000 {
147
147
                         lcd_used            = <1>;
148
148
 
149
-                        lcd_driver_name     = "mipi_800x1280";
149
+                        lcd_driver_name     = "mipi_10_800x1280";
150
150
                         lcd_backlight       = <50>;
151
151
                         lcd_if              = <4>;
152
152
 
..
..
@@ -154,7 +154,7 @@
154
154
                         lcd_y               = <1280>;
155
155
                         lcd_width           = <220>;
156
156
                         lcd_height          = <140>;
157
-                        lcd_dclk_freq       = <68>;
157
+                        lcd_dclk_freq       = <75>;
158
158
 
159
159
                         lcd_pwm_used        = <1>;
160
160
                         lcd_pwm_ch          = <2>;
..
..
@@ -170,9 +170,9 @@
170
170
                         //lcd_vt              = <1344>;
171
171
                         //lcd_vspw            = <2>;
172
172
 
173
-			lcd_hbp             = <36>;
174
-			lcd_ht              = <854>;
175
-			lcd_hspw            = <18>;
173
+			lcd_hbp             = <88>;
174
+			lcd_ht              = <960>;
175
+			lcd_hspw            = <4>;
176
176
 			lcd_vbp             = <12>;
177
177
 			lcd_vt              = <1320>;
178
178
 			lcd_vspw            = <4>;
 longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/lcd-mipi-8-800-1280.dtsi
..
..
@@ -0,0 +1,217 @@
1
+&soc {
2
+/*----------------------------------------------------------------------------------
3
+disp init configuration
4
+
5
+disp_mode             (0:screen0<screen0,fb0>)
6
+screenx_output_type   (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
7
+screenx_output_mode   (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
8
+                      (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
9
+screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
10
+screenx_output_bits   (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
11
+screenx_output_eotf   (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
12
+screenx_output_cs     (for hdmi, 0:undefined  257:BT709 260:BT601  263:BT2020)
13
+screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
14
+screen0_output_range   (for hdmi, 0:default 1:full 2:limited)
15
+screen0_output_scan    (for hdmi, 0:no data 1:overscan 2:underscan)
16
+screen0_output_aspect_ratio  (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
17
+fbx format            (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
18
+fbx pixel sequence    (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
19
+fb0_scaler_mode_enable(scaler mode enable, used FE)
20
+fbx_width,fbx_height  (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
21
+lcdx_backlight        (lcd init backlight,the range:[0,256],default:197
22
+lcdx_yy               (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
23
+lcd0_contrast         (LCD contrast, 0~100)
24
+lcd0_saturation       (LCD saturation, 0~100)
25
+lcd0_hue              (LCD hue, 0~100)
26
+framebuffer software rotation setting:
27
+disp_rotation_used:   (0:disable; 1:enable,you must set fbX_width to lcd_y,
28
+set fbX_height to lcd_x)
29
+degreeX:              (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
30
+degreeX_Y:            (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
31
+devX_output_type : config output type in bootGUI framework in UBOOT-2018.
32
+				   (0:none; 1:lcd; 2:tv; 4:hdmi;)
33
+devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
34
+devX_screen_id   : config display index of bootGUI framework in UBOOT-2018
35
+devX_do_hpd      : whether do hpd detectation or not in UBOOT-2018
36
+chn_cfg_mode     : Hardware DE channel allocation config. 0:single display with 6
37
+				   channel, 1:dual display with 4 channel in main display and 2 channel in second
38
+                   display, 2:dual display with 3 channel in main display and 3 channel in second
39
+                   in display.
40
+----------------------------------------------------------------------------------*/
41
+                disp: disp@06000000 {
42
+                        disp_init_enable         = <1>;
43
+                        disp_mode                = <0>;
44
+
45
+                        screen0_output_type      = <1>;
46
+                        screen0_output_mode      = <4>;
47
+
48
+                        screen1_output_type      = <1>;
49
+                        screen1_output_mode      = <4>;
50
+
51
+                        screen1_output_format    = <0>;
52
+                        screen1_output_bits      = <0>;
53
+                        screen1_output_eotf      = <4>;
54
+                        screen1_output_cs        = <257>;
55
+                        screen1_output_dvi_hdmi  = <2>;
56
+                        screen1_output_range     = <2>;
57
+                        screen1_output_scan      = <0>;
58
+                        screen1_output_aspect_ratio = <8>;
59
+
60
+                        dev0_output_type         = <1>;
61
+                        dev0_output_mode         = <4>;
62
+                        dev0_screen_id           = <0>;
63
+                        dev0_do_hpd              = <0>;
64
+
65
+                        dev1_output_type         = <4>;
66
+                        dev1_output_mode         = <10>;
67
+                        dev1_screen_id           = <1>;
68
+                        dev1_do_hpd              = <1>;
69
+
70
+                        def_output_dev           = <0>;
71
+                        hdmi_mode_check          = <1>;
72
+
73
+                        fb0_format               = <0>;
74
+                        fb0_width                = <800>;
75
+                        fb0_height               = <1280>;
76
+
77
+                        fb1_format               = <0>;
78
+                        fb1_width                = <0>;
79
+                        fb1_height               = <0>;
80
+                        chn_cfg_mode             = <1>;
81
+
82
+                        disp_para_zone           = <1>;
83
+                        dc1sw-supply = <&reg_dc1sw>;
84
+                        eldo3-supply = <&reg_eldo3>;
85
+                        dldo2-supply = <&reg_dldo2>;
86
+                        dcdc1-supply = <&reg_dcdc1>;
87
+                };
88
+/*----------------------------------------------------------------------------------
89
+;lcd0 configuration
90
+
91
+;lcd_if:               0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
92
+;lcd_hv_if             0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
93
+;lcd_hv_clk_phase      0:0 degree;1:90 degree;2:180 degree;3:270 degree
94
+;lcd_hv_sync_polarity  0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
95
+;lcd_hv_syuv_seq       0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
96
+;lcd_cpu_if            0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
97
+;                      6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
98
+;lcd_cpu_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
99
+;lcd_dsi_if            0:video mode; 1: Command mode; 2:video burst mode
100
+;lcd_dsi_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
101
+;lcd_x:                lcd horizontal resolution
102
+;lcd_y:                lcd vertical resolution
103
+;lcd_width:            width of lcd in mm
104
+;lcd_height:           height of lcd in mm
105
+;lcd_dclk_freq:        in MHZ unit
106
+;lcd_pwm_freq:         in HZ unit
107
+;lcd_pwm_pol:          lcd backlight PWM polarity
108
+;lcd_pwm_max_limit     lcd backlight PWM max limit(<=255)
109
+;lcd_hbp:              hsync back porch(pixel) + hsync plus width(pixel);
110
+;lcd_ht:               hsync total cycle(pixel)
111
+;lcd_vbp:              vsync back porch(line) + vysnc plus width(line)
112
+;lcd_vt:               vysnc total cycle(line)
113
+;lcd_hspw:             hsync plus width(pixel)
114
+;lcd_vspw:             vysnc plus width(pixel)
115
+;lcd_lvds_if:          0:single link;  1:dual link
116
+;lcd_lvds_colordepth:  0:8bit; 1:6bit
117
+;lcd_lvds_mode:        0:NS mode; 1:JEIDA mode
118
+;lcd_frm:              0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
119
+;lcd_io_phase:         0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
120
+;                      8~11bit:dclk phase; 12~15bit:de phase)
121
+;lcd_gamma_en          lcd gamma correction enable
122
+;lcd_bright_curve_en   lcd bright curve correction enable
123
+;lcd_cmap_en           lcd color map function enable
124
+;deu_mode              0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
125
+;lcdgamma4iep:         Smart Backlight parameter, lcd gamma vale * 10;
126
+;                      decrease it while lcd is not bright enough; increase while lcd is too bright
127
+;smart_color           90:normal lcd screen 65:retina lcd screen(9.7inch)
128
+;Pin setting for special function ie.LVDS, RGB data or vsync
129
+;   name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
130
+;Pin setting for gpio:
131
+;   lcd_gpio_X     = port:PD12<pin function><pull up or pull down><drive ability><output level>
132
+;Pin setting for backlight enable pin
133
+;   lcd_bl_en     = port:PD12<pin function><pull up or pull down><drive ability><output level>
134
+;fsync setting, pulse to csi
135
+;lcd_fsync_en          (0:disable fsync,1:enable)
136
+;lcd_fsync_act_time    (active time of fsync, unit:pixel)
137
+;lcd_fsync_dis_time    (disactive time of fsync, unit:pixel)
138
+;lcd_fsync_pol         (0:positive;1:negative)
139
+;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
140
+pull up or pull down(default 0), driver level(default 1), data>
141
+;For dual link lvds: use lvds2link_pins_a  and lvds2link_pins_b instead
142
+;For rgb24: use rgb24_pins_a  and rgb24_pins_b instead
143
+;For lvds1: use lvds1_pins_a  and lvds1_pins_b instead
144
+;For lvds0: use lvds0_pins_a  and lvds0_pins_b instead
145
+;----------------------------------------------------------------------------------*/
146
+                lcd0: lcd0@01c0c000 {
147
+                        lcd_used            = <1>;
148
+
149
+                        lcd_driver_name     = "mipi_8_800x1280";
150
+                        lcd_backlight       = <50>;
151
+                        lcd_if              = <4>;
152
+
153
+                        lcd_x               = <800>;
154
+                        lcd_y               = <1280>;
155
+                        lcd_width           = <220>;
156
+                        lcd_height          = <140>;
157
+                        lcd_dclk_freq       = <68>;
158
+
159
+                        lcd_pwm_used        = <1>;
160
+                        lcd_pwm_ch          = <2>;
161
+                        lcd_pwm_freq        = <50000>;
162
+                        lcd_pwm_pol         = <1>;
163
+                        lcd_pwm_max_limit   = <255>;
164
+
165
+                        //lcd_hbp             = <18>;
166
+                        //lcd_ht              = <934>;
167
+                        //lcd_hspw            = <4>;
168
+
169
+                        //lcd_vbp             = <38>;
170
+                        //lcd_vt              = <1344>;
171
+                        //lcd_vspw            = <2>;
172
+
173
+			lcd_hbp             = <36>;
174
+			lcd_ht              = <854>;
175
+			lcd_hspw            = <18>;
176
+			lcd_vbp             = <12>;
177
+			lcd_vt              = <1320>;
178
+			lcd_vspw            = <4>;
179
+
180
+
181
+                        lcd_frm             = <0>;
182
+                        lcd_gamma_en        = <0>;
183
+                        lcd_bright_curve_en = <0>;
184
+                        lcd_cmap_en         = <0>;
185
+
186
+                        deu_mode            = <0>;
187
+                        lcdgamma4iep        = <22>;
188
+                        smart_color         = <90>;
189
+
190
+                        lcd_dsi_if          = <0>;
191
+                        lcd_dsi_lane        = <4>;
192
+                        lcd_dsi_format      = <0>;
193
+                        lcd_dsi_te          = <0>;
194
+                        lcd_dsi_eotp        = <0>;
195
+
196
+			//lcd_lvds_if	    = <0>;
197
+			//lcd_lvds_colordepth = <0>;
198
+			//lcd_lvds_mode 	    = <1>;		
199
+
200
+                        lcd_pin_power = "dcdc1";
201
+                        lcd_pin_power1 = "eldo3";
202
+                        //lcd_pin_power2 = "dldo2";
203
+
204
+                        lcd_power = "dc1sw";
205
+			lcd_bl_en = <&pio PD 21 1 0 3 1>;
206
+			
207
+			// reset
208
+                        lcd_gpio_0 = <&pio PE 5 1 0 3 1>;
209
+			// power
210
+                        //lcd_gpio_1 = <&pio PD 21 1 0 3 1>;
211
+
212
+                        pinctrl-0 = <&dsi4lane_pins_a>;
213
+                        pinctrl-1 = <&dsi4lane_pins_b>;
214
+                        //pinctrl-0 = <&lvds0_pins_a>;
215
+                        //pinctrl-1 = <&lvds0_pins_b>;
216
+                };
217
+	};