add nk_io at24_eeprom driver

hc

2023-02-14 796a7ef0befd21e25c2b9e42f53a6d7a4421941d

add nk_io at24_eeprom driver

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dts
..
..
@@ -0,0 +1,8 @@
1
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+/*
3
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4
+ *
5
+ */
6
+
7
+#include "NK-R36S0.dtsi"
8
+#include "rk3568-android.dtsi"
 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -0,0 +1,562 @@
1
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+/*
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+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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+ *
5
+ */
6
+
7
+/dts-v1/;
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+
9
+#include <dt-bindings/gpio/gpio.h>
10
+#include <dt-bindings/pinctrl/rockchip.h>
11
+#include "rk3568.dtsi"
12
+#include "rk3568-evb.dtsi"
13
+
14
+/ {
15
+	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16
+	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
17
+
18
+	rk_headset: rk-headset {
19
+		compatible = "rockchip_headset";
20
+		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+		pinctrl-names = "default";
22
+		pinctrl-0 = <&hp_det>;
23
+	};
24
+
25
+	vcc2v5_sys: vcc2v5-ddr {
26
+		compatible = "regulator-fixed";
27
+		regulator-name = "vcc2v5-sys";
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+		regulator-always-on;
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+		regulator-boot-on;
30
+		regulator-min-microvolt = <2500000>;
31
+		regulator-max-microvolt = <2500000>;
32
+		vin-supply = <&vcc3v3_sys>;
33
+	};
34
+
35
+	vcc3v3_vga: vcc3v3-vga {
36
+		compatible = "regulator-fixed";
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+		regulator-name = "vcc3v3_vga";
38
+		regulator-always-on;
39
+		regulator-boot-on;
40
+		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
+		enable-active-high;
42
+		vin-supply = <&vcc3v3_sys>;
43
+	};
44
+
45
+	pcie30_avdd0v9: pcie30-avdd0v9 {
46
+		compatible = "regulator-fixed";
47
+		regulator-name = "pcie30_avdd0v9";
48
+		regulator-always-on;
49
+		regulator-boot-on;
50
+		regulator-min-microvolt = <900000>;
51
+		regulator-max-microvolt = <900000>;
52
+		vin-supply = <&vcc3v3_sys>;
53
+	};
54
+
55
+	pcie30_avdd1v8: pcie30-avdd1v8 {
56
+		compatible = "regulator-fixed";
57
+		regulator-name = "pcie30_avdd1v8";
58
+		regulator-always-on;
59
+		regulator-boot-on;
60
+		regulator-min-microvolt = <1800000>;
61
+		regulator-max-microvolt = <1800000>;
62
+		vin-supply = <&vcc3v3_sys>;
63
+	};
64
+
65
+	vcc3v3_pcie: gpio-regulator {
66
+		compatible = "regulator-fixed";
67
+		regulator-name = "vcc3v3_pcie";
68
+		regulator-min-microvolt = <3300000>;
69
+		regulator-max-microvolt = <3300000>;
70
+		enable-active-high;
71
+		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
72
+		startup-delay-us = <5000>;
73
+		vin-supply = <&dc_12v>;
74
+	};
75
+
76
+	vcc3v3_bu: vcc3v3-bu {
77
+		compatible = "regulator-fixed";
78
+		regulator-name = "vcc3v3_bu";
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+		regulator-always-on;
80
+		regulator-boot-on;
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+		regulator-min-microvolt = <3300000>;
82
+		regulator-max-microvolt = <3300000>;
83
+		vin-supply = <&vcc5v0_sys>;
84
+	};
85
+
86
+	vcc_camera: vcc-camera-regulator {
87
+		compatible = "regulator-fixed";
88
+		gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
89
+		pinctrl-names = "default";
90
+		pinctrl-0 = <&camera_pwr>;
91
+		regulator-name = "vcc_camera";
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+		enable-active-high;
93
+		regulator-always-on;
94
+		regulator-boot-on;
95
+	
96
+    	};
97
+
98
+	    nk_io_init {
99
+                compatible = "nk_io_control";
100
+                hub_host2_5v_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO0_A6
101
+		usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;  //USB_EN_OC_GPIO0_A5
102
+		lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
103
+		lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
104
+		vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
105
+                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
106
+                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
107
+//              hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 
108
+                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
109
+                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
110
+                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
111
+                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
112
+                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
113
+                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
114
+                
115
+		edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
116
+                edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
117
+        	edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
118
+        	edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
119
+        	edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
120
+                edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
121
+//              tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
122
+//              vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
123
+		
124
+		wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
125
+
126
+  //      pinctrl-names = "default";
127
+//        pinctrl-0 = <&nk_io_gpio>;
128
+        nodka_lvds = <9>;
129
+        };
130
+
131
+	
132
+};
133
+
134
+&combphy0_us {
135
+	status = "okay";
136
+};
137
+
138
+&combphy1_usq {
139
+	status = "okay";
140
+};
141
+
142
+&combphy2_psq {
143
+	status = "okay";
144
+};
145
+
146
+&csi2_dphy_hw {
147
+	status = "okay";
148
+};
149
+
150
+&csi2_dphy0 {
151
+	status = "okay";
152
+
153
+	ports {
154
+		#address-cells = <1>;
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+		#size-cells = <0>;
156
+		port@0 {
157
+			reg = <0>;
158
+			#address-cells = <1>;
159
+			#size-cells = <0>;
160
+
161
+			mipi_in_ucam0: endpoint@1 {
162
+				reg = <1>;
163
+				remote-endpoint = <&ucam_out0>;
164
+				data-lanes = <1 2 3 4>;
165
+			};
166
+			mipi_in_ucam1: endpoint@2 {
167
+				reg = <2>;
168
+				remote-endpoint = <&gc8034_out>;
169
+				data-lanes = <1 2 3 4>;
170
+			};
171
+			mipi_in_ucam2: endpoint@3 {
172
+				reg = <3>;
173
+				remote-endpoint = <&ov5695_out>;
174
+				data-lanes = <1 2>;
175
+			};
176
+		};
177
+		port@1 {
178
+			reg = <1>;
179
+			#address-cells = <1>;
180
+			#size-cells = <0>;
181
+
182
+			csidphy_out: endpoint@0 {
183
+				reg = <0>;
184
+				remote-endpoint = <&isp0_in>;
185
+			};
186
+		};
187
+	};
188
+};
189
+
190
+/*
191
+ * video_phy0 needs to be enabled
192
+ * when dsi0 is enabled
193
+ */
194
+&dsi0 {
195
+	status = "okay";
196
+};
197
+
198
+&dsi0_in_vp0 {
199
+	status = "disabled";
200
+};
201
+
202
+&dsi0_in_vp1 {
203
+	status = "okay";
204
+};
205
+
206
+&dsi0_panel {
207
+	power-supply = <&vcc3v3_lcd0_n>;
208
+};
209
+
210
+/*
211
+ * video_phy1 needs to be enabled
212
+ * when dsi1 is enabled
213
+ */
214
+&dsi1 {
215
+	status = "disabled";
216
+};
217
+
218
+&dsi1_in_vp0 {
219
+	status = "disabled";
220
+};
221
+
222
+&dsi1_in_vp1 {
223
+	status = "disabled";
224
+};
225
+
226
+&dsi1_panel {
227
+	power-supply = <&vcc3v3_lcd1_n>;
228
+};
229
+
230
+&edp {
231
+	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
232
+	status = "okay";
233
+};
234
+
235
+&edp_phy {
236
+	status = "okay";
237
+};
238
+
239
+&edp_in_vp0 {
240
+	status = "okay";
241
+};
242
+
243
+&edp_in_vp1 {
244
+	status = "disabled";
245
+};
246
+
247
+&gmac0 {
248
+	phy-mode = "rgmii";
249
+	clock_in_out = "output";
250
+
251
+	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
252
+	snps,reset-active-low;
253
+	/* Reset time is 20ms, 100ms for rtl8211f */
254
+	snps,reset-delays-us = <0 20000 100000>;
255
+
256
+	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
257
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
258
+	assigned-clock-rates = <0>, <125000000>;
259
+
260
+	pinctrl-names = "default";
261
+	pinctrl-0 = <&gmac0_miim
262
+		     &gmac0_tx_bus2
263
+		     &gmac0_rx_bus2
264
+		     &gmac0_rgmii_clk
265
+		     &gmac0_rgmii_bus>;
266
+
267
+	tx_delay = <0x3c>;
268
+	rx_delay = <0x2f>;
269
+
270
+	phy-handle = <&rgmii_phy0>;
271
+	status = "disabled";
272
+};
273
+
274
+&gmac1 {
275
+	phy-mode = "rgmii";
276
+	clock_in_out = "output";
277
+
278
+	snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
279
+	snps,reset-active-low;
280
+	/* Reset time is 20ms, 100ms for rtl8211f */
281
+	snps,reset-delays-us = <0 20000 100000>;
282
+
283
+	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
284
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
285
+	assigned-clock-rates = <0>, <125000000>;
286
+
287
+	pinctrl-names = "default";
288
+	pinctrl-0 = <&gmac1m1_miim
289
+		     &gmac1m1_tx_bus2
290
+		     &gmac1m1_rx_bus2
291
+		     &gmac1m1_rgmii_clk
292
+		     &gmac1m1_rgmii_bus>;
293
+
294
+	tx_delay = <0x4f>;
295
+	rx_delay = <0x26>;
296
+
297
+	phy-handle = <&rgmii_phy1>;
298
+	status = "okay";
299
+};
300
+
301
+/*
302
+ * power-supply should switche to vcc3v3_lcd1_n
303
+ * when mipi panel is connected to dsi1.
304
+ */
305
+&gt1x {
306
+	power-supply = <&vcc3v3_lcd0_n>;
307
+};
308
+
309
+&i2c3 {
310
+	status = "okay";
311
+       //mac eeprom
312
+        eeprom@51 {
313
+                //compatible = "atmel,24c02";
314
+                compatible = "atmel,24c256";
315
+                reg = <0x51>;
316
+        };
317
+	
318
+	  //nk-mcu
319
+        nkmcu@15 {
320
+                compatible = "nk_mcu";
321
+                reg = <0x15>;
322
+        };
323
+
324
+
325
+
326
+};
327
+
328
+&i2c4 {
329
+	status = "okay";
330
+	gc8034: gc8034@37 {
331
+		compatible = "galaxycore,gc8034";
332
+		status = "okay";
333
+		reg = <0x37>;
334
+		clocks = <&cru CLK_CIF_OUT>;
335
+		clock-names = "xvclk";
336
+		pinctrl-names = "default";
337
+		pinctrl-0 = <&cif_clk>;
338
+		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
339
+		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
340
+		rockchip,grf = <&grf>;
341
+		power-domains = <&power RK3568_PD_VI>;
342
+		rockchip,camera-module-index = <0>;
343
+		rockchip,camera-module-facing = "back";
344
+		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
345
+		rockchip,camera-module-lens-name = "CK8401";
346
+		port {
347
+			gc8034_out: endpoint {
348
+				remote-endpoint = <&mipi_in_ucam1>;
349
+				data-lanes = <1 2 3 4>;
350
+			};
351
+		};
352
+	};
353
+	os04a10: os04a10@36 {
354
+		compatible = "ovti,os04a10";
355
+		reg = <0x36>;
356
+		clocks = <&cru CLK_CIF_OUT>;
357
+		clock-names = "xvclk";
358
+		power-domains = <&power RK3568_PD_VI>;
359
+		pinctrl-names = "default";
360
+		pinctrl-0 = <&cif_clk>;
361
+		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
362
+		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
363
+		rockchip,camera-module-index = <0>;
364
+		rockchip,camera-module-facing = "back";
365
+		rockchip,camera-module-name = "CMK-OT1607-FV1";
366
+		rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16";
367
+		port {
368
+			ucam_out0: endpoint {
369
+				remote-endpoint = <&mipi_in_ucam0>;
370
+				data-lanes = <1 2 3 4>;
371
+			};
372
+		};
373
+	};
374
+	ov5695: ov5695@36 {
375
+		status = "okay";
376
+		compatible = "ovti,ov5695";
377
+		reg = <0x36>;
378
+		clocks = <&cru CLK_CIF_OUT>;
379
+		clock-names = "xvclk";
380
+		power-domains = <&power RK3568_PD_VI>;
381
+		pinctrl-names = "default";
382
+		pinctrl-0 = <&cif_clk>;
383
+		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
384
+		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
385
+		rockchip,camera-module-index = <0>;
386
+		rockchip,camera-module-facing = "back";
387
+		rockchip,camera-module-name = "TongJu";
388
+		rockchip,camera-module-lens-name = "CHT842-MD";
389
+		port {
390
+			ov5695_out: endpoint {
391
+				remote-endpoint = <&mipi_in_ucam2>;
392
+				data-lanes = <1 2>;
393
+			};
394
+		};
395
+	};
396
+};
397
+
398
+&mdio0 {
399
+	rgmii_phy0: phy@0 {
400
+		compatible = "ethernet-phy-ieee802.3-c22";
401
+		reg = <0x0>;
402
+	};
403
+};
404
+
405
+&mdio1 {
406
+	rgmii_phy1: phy@0 {
407
+		compatible = "ethernet-phy-ieee802.3-c22";
408
+		reg = <0x0>;
409
+	};
410
+};
411
+
412
+&video_phy0 {
413
+	status = "okay";
414
+};
415
+
416
+&video_phy1 {
417
+	status = "disabled";
418
+};
419
+
420
+&pcie30phy {
421
+	status = "okay";
422
+};
423
+
424
+&pcie3x2 {
425
+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
426
+	vpcie3v3-supply = <&vcc3v3_pcie>;
427
+	status = "okay";
428
+};
429
+
430
+&pinctrl {
431
+	cam {
432
+		camera_pwr: camera-pwr {
433
+			rockchip,pins =
434
+				/* camera power en */
435
+				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
436
+		};
437
+	};
438
+	headphone {
439
+		hp_det: hp-det {
440
+			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441
+		};
442
+	};
443
+
444
+	wireless-wlan {
445
+		wifi_host_wake_irq: wifi-host-wake-irq {
446
+			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
447
+		};
448
+	};
449
+
450
+	wireless-bluetooth {
451
+		uart8_gpios: uart8-gpios {
452
+			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
453
+		};
454
+	};
455
+
456
+	nk_io_gpio: nk_io_gpio_col{
457
+                        rockchip,pins =
458
+                                <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
459
+                                <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
460
+                                <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
461
+                                <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
462
+                                <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
463
+                                <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
464
+                                <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
465
+                                <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
466
+	};
467
+};
468
+
469
+&rkisp {
470
+	status = "okay";
471
+};
472
+
473
+&rkisp_mmu {
474
+	status = "okay";
475
+};
476
+
477
+&rkisp_vir0 {
478
+	status = "okay";
479
+
480
+	port {
481
+		#address-cells = <1>;
482
+		#size-cells = <0>;
483
+
484
+		isp0_in: endpoint@0 {
485
+			reg = <0>;
486
+			remote-endpoint = <&csidphy_out>;
487
+		};
488
+	};
489
+};
490
+
491
+&route_dsi0 {
492
+	status = "okay";
493
+	connect = <&vp1_out_dsi0>;
494
+};
495
+
496
+&route_edp {
497
+	status = "okay";
498
+	connect = <&vp0_out_edp>;
499
+};
500
+
501
+&sata2 {
502
+	status = "okay";
503
+};
504
+
505
+&sdmmc2 {
506
+	max-frequency = <150000000>;
507
+	supports-sdio;
508
+	bus-width = <4>;
509
+	disable-wp;
510
+	cap-sd-highspeed;
511
+	cap-sdio-irq;
512
+	keep-power-in-suspend;
513
+	mmc-pwrseq = <&sdio_pwrseq>;
514
+	non-removable;
515
+	pinctrl-names = "default";
516
+	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
517
+	sd-uhs-sdr104;
518
+	status = "okay";
519
+};
520
+
521
+&spdif_8ch {
522
+	status = "okay";
523
+	pinctrl-names = "default";
524
+	pinctrl-0 = <&spdifm1_tx>;
525
+};
526
+
527
+&uart8 {
528
+	status = "disabled";
529
+	pinctrl-names = "default";
530
+	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
531
+};
532
+
533
+&vcc3v3_lcd0_n {
534
+	gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
535
+	enable-active-high;
536
+};
537
+
538
+&vcc3v3_lcd1_n {
539
+	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
540
+	enable-active-high;
541
+};
542
+
543
+&wireless_wlan {
544
+	pinctrl-names = "default";
545
+	pinctrl-0 = <&wifi_host_wake_irq>;
546
+	WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
547
+};
548
+
549
+&wireless_bluetooth {
550
+	compatible = "bluetooth-platdata";
551
+	clocks = <&rk809 1>;
552
+	clock-names = "ext_clock";
553
+	//wifi-bt-power-toggle;
554
+	uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
555
+	pinctrl-names = "default", "rts_gpio";
556
+	pinctrl-0 = <&uart8m0_rtsn>;
557
+	pinctrl-1 = <&uart8_gpios>;
558
+	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
559
+	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
560
+	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
561
+	status = "okay";
562
+};
 kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
..
..
@@ -161,8 +161,8 @@
161
161
 
162
162
 	leds: leds {
163
163
 		compatible = "gpio-leds";
164
-		work_led: work {
165
-			gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
164
+		sys_led: sys_led {
165
+			gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
166
166
 			linux,default-trigger = "heartbeat";
167
167
 		};
168
168
 	};
..
..
@@ -289,7 +289,7 @@
289
289
 		regulator-min-microvolt = <3300000>;
290
290
 		regulator-max-microvolt = <3300000>;
291
291
 		enable-active-high;
292
-		gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
292
+		gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
293
293
 		vin-supply = <&vcc3v3_sys>;
294
294
 
295
295
 		regulator-state-mem {
..
..
@@ -1539,9 +1539,9 @@
1539
1539
 	pmuio2-supply = <&vcc3v3_pmu>;
1540
1540
 	vccio1-supply = <&vccio_acodec>;
1541
1541
 	vccio3-supply = <&vccio_sd>;
1542
-	vccio4-supply = <&vcc_3v3>;
1542
+	vccio4-supply = <&vcc_1v8>;
1543
1543
 	vccio5-supply = <&vcc_3v3>;
1544
-	vccio6-supply = <&vcc_3v3>;
1544
+	vccio6-supply = <&vcc_1v8>;
1545
1545
 	vccio7-supply = <&vcc_3v3>;
1546
1546
 };
1547
1547
 
 kernel/arch/arm64/configs/rockchip_linux_defconfig
..
..
@@ -127,6 +127,7 @@
127
127
 CONFIG_BLK_DEV_RAM_COUNT=1
128
128
 CONFIG_BLK_DEV_NVME=y
129
129
 CONFIG_SRAM=y
130
+CONFIG_EEPROM_AT24=y
130
131
 CONFIG_BLK_DEV_SD=y
131
132
 CONFIG_BLK_DEV_SR=y
132
133
 CONFIG_SCSI_SCAN_ASYNC=y
..
..
@@ -250,6 +251,9 @@
250
251
 CONFIG_SPI_ROCKCHIP=y
251
252
 CONFIG_SPI_SPIDEV=y
252
253
 CONFIG_PINCTRL_RK805=y
254
+CONFIG_GPIOLIB=y
255
+CONFIG_GPIOLIB_FASTPATH_LIMIT=512
256
+CONFIG_OF_GPIO=y
253
257
 CONFIG_GPIO_SYSFS=y
254
258
 CONFIG_GPIO_GENERIC_PLATFORM=y
255
259
 CONFIG_POWER_AVS=y
..
..
@@ -455,7 +459,9 @@
455
459
 CONFIG_LEDS_CLASS=y
456
460
 CONFIG_LEDS_GPIO=y
457
461
 CONFIG_LEDS_IS31FL32XX=y
462
+CONFIG_LEDS_TRIGGERS=y
458
463
 CONFIG_LEDS_TRIGGER_TIMER=y
464
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
459
465
 CONFIG_RTC_CLASS=y
460
466
 CONFIG_RTC_DRV_HYM8563=y
461
467
 CONFIG_RTC_DRV_RK808=y
 kernel/drivers/misc/Makefile
..
..
@@ -62,3 +62,5 @@
62
62
 obj-$(CONFIG_UID_SYS_STATS)	+= uid_sys_stats.o
63
63
 obj-$(CONFIG_PIR_ASCHIP)	+= pir-aschip.o
64
64
 obj-$(CONFIG_RK803)		+= rk803.o
65
+obj-y += nkio/
66
+obj-y += nkmcu/
 kernel/drivers/misc/nkio/Kconfig
..
..
@@ -0,0 +1,15 @@
1
+# SPDX-License-Identifier: GPL-2.0
2
+#
3
+# Headset device configuration
4
+#
5
+
6
+menu "jw io init support"
7
+
8
+config JW_IO
9
+	tristate "JW IO INIT"
10
+	---help---
11
+
12
+source "drivers/jwio/mcu/Kconfig"
13
+			    
14
+endmenu
15
+
 kernel/drivers/misc/nkio/Makefile
..
..
@@ -0,0 +1 @@
1
+obj-y += nk_io_core.o 
 kernel/drivers/misc/nkio/mcu/Kconfig
..
..
@@ -0,0 +1,12 @@
1
+# SPDX-License-Identifier: GPL-2.0
2
+#
3
+# Headset device configuration
4
+#
5
+
6
+menu "jw mcu init support"
7
+
8
+config JW_MCU	
9
+	tristate "JW_MCU init"
10
+			    
11
+endmenu
12
+
 kernel/drivers/misc/nkio/mcu/Makefile
..
..
@@ -0,0 +1,5 @@
1
+
2
+
3
+obj-$(CONFIG_JW_MCU)	+= jw_mcu.o
4
+obj-$(CONFIG_JW_MCU)	+= jw_mcu_isp.o
5
+
 kernel/drivers/misc/nkio/mcu/jw_mcu.c
..
..
@@ -0,0 +1,866 @@
1
+/* drivers/rtc/rtc-jwwdt.c - driver for jwwdt
2
+ *
3
+ * Copyright (C) 2010 ROCKCHIP, Inc.
4
+ *
5
+ * This software is licensed under the terms of the GNU General Public
6
+ * License version 2, as published by the Free Software Foundation, and
7
+ * may be copied, distributed, and modified under those terms.
8
+ *
9
+ * This program is distributed in the hope that it will be useful,
10
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
+ * GNU General Public License for more details.
13
+ */
14
+
15
+
16
+#include <linux/module.h>
17
+#include <linux/moduleparam.h>
18
+#include <linux/init.h>
19
+#include <linux/clk.h>
20
+#include <linux/delay.h>
21
+#include <linux/pm.h>
22
+#include <linux/i2c.h>
23
+#include <linux/platform_device.h>
24
+#include <linux/slab.h>
25
+#include <linux/of_gpio.h>
26
+#include <sound/core.h>
27
+#include <sound/pcm.h>
28
+#include <sound/pcm_params.h>
29
+#include <sound/tlv.h>
30
+#include <sound/soc.h>
31
+#include <sound/soc-dapm.h>
32
+#include <sound/initval.h>
33
+#include <linux/proc_fs.h>
34
+#include <linux/gpio.h>
35
+#include <linux/interrupt.h>
36
+#include <linux/irq.h>
37
+#include "jw_mcu.h"
38
+#include <linux/reboot.h>
39
+
40
+
41
+struct i2c_client *gClient = NULL;
42
+struct device_node *node_MCU = NULL;
43
+struct device *dev_MCU= NULL;
44
+unsigned int mcu_watchdog_gpio;
45
+struct delayed_work 	    watchdog_delay_work;
46
+#define	WATCHDOG_FEED_COUNT		 2000
47
+
48
+
49
+
50
+//ison s
51
+#if 0
52
+static int Mcu_i2c_writes(const struct i2c_client *client,
53
+		const char reg, const char *buf, int count)
54
+{
55
+        struct i2c_adapter *adap=client->adapter;
56
+        struct i2c_msg msg;
57
+        int ret;
58
+        char *tx_buf = (char *)kmalloc(count + 1, GFP_KERNEL);
59
+        if(!tx_buf)
60
+                return -ENOMEM;
61
+        tx_buf[0] = reg;
62
+        memcpy(tx_buf+1, buf, count);
63
+
64
+        msg.addr = client->addr;
65
+        msg.flags = client->flags;
66
+        msg.len = count + 1;
67
+        msg.buf = (char *)tx_buf;
68
+        //msg.scl_rate = 100*1000;
69
+
70
+        ret = i2c_transfer(adap, &msg, 1);
71
+        kfree(tx_buf);
72
+        return (ret == 1) ? count : ret;
73
+
74
+}
75
+
76
+static int Mcu_i2c_reads(const struct i2c_client *client,
77
+		const char reg, char *buf, int count)
78
+{
79
+        struct i2c_adapter *adap=client->adapter;
80
+        struct i2c_msg msgs[2];
81
+        int ret;
82
+        char reg_buf = reg;
83
+
84
+        msgs[0].addr = client->addr;
85
+        msgs[0].flags = client->flags;
86
+        msgs[0].len = 1;
87
+        msgs[0].buf = &reg_buf;
88
+        //msgs[0].scl_rate = 100*1000;
89
+
90
+        msgs[1].addr = client->addr;
91
+        msgs[1].flags = client->flags | I2C_M_RD;
92
+        msgs[1].len = count;
93
+        msgs[1].buf = (char *)buf;
94
+        //msgs[1].scl_rate = 100*1000;
95
+
96
+        ret = i2c_transfer(adap, msgs, 2);
97
+
98
+        return (ret == 2)? count : ret;
99
+}
100
+#endif
101
+
102
+static int Mcu_i2c_writeregister(struct i2c_client *i2c, char reg, int count, const u8 src)
103
+{
104
+	int ret=-1;
105
+	
106
+	struct i2c_adapter *adap;
107
+	struct i2c_msg msg;
108
+	char tx_buf[2];
109
+
110
+	if(!i2c)
111
+		return -EINVAL;
112
+	if (count != 1)
113
+		return -EIO;
114
+    
115
+	adap = i2c->adapter;		
116
+	tx_buf[0] = reg;
117
+	tx_buf[1] = src;
118
+	
119
+	msg.addr = i2c->addr;
120
+	msg.buf = &tx_buf[0];
121
+	msg.len = 1 +1;
122
+	msg.flags = i2c->flags;   
123
+	//msg.scl_rate = 100*1000;	
124
+
125
+	ret = i2c_transfer(adap, &msg, 1);
126
+	return ret;	
127
+}
128
+
129
+
130
+
131
+static int Mcu_i2c_readregister(struct i2c_client *i2c, char reg, int count,	u8 *dest)
132
+{
133
+      int ret;
134
+    struct i2c_adapter *adap;
135
+    struct i2c_msg msgs[2];
136
+
137
+    if(!i2c)
138
+		return -EINVAL;
139
+
140
+	if (count != 1)
141
+		return -EIO;  
142
+  
143
+    adap = i2c->adapter;		
144
+    
145
+    msgs[0].addr = i2c->addr;
146
+    msgs[0].buf = &reg;
147
+    msgs[0].flags = i2c->flags;
148
+    msgs[0].len = 1;
149
+    //msgs[0].scl_rate = 100*1000;
150
+    
151
+    msgs[1].buf = (u8 *)dest;
152
+    msgs[1].addr = i2c->addr;
153
+    msgs[1].flags = i2c->flags | I2C_M_RD;
154
+    msgs[1].len = 1;
155
+    //msgs[1].scl_rate = 100*1000;
156
+    ret = i2c_transfer(adap, msgs, 2);
157
+
158
+	//printk("***run in %s %d msgs[1].buf = %d\n",__FUNCTION__,__LINE__,*(msgs[1].buf));
159
+
160
+	return ret;   
161
+}
162
+
163
+//ison e
164
+
165
+uint8_t get_value_func_cfg(uint8_t func, uint8_t value)
166
+{
167
+    uint8_t data = 0;
168
+    CORE_REG_FUNCTION *value_func;
169
+    CORE_REG_FUNCTION1 *value_func1;
170
+    value_func = (CORE_REG_FUNCTION *)&value;
171
+    value_func1 = (CORE_REG_FUNCTION1 *)&value;
172
+    if(func < 100 || func > CORE_FUNC_MAX)
173
+      return 0;
174
+    switch(func){
175
+      case CORE_FUNC_ALARM:
176
+        data = value_func->bit.alarmWakeup;
177
+        break;
178
+      case CORE_FUNC_WDT:
179
+        data = value_func->bit.watchdog;
180
+        break;
181
+      case CORE_FUNC_IRDA:
182
+        data = value_func->bit.irdaWakeup;
183
+        break;
184
+      case CORE_FUNC_NET_WK:
185
+        data = value_func->bit.net_wakeup;
186
+        break;
187
+      case CORE_FUNC_CEC:
188
+        data = value_func->bit.hdmi_cec;
189
+        break;
190
+      case CORE_FUNC_POWER_LOSS:
191
+        data = value_func->bit.powerloss;
192
+        break;
193
+      case CORE_FUNC_USB_CHARGER:
194
+        data = value_func->bit.usbCharger;
195
+        break;   
196
+      case CORE_FUNC_LAST_STATE:
197
+        data = value_func1->bit.last_state;
198
+        break;  
199
+      case CORE_FUNC_PWR_WK_EN:
200
+        data = value_func1->bit.pwr_wk_en;
201
+	  	 case CORE_FUNC_PWR_OFF_EN:
202
+        data = value_func1->bit.pwr_opwer_en;
203
+      default:
204
+        break;       
205
+    }
206
+    return data;
207
+}
208
+
209
+uint8_t set_value_func_cfg(uint8_t func, uint8_t value,uint8_t value_data)
210
+{
211
+    uint8_t data = 0;
212
+    CORE_REG_FUNCTION *value_func;
213
+    CORE_REG_FUNCTION1 *value_func1;
214
+    value_func = (CORE_REG_FUNCTION *)&value;
215
+    value_func1 = (CORE_REG_FUNCTION1 *)&value;
216
+    if(func < 100 || func > CORE_FUNC_MAX)
217
+      return 0;
218
+    switch(func){
219
+      case CORE_FUNC_POWER_LOSS:
220
+        value_func->bit.powerloss = value_data;
221
+        break;
222
+      case CORE_FUNC_WDT:
223
+        value_func->bit.watchdog = value_data;
224
+        break;	
225
+      case CORE_FUNC_ALARM:
226
+        value_func->bit.alarmWakeup = value_data;
227
+        break;	
228
+      case CORE_FUNC_PWR_WK_EN:
229
+        value_func1->bit.pwr_wk_en = value_data;
230
+        break;	
231
+	  case CORE_FUNC_PWR_OFF_EN:
232
+        value_func1->bit.pwr_opwer_en = value_data;
233
+        break;	
234
+      default:
235
+        break;       
236
+    }
237
+	data = *((uint8_t *)value_func);
238
+	return data;
239
+}
240
+
241
+
242
+//add spirit class s------------------------
243
+#if 1
244
+
245
+static ssize_t mcu_driver_version(struct class *cls,
246
+					struct class_attribute *attr,
247
+					char *buf)
248
+{
249
+	u8 newversion=0x04;   //if MCU firmware need to update ,set newversion to latest MCU firmware version
250
+
251
+	return snprintf(buf, 4, "%02x\n",newversion);
252
+}
253
+
254
+static ssize_t spirit_version(struct class *cls,
255
+					struct class_attribute *attr,
256
+					char *buf)
257
+{  
258
+	int ret = 0;
259
+	u8 read_mcu_id = 0; 
260
+	ret = Mcu_i2c_readregister(gClient, CORE_FW_VERSION, 1,&read_mcu_id);
261
+	if (ret < 0) {
262
+		printk("jw_mcu read fail\n");
263
+		return -EINVAL;
264
+	}
265
+	printk("spirit_version  = %d ------------ison\n",read_mcu_id);
266
+
267
+	return snprintf(buf, 4, "%02x\n",read_mcu_id);
268
+}
269
+
270
+static void MCU_UPDATE(void){
271
+	int ret = 0;
272
+	u8 tmp ;
273
+	
274
+	tmp=1;
275
+	ret = Mcu_i2c_writeregister(gClient, CORE_FW_UPDATE, 1, tmp);
276
+	if (ret < 0) {
277
+		printk("Mcu_i2c_writeregister fail\n");
278
+		return;
279
+	}
280
+	msleep(100);
281
+	kernel_restart(NULL);
282
+	printk("CORE_FW_UPDATE ret = %d ------------ison\n",ret);
283
+
284
+}
285
+
286
+static ssize_t set_mcu_update(struct class *cls, 
287
+						struct class_attribute *attr,
288
+			 			const char *buf, size_t size)
289
+{
290
+	u32 enable;
291
+	sscanf(buf, "%d", &enable);
292
+	printk("Spirit UPDATE enable =%d----ison\n",enable);
293
+	if (enable)
294
+	{
295
+		printk("Spirit UPDATE------ISON\n");
296
+		MCU_UPDATE();
297
+	}
298
+	return size;
299
+}
300
+#endif
301
+static ssize_t get_mcu_state_autopower(struct class *class,struct class_attribute *attr, char *buf)
302
+{
303
+	int ret = 0;
304
+	u8 autopower_state=0;
305
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&autopower_state);
306
+		if (ret < 0) {
307
+			printk("Mcu_i2c_readregister fail\n");
308
+			return -1;
309
+		}
310
+		printk("get_autopower autopower_reg = %d ------------ison\n",autopower_state);
311
+	if(get_value_func_cfg(CORE_FUNC_POWER_LOSS,autopower_state)){	
312
+		autopower_state = 1;
313
+	}else{
314
+		autopower_state = 0;
315
+	}
316
+	printk("get_autopower autopower_state = %d ------------ison\n",autopower_state);
317
+	return snprintf(buf, 3, "%02x\n",autopower_state);
318
+}
319
+
320
+static void MCU_EnableAutopower(void){
321
+	int ret = 0;
322
+	u8 tmp ;
323
+	u8 autopower_state=0;
324
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&autopower_state);
325
+		if (ret < 0) {
326
+			printk("Mcu_i2c_readregister fail\n");
327
+			return;
328
+		}
329
+	tmp = set_value_func_cfg(CORE_FUNC_POWER_LOSS,autopower_state,1);
330
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
331
+	if (ret < 0) {
332
+		printk("Mcu_i2c_writeregister fail\n");
333
+		return;
334
+	}
335
+	msleep(10);
336
+	printk("EnableAutopower ret = %d ------------ison\n",ret);
337
+
338
+}
339
+
340
+static void MCU_disableAutopower(void){
341
+	int ret = 0;
342
+	u8 tmp ;
343
+	u8 autopower_state=0;
344
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&autopower_state);
345
+		if (ret < 0) {
346
+			printk("Mcu_i2c_readregister fail\n");
347
+			return;
348
+		}	
349
+	tmp = set_value_func_cfg(CORE_FUNC_POWER_LOSS,autopower_state,0);
350
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
351
+	if (ret < 0) {
352
+		printk("Mcu_i2c_writeregister fail\n");
353
+		return;
354
+	}
355
+	msleep(10);
356
+	printk("disableAutopower ret = %d ------------ison\n",ret);
357
+
358
+}
359
+
360
+static ssize_t set_mcu_enable_autopower(struct class *cls, 
361
+						struct class_attribute *attr,
362
+			 			const char *buf, size_t size)
363
+{
364
+	u32 enable;
365
+	sscanf(buf, "%d", &enable);
366
+	printk("set_autopower enable =%d----ison\n",enable);
367
+	if (enable)
368
+	{
369
+		//printk("set_mcu_enable_autopower ENABLE------ISON\n");
370
+		MCU_EnableAutopower();
371
+	}
372
+	else {
373
+		MCU_disableAutopower();
374
+		//printk("set_mcu_enable_autopower DISABLE------ISON\n");
375
+	}
376
+	return size;
377
+}
378
+
379
+static ssize_t get_mcu_state_watchdog(struct class *class,struct class_attribute *attr, char *buf)
380
+{
381
+	int ret = 0;
382
+	u8 watchdog_state=0;
383
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&watchdog_state);
384
+		if (ret < 0) {
385
+			printk("Mcu_i2c_readregister fail\n");
386
+			return -1;
387
+		}
388
+		printk("get_watchdog watchdog_state = %d ------------ison\n",watchdog_state);
389
+	if(get_value_func_cfg(CORE_FUNC_WDT,watchdog_state)){	
390
+		watchdog_state = 1;
391
+	}else{
392
+		watchdog_state = 0;
393
+	}
394
+	printk("get_watchdog watchdog_state = %d ------------ison\n",watchdog_state);
395
+	return snprintf(buf, 3, "%02x\n",watchdog_state);
396
+}
397
+
398
+static void MCU_EnableWatchdog(void){
399
+	int ret = 0;
400
+	u8 tmp ;
401
+	u8 watchdog_state=0;
402
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&watchdog_state);
403
+		if (ret < 0) {
404
+			printk("Mcu_i2c_readregister fail\n");
405
+			return;
406
+		}
407
+	tmp = set_value_func_cfg(CORE_FUNC_WDT,watchdog_state,1);
408
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
409
+	if (ret < 0) {
410
+		printk("Mcu_i2c_writeregister fail\n");
411
+		return;
412
+	}
413
+	msleep(10);
414
+	printk("EnableWatchdog ret = %d ------------ison\n",ret);
415
+
416
+}
417
+
418
+static void MCU_disableWatchdog(void){
419
+	int ret = 0;
420
+	u8 tmp ;
421
+	u8 watchdog_state=0;
422
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&watchdog_state);
423
+		if (ret < 0) {
424
+			printk("Mcu_i2c_readregister fail\n");
425
+			return;
426
+		}	
427
+	tmp = set_value_func_cfg(CORE_FUNC_WDT,watchdog_state,0);
428
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
429
+	if (ret < 0) {
430
+		printk("Mcu_i2c_writeregister fail\n");
431
+		return;
432
+	}
433
+	msleep(10);
434
+	printk("disableWatchdog ret = %d ------------ison\n",ret);
435
+
436
+}
437
+
438
+static void watchdog_work(void){
439
+  int ret;
440
+
441
+  ret = gpio_direction_output(mcu_watchdog_gpio, 1); 
442
+  if(ret < 0){
443
+	  printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
444
+  }
445
+  ret = gpio_direction_output(mcu_watchdog_gpio, 0); 
446
+  if(ret < 0){
447
+	  printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
448
+  }
449
+  ret = gpio_direction_output(mcu_watchdog_gpio, 1); 
450
+  if(ret < 0){
451
+	  printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
452
+  }
453
+
454
+}
455
+
456
+static void watchdog_timer_work(struct work_struct *work)
457
+{
458
+	watchdog_work();
459
+	schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
460
+}
461
+
462
+
463
+void watchdog_init(void){
464
+	int ret = 0;
465
+	enum of_gpio_flags flags;
466
+	ret = of_get_named_gpio_flags(node_MCU, "mcu_watchdog_gpio", 0, &flags);
467
+	if (ret < 0) {
468
+		printk("%s() Can not read property mcu_watchdog_gpio\n", __FUNCTION__);
469
+	} else {
470
+		mcu_watchdog_gpio = ret;
471
+		ret = devm_gpio_request(dev_MCU, mcu_watchdog_gpio, "mcu_watchdog_gpio");
472
+		if(ret < 0){
473
+			printk("%s() devm_gpio_request mcu_watchdog_gpio request ERROR\n", __FUNCTION__);
474
+		}
475
+		ret = gpio_direction_output(mcu_watchdog_gpio,1); 
476
+		if(ret < 0){
477
+			printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
478
+		}
479
+	}	
480
+
481
+	 INIT_DELAYED_WORK(&watchdog_delay_work, watchdog_timer_work);
482
+     schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
483
+}
484
+
485
+static ssize_t set_mcu_enable_watchdog(struct class *cls, 
486
+						struct class_attribute *attr,
487
+			 			const char *buf, size_t size)
488
+{
489
+	u32 enable;
490
+	sscanf(buf, "%d", &enable);
491
+	printk("set_autopower enable =%d----\n",enable);
492
+	if (enable)
493
+	{
494
+		printk("set_mcu_enable_autopower ENABLE------\n");
495
+		MCU_EnableWatchdog();
496
+
497
+		
498
+	    schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
499
+		
500
+	}
501
+	else {
502
+		MCU_disableWatchdog();
503
+		schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(0));
504
+
505
+		
506
+		printk("set_mcu_enable_autopower DISABLE------\n");
507
+	}
508
+	return size;
509
+}
510
+
511
+static ssize_t set_watchdog_test(struct class *cls, 
512
+						struct class_attribute *attr,
513
+			 			const char *buf, size_t size)
514
+{
515
+	u32 enable;
516
+	sscanf(buf, "%d", &enable);
517
+	printk("set_watchdog_test enable =%d----ison\n",enable);
518
+	if (enable)
519
+	{
520
+		//printk("set_mcu_enable_autopower ENABLE------ISON\n");
521
+		schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
522
+	}
523
+	else {
524
+		cancel_delayed_work(&watchdog_delay_work);
525
+		//printk("set_mcu_enable_autopower DISABLE------ISON\n");
526
+	}
527
+	return size;
528
+}
529
+
530
+static ssize_t get_mcu_state_rtcpower(struct class *class,struct class_attribute *attr, char *buf)
531
+{
532
+	int ret = 0;
533
+	u8 rtcpower_state=0;
534
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&rtcpower_state);
535
+		if (ret < 0) {
536
+			printk("Mcu_i2c_readregister fail\n");
537
+			return -1;
538
+		}
539
+		printk("get_rtcpower rtcpower_state = %d ------------ison\n",rtcpower_state);
540
+	if(get_value_func_cfg(CORE_FUNC_ALARM,rtcpower_state)){	
541
+		rtcpower_state = 1;
542
+	}else{
543
+		rtcpower_state = 0;
544
+	}
545
+	printk("get_rtcpower rtcpower_state = %d ------------ison\n",rtcpower_state);
546
+	return snprintf(buf, 3, "%02x\n",rtcpower_state);
547
+}
548
+
549
+static void MCU_EnableRtcpower(void){
550
+	int ret = 0;
551
+	u8 tmp ;
552
+	u8 rtcpower_state=0;
553
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&rtcpower_state);
554
+		if (ret < 0) {
555
+			printk("Mcu_i2c_readregister fail\n");
556
+			return;
557
+		}
558
+	tmp = set_value_func_cfg(CORE_FUNC_ALARM,rtcpower_state,1);
559
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
560
+	if (ret < 0) {
561
+		printk("Mcu_i2c_writeregister fail\n");
562
+		return;
563
+	}
564
+	msleep(10);
565
+	printk("EnableRtcpower ret = %d ------------ison\n",ret);
566
+
567
+}
568
+
569
+static void MCU_disableRtcpower(void){
570
+	int ret = 0;
571
+	u8 tmp ;
572
+	u8 rtcpower_state=0;
573
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1,	&rtcpower_state);
574
+		if (ret < 0) {
575
+			printk("Mcu_i2c_readregister fail\n");
576
+			return;
577
+		}	
578
+	tmp = set_value_func_cfg(CORE_FUNC_ALARM,rtcpower_state,0);
579
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
580
+	if (ret < 0) {
581
+		printk("Mcu_i2c_writeregister fail\n");
582
+		return;
583
+	}
584
+	msleep(10);
585
+	printk("disableRtcpower ret = %d ------------ison\n",ret);
586
+
587
+}
588
+
589
+static ssize_t set_mcu_enable_rtcpower(struct class *cls, 
590
+						struct class_attribute *attr,
591
+			 			const char *buf, size_t size)
592
+{
593
+	u32 enable;
594
+	sscanf(buf, "%d", &enable);
595
+	printk("set_rtcpower enable =%d----ison\n",enable);
596
+	if (enable)
597
+	{
598
+		//printk("set_mcu_enable_autopower ENABLE------ISON\n");
599
+		MCU_EnableRtcpower();
600
+	}
601
+	else {
602
+		MCU_disableRtcpower();
603
+		//printk("set_mcu_enable_autopower DISABLE------ISON\n");
604
+	}
605
+	return size;
606
+}
607
+
608
+static ssize_t get_mcu_state_ethwol(struct class *class,struct class_attribute *attr, char *buf)
609
+{
610
+	int ret = 0;
611
+	u8 ethwol_state=0;
612
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,	&ethwol_state);
613
+		if (ret < 0) {
614
+			printk("Mcu_i2c_readregister fail\n");
615
+			return -1;
616
+		}
617
+		printk("get_ethwol ethwol_state = %d ------------ison\n",ethwol_state);
618
+	if(get_value_func_cfg(CORE_FUNC_PWR_WK_EN,ethwol_state)){	
619
+		ethwol_state = 1;
620
+	}else{
621
+		ethwol_state = 0;
622
+	}
623
+	printk("get_ethwol ethwol_state = %d ------------ison\n",ethwol_state);
624
+	return snprintf(buf, 3, "%02x\n",ethwol_state);
625
+}
626
+
627
+static void MCU_EnableEthwol(void){
628
+	int ret = 0;
629
+	u8 tmp ;
630
+	u8 ethwol_state=0;
631
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,	&ethwol_state);
632
+		if (ret < 0) {
633
+			printk("Mcu_i2c_readregister fail\n");
634
+			return;
635
+		}
636
+	tmp = set_value_func_cfg(CORE_FUNC_PWR_WK_EN,ethwol_state,1);
637
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
638
+	if (ret < 0) {
639
+		printk("Mcu_i2c_writeregister fail\n");
640
+		return;
641
+	}
642
+	msleep(10);
643
+	printk("EnableEthwol ret = %d ------------ison\n",ret);
644
+
645
+}
646
+
647
+static void MCU_disableEthwol(void){
648
+	int ret = 0;
649
+	u8 tmp ;
650
+	u8 ethwol_state=0;
651
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,	&ethwol_state);
652
+		if (ret < 0) {
653
+			printk("Mcu_i2c_readregister fail\n");
654
+			return;
655
+		}	
656
+	tmp = set_value_func_cfg(CORE_FUNC_PWR_WK_EN,ethwol_state,0);
657
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
658
+	if (ret < 0) {
659
+		printk("Mcu_i2c_writeregister fail\n");
660
+		return;
661
+	}
662
+	msleep(10);
663
+	printk("disableEthwol ret = %d ------------ison\n",ret);
664
+
665
+}
666
+
667
+static ssize_t set_mcu_enable_ethwol(struct class *cls, 
668
+						struct class_attribute *attr,
669
+			 			const char *buf, size_t size)
670
+{
671
+	u32 enable;
672
+	sscanf(buf, "%d", &enable);
673
+	printk("set_ethwol enable =%d----ison\n",enable);
674
+	if (enable)
675
+	{
676
+		//printk("set_mcu_enable_autopower ENABLE------ISON\n");
677
+		MCU_EnableEthwol();
678
+	}
679
+	else {
680
+		MCU_disableEthwol();
681
+		//printk("set_mcu_enable_autopower DISABLE------ISON\n");
682
+	}
683
+	return size;
684
+}
685
+
686
+
687
+static struct class *spirit_class;
688
+static CLASS_ATTR(Update, 0666, NULL, set_mcu_update);
689
+static CLASS_ATTR(SpiritEnableAutopower, 0666, get_mcu_state_autopower, set_mcu_enable_autopower);
690
+static CLASS_ATTR(Verison, 0666, mcu_driver_version, NULL); 
691
+static CLASS_ATTR(SpiritVerison, 0666, spirit_version, NULL); 
692
+static CLASS_ATTR(Watchdog, 0666, get_mcu_state_watchdog, set_mcu_enable_watchdog);
693
+static CLASS_ATTR(Watchdog_test, 0666, NULL, set_watchdog_test);
694
+static CLASS_ATTR(Rtcpower, 0666, get_mcu_state_rtcpower, set_mcu_enable_rtcpower);
695
+static CLASS_ATTR(EthWol, 0666, get_mcu_state_ethwol, set_mcu_enable_ethwol);
696
+
697
+
698
+//add spirit class e------------------------
699
+
700
+int jw_mcu_get_cc_status(u8 *role, u8 *direction){
701
+	u8 ret_role,ret_direction;
702
+	int ret;
703
+	ret = Mcu_i2c_readregister(gClient, CORE_ANX7411_CC_ROLE, 1,&ret_role);
704
+	if (ret < 0) {
705
+		printk("jw_mcu_get_cc_status read fail\n");
706
+		return -EINVAL;
707
+	}
708
+	ret = Mcu_i2c_readregister(gClient, CORE_ANX7411_CC_DIRECTION, 1,&ret_direction);
709
+	if (ret < 0) {
710
+		printk("jw_mcu_get_cc_status read fail\n");
711
+		return -EINVAL;
712
+	}
713
+	printk("jw_mcu_get_cc_status ret_role=%d,ret_direction=%d---ison\n",ret_role,ret_direction);
714
+	*role = ret_role;
715
+	*direction = ret_direction;
716
+	return ret;
717
+}
718
+
719
+
720
+void MCU_Set_EthPhyAddr(char *addr){
721
+	int ret = 0,i;
722
+	//u8 tmp =0;
723
+	char *addr_l = addr;
724
+	for(i = 0;i < 6;i++){
725
+		printk("MCU_Set_EthPhyAddr  %d------------ison\n",addr_l[i]);
726
+		ret = Mcu_i2c_writeregister(gClient, CORE_ETH_PHY_ADDR0 + i, 1, addr_l[i]);
727
+		if (ret < 0) {
728
+			printk("Mcu_i2c_writeregister fail\n");
729
+			return;
730
+		}
731
+	}
732
+}
733
+///////////////andy add 
734
+
735
+static int rtl8211_phy_power_off(struct notifier_block *this,
736
+                    unsigned long code, void *unused)
737
+{
738
+	u8 ethwol_power=0,tmp;
739
+	int ret = 0;
740
+
741
+    if (code == SYS_POWER_OFF){
742
+		ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,&ethwol_power);
743
+		if (ret < 0) {
744
+			printk("Mcu_i2c_readregister fail\n");
745
+			return -1;
746
+		}	
747
+		tmp = set_value_func_cfg(CORE_FUNC_PWR_OFF_EN,ethwol_power,0);
748
+		ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
749
+		if (ret < 0) {
750
+			printk("Mcu_i2c_writeregister fail\n");
751
+			return -1;
752
+		}		
753
+		printk("write power off message to mcu   ------------andy\n");		
754
+	}
755
+    return NOTIFY_OK;
756
+}
757
+////////////////andy end
758
+static struct notifier_block rtl8211_phy_notifier = {
759
+        .notifier_call = rtl8211_phy_power_off,
760
+};
761
+
762
+
763
+static int  jw_mcu_probe(struct i2c_client *client, const struct i2c_device_id *id)
764
+
765
+{
766
+    int ret = 0, err;
767
+	u8 read_mcu_id=0,ethwol_power=0,tmp;
768
+	//char tmp1[2];
769
+	//enum of_gpio_flags flags;
770
+	node_MCU = client->dev.of_node;
771
+	dev_MCU = &client->dev;
772
+	gClient = client;
773
+    printk("%s \n",__FUNCTION__);
774
+
775
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
776
+        printk(KERN_ERR "jw_mcu_probe: need I2C_FUNC_I2C\n");
777
+        ret = -ENODEV;
778
+    }
779
+//ison s
780
+#if 1
781
+	ret=Mcu_i2c_readregister(client, CORE_FW_VERSION, 1,&read_mcu_id);
782
+	if (ret < 0) {
783
+		printk("jw_mcu read fail\n");
784
+		return -EINVAL;
785
+	}
786
+	printk("Mcu_i2c_readregister 1 read1 = %d ------------ison\n",read_mcu_id);
787
+#endif
788
+//ison e
789
+
790
+
791
+
792
+	spirit_class = class_create(THIS_MODULE, "spirit_class");
793
+	if (IS_ERR(spirit_class)) {
794
+		printk(KERN_ERR "Failed to create spirit_class\n");
795
+		spirit_class = NULL;
796
+		return -EINVAL;
797
+	}	
798
+	
799
+	ret =  class_create_file(spirit_class, &class_attr_Update);
800
+	ret =  class_create_file(spirit_class, &class_attr_SpiritEnableAutopower);
801
+	ret =  class_create_file(spirit_class, &class_attr_Verison);
802
+	ret =  class_create_file(spirit_class, &class_attr_SpiritVerison);
803
+	ret =  class_create_file(spirit_class, &class_attr_Watchdog);
804
+	ret =  class_create_file(spirit_class, &class_attr_Watchdog_test);
805
+	ret =  class_create_file(spirit_class, &class_attr_Rtcpower);
806
+	ret =  class_create_file(spirit_class, &class_attr_EthWol);
807
+	
808
+	watchdog_init();
809
+
810
+	err = register_reboot_notifier(&rtl8211_phy_notifier);
811
+	if (err) {
812
+    	printk("unable to register jw_mcu_probe reboot notifier\n");
813
+	}	
814
+
815
+///////////////andy add 
816
+	ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,&ethwol_power);
817
+	if (ret < 0) {
818
+		printk("Mcu_i2c_readregister fail\n");
819
+		return -1;
820
+	}	
821
+	tmp = set_value_func_cfg(CORE_FUNC_PWR_OFF_EN,ethwol_power,1);
822
+
823
+	ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
824
+	if (ret < 0) {
825
+		printk("Mcu_i2c_writeregister fail\n");
826
+		return -1;
827
+	}
828
+
829
+/////////////andy end		
830
+
831
+	printk("%s: probe ok!!\n", __FUNCTION__);
832
+
833
+
834
+	
835
+    return 0;
836
+	
837
+}
838
+
839
+
840
+static const struct i2c_device_id jw_mcu_id[] = {
841
+	{ "jw_mcu", 0 },
842
+	{ }
843
+};
844
+
845
+static const struct of_device_id jw_mcu_of_match[] = {
846
+	{ .compatible = "everest,jw_mcu", },
847
+	{ }
848
+};
849
+MODULE_DEVICE_TABLE(of, jw_mcu_of_match);
850
+
851
+
852
+static struct i2c_driver jw_mcu_driver = {
853
+	.driver		= {
854
+		.name	= "jw_mcu",
855
+		.of_match_table = of_match_ptr(jw_mcu_of_match),
856
+	},
857
+	.probe		= jw_mcu_probe,
858
+ 	.id_table	= jw_mcu_id,
859
+	//.remove		= __devexit_p(cec_input_control_remove),
860
+};
861
+
862
+module_i2c_driver(jw_mcu_driver);
863
+MODULE_AUTHOR("ison@jwele.com.cn");
864
+MODULE_DESCRIPTION("jw mcu driver");
865
+MODULE_LICENSE("GPL");
866
+
 kernel/drivers/misc/nkio/mcu/jw_mcu.h
..
..
@@ -0,0 +1,85 @@
1
+
2
+/****************************RK3399 MINI58 Register Start***************************/
3
+#define REGISTER_MCU_VERSION	0x00
4
+
5
+
6
+typedef enum
7
+{
8
+    CORE_FW_VERSION = 0,                
9
+    CORE_VID_LSB, 
10
+    CORE_VID_MSB,
11
+    CORE_PID_LSB, 
12
+    CORE_PID_MSB, 
13
+    CORE_POWER_STATE,
14
+    CORE_FUNC_CFG0,
15
+    CORE_FUNC_CFG1,
16
+    CORE_FUNC_STATUS0,
17
+    CORE_FUNC_STATUS1,
18
+    CORE_RTC_TIME,	//0xa
19
+    CORE_RTC_ALARM_TIME,
20
+    CORE_WDT_COUNT,
21
+    CORE_FW_UPDATE,
22
+    CORE_CEC_PHY_LSB,
23
+    CORE_CEC_PHY_MSB,
24
+    CORE_CEC_OSD_NAME,	//0x10
25
+    CORE_NEW_FW_VERSION,
26
+    CORE_POWER_LEVEL,
27
+    CORE_ANX7411_CC_ROLE,	//0x13
28
+    CORE_ANX7411_CC_DIRECTION,	//0x14
29
+    CORE_ANX7411_HPD_STATUS,		//0x15
30
+    CORE_ANX7411_DP_LANES,		//0x16
31
+    CORE_ETH_PHY_ADDR0,
32
+    CORE_ETH_PHY_ADDR1,
33
+    CORE_ETH_PHY_ADDR2,
34
+    CORE_ETH_PHY_ADDR3,
35
+    CORE_ETH_PHY_ADDR4,
36
+    CORE_ETH_PHY_ADDR5,    
37
+    CORE_REG_MAX
38
+} REGIST_CMD;
39
+
40
+typedef union
41
+ {
42
+   struct
43
+   {
44
+	 uint8_t alarmWakeup:1; 	//bit 0			   
45
+	 uint8_t watchdog:1;					
46
+	 uint8_t irdaWakeup:1;					  
47
+	 uint8_t net_wakeup:1;					   
48
+	 uint8_t hdmi_cec:1;					   
49
+	 uint8_t powerloss:2;
50
+	 uint8_t usbCharger:1;
51
+   } bit;									
52
+   uint8_t reg_function;							
53
+ } CORE_REG_FUNCTION;  
54
+
55
+typedef union
56
+{
57
+  struct
58
+  {
59
+	uint8_t last_state:1; 
60
+	uint8_t pwr_wk_en:1;
61
+	uint8_t pwr_opwer_en:1;
62
+	uint8_t reserved:5;
63
+  } bit;								   
64
+  uint8_t reg_function; 						   
65
+} CORE_REG_FUNCTION1;	
66
+
67
+typedef enum
68
+{
69
+    CORE_FUNC_ALARM = 100,                
70
+    CORE_FUNC_WDT, 
71
+    CORE_FUNC_IRDA,
72
+    CORE_FUNC_NET_WK, 
73
+    CORE_FUNC_CEC,    
74
+    CORE_FUNC_POWER_LOSS, 
75
+    CORE_FUNC_USB_CHARGER,
76
+    CORE_FUNC_LAST_STATE,
77
+    CORE_FUNC_PWR_WK_EN,
78
+    CORE_FUNC_PWR_OFF_EN,
79
+    CORE_FUNC_MAX
80
+} REGIST_FUNC_FLAG;
81
+
82
+
83
+/****************************RK3399 MINI58 Regist end***************************/
84
+extern int jw_mcu_get_cc_status(u8 *role, u8 *direction);
85
+
 kernel/drivers/misc/nkio/mcu/jw_mcu_isp.c
..
..
@@ -0,0 +1,238 @@
1
+/* drivers/rtc/rtc-jwwdt.c - driver for jwwdt
2
+ *
3
+ * Copyright (C) 2010 ROCKCHIP, Inc.
4
+ *
5
+ * This software is licensed under the terms of the GNU General Public
6
+ * License version 2, as published by the Free Software Foundation, and
7
+ * may be copied, distributed, and modified under those terms.
8
+ *
9
+ * This program is distributed in the hope that it will be useful,
10
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
+ * GNU General Public License for more details.
13
+ */
14
+
15
+//#define DEBUG
16
+//#define pr_fmt(fmt) "rtc: %s: " fmt, __func__
17
+//#include <mach/gpio.h>
18
+//#include <mach/iomux.h>
19
+//#include <mach/board.h>
20
+//#include <plat/board.h>
21
+
22
+
23
+#include <linux/module.h>
24
+#include <linux/i2c.h>
25
+#include <linux/delay.h>
26
+#include <linux/wakelock.h>
27
+#include <linux/slab.h>
28
+#include <linux/input.h>
29
+#include <linux/irq.h>
30
+#include <linux/interrupt.h>
31
+#include <linux/reboot.h>
32
+#include "jw_mcu_isp.h"
33
+#ifdef CONFIG_OF
34
+#include <linux/of.h>
35
+#include <linux/of_device.h>
36
+#include <linux/of_gpio.h>
37
+#endif
38
+
39
+//----------------read bin s
40
+#include <linux/fs.h>
41
+#include <linux/uaccess.h> 
42
+#include <linux/vmalloc.h>
43
+#define ISP_FIRMWARE_FILE_SIZE				(1024*12)
44
+//----------------read bin e
45
+
46
+static struct i2c_client *gClient_isp = NULL;
47
+struct device_node *node_MCU_isp = NULL;
48
+struct device *dev_MCU_isp= NULL;
49
+unsigned int pro_1=0;
50
+
51
+static unsigned char MCU_ISP_FIRMWARE[]={
52
+#include "jw_mcu_isp.dat"
53
+};
54
+
55
+
56
+static int Minix_Mcu_write_isp(struct i2c_client *i2c, char *buf,int count)
57
+{
58
+	int ret=-1;
59
+	
60
+	struct i2c_adapter *adap;
61
+	struct i2c_msg msg;
62
+
63
+	if(!i2c)
64
+		return ret;
65
+	adap = i2c->adapter;		
66
+	
67
+	msg.addr = i2c->addr;
68
+	msg.buf =(char *)buf;
69
+	msg.len =count;
70
+	msg.flags = i2c->flags;   
71
+
72
+	ret = i2c_transfer(adap, &msg, 1);
73
+	return ret;	
74
+}
75
+
76
+static ssize_t minixIspUpdateState(struct class *cls,
77
+					struct class_attribute *attr,
78
+					char *buf)
79
+{
80
+	u8 state=1;
81
+	return snprintf(buf, 4, "%02x\n",state);
82
+}
83
+static struct class *minix_isp_class;
84
+
85
+static CLASS_ATTR(MCUIspState, 0666, minixIspUpdateState, NULL);
86
+
87
+static int  isp_input_control_probe(struct i2c_client *client, const struct i2c_device_id *id)
88
+
89
+{
90
+
91
+    int ret = 0;
92
+	int i,lens;
93
+	int count_isp;
94
+	unsigned int pro=0;
95
+	unsigned char MCU_ISP_CMD[64];
96
+	node_MCU_isp = client->dev.of_node; 
97
+	dev_MCU_isp = &client->dev;
98
+
99
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
100
+        printk(KERN_ERR "isp_probe: need I2C_FUNC_I2C-----------ison\n");
101
+        ret = -ENODEV;
102
+        return ret;
103
+    }
104
+
105
+	gClient_isp = client;
106
+//--------------------------------read bin s
107
+count_isp = sizeof(MCU_ISP_FIRMWARE)/sizeof(char);
108
+printk("isp ret = %d-------------ison\n",count_isp);
109
+//----------------------------------------------------------------------
110
+memset(MCU_ISP_CMD,0,64);
111
+MCU_ISP_CMD[0] = CMD_UPDATE_APROM;
112
+ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
113
+if (ret < 0) {
114
+	printk("Minix_Mcu_write_isp fail CMD_UPDATE_APROM\n");
115
+	return -ENODEV;
116
+}
117
+
118
+msleep(500);
119
+
120
+memset(MCU_ISP_CMD,0,64);
121
+MCU_ISP_CMD[0] = CMD_UPDATE_APROM_DATA;
122
+MCU_ISP_CMD[1] = 0;
123
+MCU_ISP_CMD[2] = 0;
124
+MCU_ISP_CMD[3] = 0;
125
+
126
+for(i=4;i<64;i++){
127
+	MCU_ISP_CMD[i] = MCU_ISP_FIRMWARE[pro++];
128
+}
129
+
130
+ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
131
+if (ret < 0) {
132
+	printk("Minix_Mcu_write_isp fail CMD_UPDATE_APROM_DATA\n");
133
+	return -ENODEV;
134
+}
135
+
136
+//-------------------------------------------------------------------
137
+
138
+msleep(500);
139
+
140
+while(pro<count_isp){
141
+	lens = count_isp -pro;
142
+	if( lens > 60){
143
+		memset(MCU_ISP_CMD,0,64);
144
+		MCU_ISP_CMD[0] = CMD_UPDATE_CONTINUOUS;
145
+		MCU_ISP_CMD[1] = 0;
146
+		MCU_ISP_CMD[2] = 0;
147
+		MCU_ISP_CMD[3] = 0;
148
+		for(i=4;i<64;i++){
149
+			MCU_ISP_CMD[i] = MCU_ISP_FIRMWARE[pro++];
150
+		}
151
+		
152
+		ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
153
+		if (ret < 0) {
154
+			printk("Minix_Mcu_write_isp fail  CMD_UPDATE_CONTINUOUS\n");
155
+			return -ENODEV;
156
+		}
157
+		
158
+		msleep(10);
159
+	}
160
+	else if(lens < 60){
161
+		
162
+			memset(MCU_ISP_CMD,0,64);
163
+		MCU_ISP_CMD[0] = CMD_UPDATE_CONTINUOUS_END;
164
+		MCU_ISP_CMD[1] = 0;
165
+		MCU_ISP_CMD[2] = 0;
166
+		MCU_ISP_CMD[3] = 0;
167
+		for(i=4;i<lens+4;i++){
168
+			MCU_ISP_CMD[i] = MCU_ISP_FIRMWARE[pro++];
169
+			printk(" %d,",MCU_ISP_CMD[i]);
170
+			
171
+		}
172
+		pro_1 = pro;
173
+		printk("pro = %d-----ison\n",pro_1);
174
+		for(i=lens+4;i<64;i++){
175
+			MCU_ISP_CMD[i] = 0xff;
176
+			pro++;
177
+			}
178
+		
179
+		ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
180
+		if (ret < 0) {
181
+			printk("Minix_Mcu_write_isp fail CMD_UPDATE_CONTINUOUS_END\n");
182
+			return -ENODEV;
183
+		}
184
+
185
+	}
186
+}
187
+
188
+memset(MCU_ISP_CMD,0,64);
189
+MCU_ISP_CMD[0] = CMD_INTER_APROM;
190
+
191
+ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
192
+if (ret < 0) {
193
+	printk("Minix_Mcu_write_isp fail\n");
194
+	return -ENODEV;
195
+}
196
+
197
+
198
+	msleep(500);
199
+	minix_isp_class = class_create(THIS_MODULE, "minix-isp");
200
+	if (IS_ERR(minix_isp_class)) {
201
+		printk(KERN_ERR "Failed to create minix isp class\n");
202
+		minix_isp_class = NULL;
203
+		return -EINVAL;
204
+	}
205
+	ret =  class_create_file(minix_isp_class, &class_attr_MCUIspState);
206
+
207
+	machine_restart(NULL);
208
+    return 0;
209
+	
210
+
211
+}
212
+
213
+static const struct i2c_device_id jw_mcu_isp_id[] = {
214
+	{ "jw_mcu_isp", 0 },
215
+	{ }
216
+};
217
+
218
+static const struct of_device_id jw_mcu_isp_of_match[] = {
219
+	{ .compatible = "everest,jw_mcu_isp", },
220
+	{ }
221
+};
222
+
223
+static struct i2c_driver jw_mcu_isp_driver = {
224
+	.driver		= {
225
+		.name	= "jw_mcu_isp",
226
+		.owner	= THIS_MODULE,
227
+		.of_match_table = of_match_ptr(jw_mcu_isp_of_match),
228
+	},
229
+	.probe		= isp_input_control_probe,
230
+ 	.id_table	= jw_mcu_isp_id,
231
+};
232
+
233
+module_i2c_driver(jw_mcu_isp_driver);
234
+MODULE_AUTHOR("ison@jwele.com.cn");
235
+MODULE_DESCRIPTION("jw mcu driver");
236
+MODULE_LICENSE("GPL");
237
+
238
+
 kernel/drivers/misc/nkio/mcu/jw_mcu_isp.dat
..
..
@@ -0,0 +1,1606 @@
1
+0x00, 0x0A, 0x00, 0x20, 0xA9, 0x02, 0x00, 0x00, 0xAD, 0x02, 0x00, 0x00, 0x79, 0x01, 0x00, 0x00, 
2
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
3
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1, 0x02, 0x00, 0x00, 
4
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB3, 0x02, 0x00, 0x00, 0xB5, 0x02, 0x00, 0x00, 
5
+0xB7, 0x02, 0x00, 0x00, 0x55, 0x3D, 0x00, 0x00, 0x05, 0x40, 0x00, 0x00, 0x71, 0x3E, 0x00, 0x00, 
6
+0xB9, 0x12, 0x00, 0x00, 0xFB, 0x12, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 
7
+0x51, 0x51, 0x00, 0x00, 0xE9, 0x51, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 
8
+0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 
9
+0xFD, 0x12, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0x4F, 0x15, 0x00, 0x00, 0x67, 0x15, 0x00, 0x00, 
10
+0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 
11
+0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 
12
+0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 
13
+0x00, 0xF0, 0x02, 0xF8, 0x00, 0xF0, 0x49, 0xF8, 0x0C, 0xA0, 0x30, 0xC8, 0x08, 0x38, 0x24, 0x18, 
14
+0x2D, 0x18, 0xA2, 0x46, 0x67, 0x1E, 0xAB, 0x46, 0x54, 0x46, 0x5D, 0x46, 0xAC, 0x42, 0x01, 0xD1, 
15
+0x00, 0xF0, 0x3B, 0xF8, 0x7E, 0x46, 0x0F, 0x3E, 0x0F, 0xCC, 0xB6, 0x46, 0x01, 0x26, 0x33, 0x42, 
16
+0x00, 0xD0, 0xFB, 0x1A, 0xA2, 0x46, 0xAB, 0x46, 0x33, 0x43, 0x18, 0x47, 0x84, 0x62, 0x00, 0x00, 
17
+0xA4, 0x62, 0x00, 0x00, 0x00, 0x23, 0x00, 0x24, 0x00, 0x25, 0x00, 0x26, 0x10, 0x3A, 0x01, 0xD3, 
18
+0x78, 0xC1, 0xFB, 0xD8, 0x52, 0x07, 0x00, 0xD3, 0x30, 0xC1, 0x00, 0xD5, 0x0B, 0x60, 0x70, 0x47, 
19
+0x10, 0xB5, 0x64, 0x29, 0x02, 0xD1, 0x05, 0xF0, 0x83, 0xFD, 0x10, 0xBD, 0x78, 0x29, 0x02, 0xD1, 
20
+0x05, 0xF0, 0xB4, 0xFD, 0x10, 0xBD, 0x63, 0x29, 0x02, 0xD1, 0x06, 0xF0, 0x24, 0xF8, 0x10, 0xBD, 
21
+0x73, 0x29, 0x02, 0xD1, 0x06, 0xF0, 0x27, 0xF8, 0x10, 0xBD, 0x00, 0x20, 0x10, 0xBD, 0x1F, 0xB5, 
22
+0xC0, 0x46, 0xC0, 0x46, 0x1F, 0xBD, 0x10, 0xB5, 0x10, 0xBD, 0x06, 0xF0, 0x61, 0xF8, 0x11, 0x46, 
23
+0xFF, 0xF7, 0xF5, 0xFF, 0x01, 0xF0, 0x2E, 0xF8, 0x06, 0xF0, 0x79, 0xF8, 0x03, 0xB4, 0xFF, 0xF7, 
24
+0xF2, 0xFF, 0x03, 0xBC, 0x00, 0xF0, 0x75, 0xFC, 0x70, 0x46, 0x40, 0x07, 0x02, 0xD4, 0xEF, 0xF3, 
25
+0x08, 0x80, 0x01, 0xE0, 0xEF, 0xF3, 0x09, 0x80, 0x81, 0x69, 0x0B, 0x88, 0x09, 0x4A, 0x93, 0x42, 
26
+0x02, 0xD1, 0x04, 0x31, 0x81, 0x61, 0x70, 0x47, 0x04, 0x20, 0x71, 0x46, 0x08, 0x42, 0x02, 0xD0, 
27
+0xEF, 0xF3, 0x09, 0x80, 0x01, 0xE0, 0xEF, 0xF3, 0x08, 0x80, 0x71, 0x46, 0x02, 0x4A, 0x10, 0x47, 
28
+0xFE, 0xE7, 0x00, 0x00, 0xAB, 0xBE, 0x00, 0x00, 0x8F, 0x09, 0x00, 0x00, 0xAB, 0xBE, 0x01, 0xE0, 
29
+0x00, 0x20, 0x70, 0x47, 0x00, 0x2A, 0x00, 0xD0, 0x10, 0x60, 0x01, 0x20, 0x70, 0x47, 0x00, 0x00, 
30
+0x70, 0xB5, 0x05, 0x46, 0x0C, 0x46, 0x16, 0x46, 0x02, 0xE0, 0x0F, 0xCC, 0x0F, 0xC5, 0x10, 0x3E, 
31
+0x10, 0x2E, 0xFA, 0xD2, 0x08, 0x2E, 0x02, 0xD3, 0x03, 0xCC, 0x03, 0xC5, 0x08, 0x3E, 0x04, 0x2E, 
32
+0x07, 0xD3, 0x01, 0xCC, 0x01, 0xC5, 0x36, 0x1F, 0x03, 0xE0, 0x21, 0x78, 0x29, 0x70, 0x64, 0x1C, 
33
+0x6D, 0x1C, 0x76, 0x1E, 0xF9, 0xD2, 0x70, 0xBD, 0x70, 0x47, 0xF8, 0xB5, 0x1F, 0xA0, 0x00, 0x68, 
34
+0x1F, 0x4E, 0x00, 0x90, 0x31, 0x6A, 0x30, 0x13, 0x1E, 0x4C, 0x1F, 0x4F, 0x01, 0x42, 0x01, 0xD0, 
35
+0x00, 0x20, 0x16, 0xE0, 0x08, 0x03, 0x01, 0xD5, 0x20, 0x46, 0x00, 0xE0, 0x38, 0x46, 0x8A, 0x03, 
36
+0x0F, 0xD4, 0x0A, 0x04, 0x92, 0x0F, 0x6B, 0x46, 0x9B, 0x5C, 0xCA, 0x05, 0x89, 0x04, 0xD2, 0x0D, 
37
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38
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378
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379
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380
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381
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382
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383
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384
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385
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386
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387
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388
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389
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390
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391
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392
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393
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394
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395
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396
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397
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398
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399
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400
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401
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402
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403
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404
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405
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406
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407
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408
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409
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410
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411
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412
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413
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414
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415
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416
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417
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418
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419
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420
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421
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422
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423
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424
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425
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426
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427
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428
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429
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430
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431
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432
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433
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434
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435
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436
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437
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438
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439
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440
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441
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442
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443
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445
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470
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471
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473
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475
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476
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477
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478
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479
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480
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481
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482
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483
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485
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486
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487
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489
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490
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491
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492
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493
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494
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495
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496
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497
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498
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499
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500
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501
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502
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503
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504
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505
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506
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507
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508
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509
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510
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511
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512
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513
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514
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515
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516
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517
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518
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519
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520
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521
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522
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523
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524
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525
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526
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527
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528
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529
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530
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531
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532
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533
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534
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535
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536
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537
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538
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539
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540
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541
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542
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543
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544
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545
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546
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547
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548
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549
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550
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551
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552
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553
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554
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555
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556
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557
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558
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559
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560
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561
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562
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563
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564
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565
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566
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567
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568
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569
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570
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571
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572
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573
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574
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575
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576
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577
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578
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579
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580
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581
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582
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583
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584
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585
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586
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587
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588
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589
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590
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591
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592
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593
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594
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595
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596
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597
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598
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599
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600
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601
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936
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937
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938
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939
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940
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941
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942
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943
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944
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945
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946
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947
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948
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949
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950
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951
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952
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953
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954
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955
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956
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957
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958
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959
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960
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961
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962
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963
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964
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965
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966
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967
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968
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969
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970
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971
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972
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973
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974
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975
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976
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977
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978
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979
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980
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981
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982
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983
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984
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985
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986
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987
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988
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989
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990
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991
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992
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993
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994
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995
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996
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997
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998
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999
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1000
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1001
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1002
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1003
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1004
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1005
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1006
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1007
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1008
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1009
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1010
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1011
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1012
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1013
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1014
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1015
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1016
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1017
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1018
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1019
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1020
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1021
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1022
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1023
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1024
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1025
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1026
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1027
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1028
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1029
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1030
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1031
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1032
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1033
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1034
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1035
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1036
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1037
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1038
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1039
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1040
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1041
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1042
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1043
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1044
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1045
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1046
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1047
+0x00, 0x92, 0xFF, 0xF7, 0x94, 0xFF, 0x38, 0xBD, 0x38, 0xB5, 0xAB, 0x4C, 0x6A, 0x46, 0x64, 0x1C, 
1048
+0x21, 0x46, 0x03, 0x20, 0xFF, 0xF7, 0xCB, 0xFF, 0x01, 0x20, 0x00, 0x9A, 0x80, 0x03, 0x02, 0x43, 
1049
+0x40, 0x00, 0x82, 0x43, 0x21, 0x46, 0x03, 0x20, 0x00, 0x92, 0xFF, 0xF7, 0x80, 0xFF, 0x64, 0x1E, 
1050
+0x6A, 0x46, 0x21, 0x46, 0x03, 0x20, 0xFF, 0xF7, 0xBA, 0xFF, 0x00, 0x9A, 0xE0, 0x11, 0x82, 0x43, 
1051
+0xF0, 0x20, 0x02, 0x43, 0x21, 0x46, 0x03, 0x20, 0x00, 0x92, 0xFF, 0xF7, 0x70, 0xFF, 0x00, 0x20, 
1052
+0x38, 0xBD, 0x10, 0xB5, 0x9A, 0xA0, 0x01, 0xF0, 0xDD, 0xFC, 0xFF, 0xF7, 0xD5, 0xFF, 0xFF, 0xF7, 
1053
+0xC3, 0xFF, 0x9E, 0x49, 0x01, 0x20, 0x08, 0x70, 0x10, 0xBD, 0x70, 0x47, 0x10, 0xB5, 0x9C, 0xA0, 
1054
+0x01, 0xF0, 0xD0, 0xFC, 0x11, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x70, 0xFE, 0x01, 0x22, 
1055
+0x12, 0x03, 0x10, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x6A, 0xFE, 0x00, 0x22, 0x1F, 0x21, 0x10, 0x46, 
1056
+0x00, 0xF0, 0x65, 0xFE, 0x00, 0x21, 0x08, 0x46, 0xFF, 0xF7, 0x65, 0xFF, 0x40, 0x21, 0x88, 0x43, 
1057
+0x02, 0x46, 0x00, 0x21, 0x08, 0x46, 0x00, 0xF0, 0x5A, 0xFE, 0x07, 0x22, 0x1F, 0x21, 0x00, 0x20, 
1058
+0x00, 0xF0, 0x55, 0xFE, 0x14, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0x55, 0xFF, 0x01, 0x24, 0xE4, 0x03, 
1059
+0x20, 0x43, 0x02, 0x46, 0x14, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x49, 0xFE, 0x11, 0x22, 0x1F, 0x21, 
1060
+0x00, 0x20, 0x00, 0xF0, 0x44, 0xFE, 0x13, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0x44, 0xFF, 0x20, 0x43, 
1061
+0x04, 0x46, 0x01, 0x46, 0x8A, 0xA0, 0x01, 0xF0, 0x95, 0xFC, 0x22, 0x46, 0x13, 0x21, 0x00, 0x20, 
1062
+0x00, 0xF0, 0x35, 0xFE, 0x11, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x30, 0xFE, 0x13, 0x21, 
1063
+0x00, 0x20, 0xFF, 0xF7, 0x30, 0xFF, 0xFF, 0x21, 0x12, 0x31, 0x08, 0x43, 0x04, 0x46, 0x01, 0x46, 
1064
+0x7F, 0xA0, 0x01, 0xF0, 0x7F, 0xFC, 0x22, 0x46, 0x13, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x1F, 0xFE, 
1065
+0x00, 0x22, 0x1F, 0x21, 0x10, 0x46, 0x00, 0xF0, 0x1A, 0xFE, 0x10, 0xBD, 0x10, 0xB5, 0x83, 0xA0, 
1066
+0x01, 0xF0, 0x70, 0xFC, 0x00, 0x22, 0x1F, 0x21, 0x10, 0x46, 0x00, 0xF0, 0x10, 0xFE, 0x00, 0x21, 
1067
+0x08, 0x46, 0xFF, 0xF7, 0x10, 0xFF, 0x40, 0x21, 0x08, 0x43, 0x02, 0x46, 0x00, 0x21, 0x08, 0x46, 
1068
+0x00, 0xF0, 0x05, 0xFE, 0x07, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x00, 0xFE, 0x14, 0x21, 
1069
+0x00, 0x20, 0xFF, 0xF7, 0x00, 0xFF, 0x01, 0x24, 0xE4, 0x03, 0xA0, 0x43, 0x02, 0x46, 0x14, 0x21, 
1070
+0x00, 0x20, 0x00, 0xF0, 0xF4, 0xFD, 0x11, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xEF, 0xFD, 
1071
+0x13, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0xEF, 0xFE, 0xA0, 0x43, 0x02, 0x46, 0x13, 0x21, 0x00, 0x20, 
1072
+0x00, 0xF0, 0xE5, 0xFD, 0x11, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xE0, 0xFD, 0x00, 0x22, 
1073
+0x10, 0x21, 0x10, 0x46, 0x00, 0xF0, 0xDB, 0xFD, 0x11, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 
1074
+0xD6, 0xFD, 0x11, 0x21, 0x01, 0x20, 0xFF, 0xF7, 0xD6, 0xFE, 0x20, 0x43, 0x02, 0x46, 0x11, 0x21, 
1075
+0x00, 0x20, 0x00, 0xF0, 0xCC, 0xFD, 0x00, 0x22, 0x1F, 0x21, 0x10, 0x46, 0x00, 0xF0, 0xC7, 0xFD, 
1076
+0x10, 0xBD, 0x10, 0xB5, 0x61, 0xA0, 0x01, 0xF0, 0x1D, 0xFC, 0xFF, 0xF7, 0xA7, 0xFF, 0xFF, 0xF7, 
1077
+0x45, 0xFF, 0x3E, 0x49, 0x01, 0x20, 0x08, 0x70, 0x10, 0xBD, 0x10, 0xB5, 0x00, 0x22, 0x1F, 0x21, 
1078
+0x10, 0x46, 0x00, 0xF0, 0xB4, 0xFD, 0x7D, 0x24, 0xE4, 0x00, 0x20, 0x46, 0xFF, 0xF7, 0x5B, 0xFE, 
1079
+0x45, 0x22, 0x00, 0x21, 0x92, 0x01, 0x08, 0x46, 0x00, 0xF0, 0xA9, 0xFD, 0x20, 0x46, 0xFF, 0xF7, 
1080
+0x52, 0xFE, 0xFF, 0x22, 0xE2, 0x32, 0x04, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xA0, 0xFD, 0x20, 0x46, 
1081
+0xFF, 0xF7, 0x49, 0xFE, 0x55, 0x4A, 0x05, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x98, 0xFD, 0x20, 0x46, 
1082
+0xFF, 0xF7, 0x41, 0xFE, 0x0F, 0x22, 0x06, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x90, 0xFD, 0x20, 0x46, 
1083
+0xFF, 0xF7, 0x39, 0xFE, 0x4E, 0x4A, 0x07, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x88, 0xFD, 0x20, 0x46, 
1084
+0xFF, 0xF7, 0x31, 0xFE, 0x4B, 0x4A, 0x08, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x80, 0xFD, 0x20, 0x46, 
1085
+0xFF, 0xF7, 0x29, 0xFE, 0x03, 0x22, 0x12, 0x02, 0x09, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x77, 0xFD, 
1086
+0x20, 0x46, 0xFF, 0xF7, 0x20, 0xFE, 0x00, 0x22, 0x0E, 0x21, 0x10, 0x46, 0x00, 0xF0, 0x6F, 0xFD, 
1087
+0x20, 0x46, 0xFF, 0xF7, 0x18, 0xFE, 0xFF, 0x22, 0x6F, 0x32, 0x10, 0x21, 0x00, 0x20, 0x00, 0xF0, 
1088
+0x66, 0xFD, 0x20, 0x46, 0xFF, 0xF7, 0x0F, 0xFE, 0x3B, 0x4A, 0x11, 0x21, 0x00, 0x20, 0x00, 0xF0, 
1089
+0x5E, 0xFD, 0x73, 0xE0, 0xC0, 0x40, 0x00, 0x50, 0xCC, 0x06, 0x00, 0x20, 0x40, 0x00, 0x00, 0x50, 
1090
+0x3F, 0x3F, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0x02, 0x11, 0x00, 0x00, 
1091
+0x2D, 0x2D, 0x70, 0x68, 0x79, 0x5F, 0x77, 0x6F, 0x6C, 0x5F, 0x63, 0x6F, 0x6E, 0x66, 0x69, 0x67, 
1092
+0x20, 0x53, 0x54, 0x41, 0x52, 0x54, 0x2D, 0x2D, 0x0A, 0x00, 0x00, 0x00, 0xA8, 0x01, 0x00, 0x20, 
1093
+0x2D, 0x2D, 0x4C, 0x61, 0x6E, 0x38, 0x30, 0x32, 0x31, 0x66, 0x6E, 0x5F, 0x4D, 0x61, 0x67, 0x69, 
1094
+0x63, 0x5F, 0x50, 0x61, 0x63, 0x6B, 0x65, 0x74, 0x5F, 0x57, 0x61, 0x6B, 0x65, 0x5F, 0x45, 0x6E, 
1095
+0x61, 0x62, 0x6C, 0x65, 0x20, 0x53, 0x54, 0x41, 0x52, 0x54, 0x2D, 0x2D, 0x0A, 0x00, 0x00, 0x00, 
1096
+0x4C, 0x61, 0x6E, 0x38, 0x30, 0x32, 0x31, 0x66, 0x6E, 0x5F, 0x4D, 0x61, 0x67, 0x69, 0x63, 0x5F, 
1097
+0x50, 0x61, 0x63, 0x6B, 0x65, 0x74, 0x5F, 0x57, 0x61, 0x6B, 0x65, 0x5F, 0x45, 0x6E, 0x61, 0x62, 
1098
+0x6C, 0x65, 0x3A, 0x20, 0x30, 0x78, 0x25, 0x30, 0x38, 0x78, 0x0A, 0x00, 0x2D, 0x2D, 0x4C, 0x61, 
1099
+0x6E, 0x38, 0x37, 0x34, 0x78, 0x5F, 0x43, 0x6C, 0x65, 0x61, 0x72, 0x5F, 0x57, 0x61, 0x6B, 0x65, 
1100
+0x73, 0x20, 0x53, 0x54, 0x41, 0x52, 0x54, 0x2D, 0x2D, 0x0A, 0x00, 0x00, 0x2D, 0x2D, 0x70, 0x68, 
1101
+0x79, 0x38, 0x30, 0x32, 0x31, 0x66, 0x6E, 0x5F, 0x77, 0x6F, 0x6C, 0x5F, 0x63, 0x6F, 0x6E, 0x66, 
1102
+0x69, 0x67, 0x20, 0x53, 0x54, 0x41, 0x52, 0x54, 0x2D, 0x2D, 0x0A, 0x00, 0xE1, 0xCD, 0x00, 0x00, 
1103
+0x01, 0x20, 0x00, 0x00, 0x08, 0xE0, 0x00, 0x00, 0x40, 0x70, 0x00, 0x00, 0xFA, 0x4A, 0x12, 0x21, 
1104
+0x00, 0x20, 0x00, 0xF0, 0xE4, 0xFC, 0xC1, 0x22, 0x92, 0x01, 0x13, 0x21, 0x00, 0x20, 0x00, 0xF0, 
1105
+0xDE, 0xFC, 0xF6, 0x4A, 0x14, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xD9, 0xFC, 0xF4, 0x4A, 0x15, 0x21, 
1106
+0x00, 0x20, 0x00, 0xF0, 0xD4, 0xFC, 0x41, 0x22, 0x12, 0x02, 0x16, 0x21, 0x00, 0x20, 0x00, 0xF0, 
1107
+0xCE, 0xFC, 0x21, 0x22, 0x12, 0x02, 0x17, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xC8, 0xFC, 0x23, 0x22, 
1108
+0x92, 0x02, 0x19, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xC2, 0xFC, 0x40, 0x22, 0x1A, 0x21, 0x00, 0x20, 
1109
+0x00, 0xF0, 0xBD, 0xFC, 0xE5, 0x4A, 0x1D, 0x21, 0x08, 0x3A, 0x00, 0x20, 0x00, 0xF0, 0xB7, 0xFC, 
1110
+0xFF, 0x22, 0x24, 0x32, 0x1E, 0x21, 0x00, 0x20, 0x00, 0xF0, 0xB1, 0xFC, 0x00, 0x22, 0x1F, 0x21, 
1111
+0x10, 0x46, 0x00, 0xF0, 0xAC, 0xFC, 0x10, 0xBD, 0x10, 0xB5, 0xFF, 0xF7, 0xEE, 0xFE, 0x00, 0x22, 
1112
+0x1F, 0x21, 0x10, 0x46, 0x00, 0xF0, 0xA3, 0xFC, 0x00, 0x24, 0x21, 0x46, 0x00, 0x20, 0xFF, 0xF7, 
1113
+0xA2, 0xFD, 0x05, 0x2C, 0x03, 0xD0, 0x64, 0x1C, 0x20, 0x2C, 0xF6, 0xD3, 0x18, 0xE0, 0x00, 0x28, 
1114
+0x01, 0xD0, 0x06, 0x24, 0xF1, 0xE7, 0xD3, 0x4A, 0x01, 0x20, 0x10, 0x63, 0xD2, 0x48, 0xFF, 0xF7, 
1115
+0x3A, 0xFD, 0x00, 0x20, 0x10, 0x63, 0xD1, 0x48, 0xFF, 0xF7, 0x35, 0xFD, 0xFF, 0xF7, 0xCD, 0xFE, 
1116
+0x00, 0x24, 0x21, 0x46, 0x00, 0x20, 0xFF, 0xF7, 0x86, 0xFD, 0x64, 0x1C, 0x20, 0x2C, 0xF8, 0xD3, 
1117
+0x07, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x7A, 0xFC, 0x6D, 0x22, 0x1E, 0x21, 0x00, 0x20, 
1118
+0x00, 0xF0, 0x75, 0xFC, 0xC6, 0x4A, 0x16, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x70, 0xFC, 0x01, 0x22, 
1119
+0x12, 0x03, 0x15, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x6A, 0xFC, 0x16, 0x21, 0x00, 0x20, 0xFF, 0xF7, 
1120
+0x6A, 0xFD, 0x15, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0x66, 0xFD, 0x07, 0x22, 0x1F, 0x21, 0x00, 0x20, 
1121
+0x00, 0xF0, 0x5D, 0xFC, 0x6E, 0x22, 0x1E, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x58, 0xFC, 0xB9, 0x4C, 
1122
+0x15, 0x21, 0x62, 0x88, 0x00, 0x20, 0x00, 0xF0, 0x52, 0xFC, 0xA2, 0x88, 0x16, 0x21, 0x00, 0x20, 
1123
+0x00, 0xF0, 0x4D, 0xFC, 0xE2, 0x88, 0x17, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x48, 0xFC, 0x15, 0x21, 
1124
+0x00, 0x20, 0xFF, 0xF7, 0x48, 0xFD, 0x16, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0x44, 0xFD, 0x17, 0x21, 
1125
+0x00, 0x20, 0xFF, 0xF7, 0x40, 0xFD, 0x07, 0x22, 0x1F, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x37, 0xFC, 
1126
+0x6D, 0x22, 0x1E, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x32, 0xFC, 0x01, 0x22, 0x19, 0x21, 0x00, 0x20, 
1127
+0x00, 0xF0, 0x2D, 0xFC, 0x07, 0x22, 0x18, 0x21, 0x00, 0x20, 0x00, 0xF0, 0x28, 0xFC, 0x19, 0x21, 
1128
+0x00, 0x20, 0xFF, 0xF7, 0x28, 0xFD, 0x18, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0x24, 0xFD, 0x00, 0x22, 
1129
+0x1F, 0x21, 0x10, 0x46, 0x00, 0xF0, 0x1B, 0xFC, 0x10, 0xBD, 0x10, 0xB5, 0xFF, 0xF7, 0x6C, 0xFF, 
1130
+0x98, 0x49, 0x01, 0x20, 0x08, 0x70, 0x10, 0xBD, 0x10, 0xB5, 0x00, 0xF0, 0xA1, 0xFB, 0x96, 0x48, 
1131
+0x01, 0x68, 0x96, 0x4A, 0x11, 0x40, 0x01, 0x60, 0x01, 0x68, 0x01, 0x60, 0x00, 0xF0, 0xA4, 0xFB, 
1132
+0x01, 0x22, 0x40, 0x21, 0x92, 0x48, 0xFC, 0xF7, 0x4F, 0xF8, 0x8A, 0x49, 0x00, 0x20, 0x88, 0x61, 
1133
+0x8D, 0x49, 0xC0, 0x31, 0x08, 0x60, 0x10, 0xBD, 0x10, 0xB5, 0xFF, 0xF7, 0xE5, 0xFF, 0x89, 0x48, 
1134
+0x8C, 0x49, 0x80, 0x68, 0x88, 0x42, 0x02, 0xD1, 0xFF, 0xF7, 0xD7, 0xFF, 0x0B, 0xE0, 0x89, 0x49, 
1135
+0xFF, 0x39, 0x88, 0x42, 0x02, 0xD1, 0xFF, 0xF7, 0x24, 0xFE, 0x04, 0xE0, 0x86, 0x49, 0x88, 0x42, 
1136
+0x01, 0xD1, 0xFF, 0xF7, 0x5E, 0xFD, 0xFF, 0xF7, 0x95, 0xFC, 0x10, 0xBD, 0x70, 0x47, 0x10, 0xB5, 
1137
+0xFF, 0xF7, 0xCA, 0xFF, 0x81, 0x48, 0xFF, 0xF7, 0x86, 0xFC, 0x02, 0x21, 0x00, 0x20, 0xFF, 0xF7, 
1138
+0xDA, 0xFC, 0x78, 0x4C, 0x01, 0x04, 0xA0, 0x68, 0x01, 0x43, 0x7D, 0xA0, 0xA1, 0x60, 0x01, 0xF0, 
1139
+0x29, 0xFA, 0x03, 0x21, 0x00, 0x20, 0xFF, 0xF7, 0xCE, 0xFC, 0x81, 0xB2, 0xA0, 0x68, 0x01, 0x43, 
1140
+0x7C, 0xA0, 0xA1, 0x60, 0x01, 0xF0, 0x1E, 0xFA, 0xFF, 0xF7, 0x74, 0xFC, 0xFF, 0xF7, 0xC4, 0xFF, 
1141
+0x10, 0xBD, 0x70, 0xB5, 0x7C, 0xA0, 0x01, 0xF0, 0x15, 0xFA, 0x81, 0x48, 0x00, 0xF0, 0xCB, 0xFD, 
1142
+0x80, 0x48, 0x01, 0x25, 0xC0, 0x79, 0x63, 0x4C, 0x80, 0x07, 0x00, 0x28, 0x0E, 0xDA, 0x25, 0x63, 
1143
+0x61, 0x48, 0xFF, 0xF7, 0x58, 0xFC, 0x00, 0x20, 0x20, 0x63, 0x60, 0x48, 0xFF, 0xF7, 0x53, 0xFC, 
1144
+0x79, 0xA0, 0x01, 0xF0, 0xFF, 0xF9, 0xFF, 0xF7, 0xC2, 0xFF, 0x03, 0xE0, 0x83, 0xA0, 0x01, 0xF0, 
1145
+0xF9, 0xF9, 0x25, 0x63, 0x00, 0x20, 0x70, 0xBD, 0x10, 0xB5, 0x8D, 0xA0, 0x01, 0xF0, 0xF2, 0xF9, 
1146
+0x58, 0x48, 0x6F, 0x49, 0x0C, 0x30, 0x88, 0x60, 0x08, 0x46, 0x00, 0xF0, 0xC2, 0xFD, 0x6C, 0x48, 
1147
+0x00, 0xF0, 0xA1, 0xFD, 0x10, 0xBD, 0xF8, 0xB5, 0x05, 0x46, 0x0C, 0x00, 0x06, 0xD0, 0x00, 0x2A, 
1148
+0x04, 0xD0, 0x07, 0x2D, 0x05, 0xD0, 0x17, 0x2D, 0x4E, 0xD0, 0x40, 0xE0, 0x00, 0x20, 0xC0, 0x43, 
1149
+0xF8, 0xBD, 0x21, 0x78, 0x6C, 0x20, 0x01, 0xF0, 0x4E, 0xF8, 0x06, 0x46, 0x21, 0x78, 0x6D, 0x20, 
1150
+0x01, 0xF0, 0x49, 0xF8, 0x07, 0x46, 0x6C, 0x20, 0x01, 0xF0, 0x6E, 0xF8, 0xB0, 0x42, 0x0E, 0xD0, 
1151
+0x31, 0x46, 0x6C, 0x20, 0x01, 0xF0, 0x92, 0xF8, 0x31, 0x46, 0x6C, 0x20, 0x00, 0xF0, 0x6C, 0xFD, 
1152
+0x3C, 0x48, 0x00, 0x2E, 0x01, 0xD0, 0x00, 0x21, 0x00, 0xE0, 0x01, 0x21, 0x01, 0x63, 0x6D, 0x20, 
1153
+0x01, 0xF0, 0x5A, 0xF8, 0xB8, 0x42, 0x24, 0xD0, 0x39, 0x46, 0x6D, 0x20, 0x01, 0xF0, 0x7E, 0xF8, 
1154
+0x39, 0x46, 0x6D, 0x20, 0x00, 0xF0, 0x58, 0xFD, 0x00, 0x2F, 0x1A, 0xD1, 0x6F, 0xA0, 0x01, 0xF0, 
1155
+0xA9, 0xF9, 0x30, 0x4E, 0x40, 0x3E, 0x36, 0x48, 0x02, 0x21, 0x40, 0x38, 0xFC, 0xF7, 0x7D, 0xFD, 
1156
+0x00, 0x28, 0x0F, 0xD0, 0x70, 0xA0, 0x01, 0xF0, 0x9D, 0xF9, 0x01, 0x20, 0x70, 0x61, 0x18, 0x2D, 
1157
+0x16, 0xD0, 0x19, 0x2D, 0x20, 0xD0, 0x1A, 0x2D, 0x2A, 0xD0, 0x1B, 0x2D, 0x34, 0xD0, 0x1C, 0x2D, 
1158
+0x40, 0xD0, 0xED, 0xE0, 0x77, 0x61, 0xE6, 0xE7, 0x17, 0x20, 0x00, 0xF0, 0x8F, 0xFF, 0x21, 0x78, 
1159
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1160
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1161
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1162
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1163
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1164
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1165
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1166
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1167
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1168
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1169
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1170
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1171
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1172
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1173
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1174
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1175
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1176
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1177
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1178
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1179
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1180
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1181
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1182
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1183
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1184
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1185
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1186
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1187
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1188
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1189
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1190
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1191
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1192
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1193
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1194
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1195
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1196
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1197
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1198
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1199
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1200
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1201
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1202
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1203
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1204
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1205
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1206
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1207
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1208
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1209
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1210
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1211
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1212
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1213
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1214
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1215
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1216
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1217
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1218
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1219
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1220
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1221
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1222
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1223
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1224
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1225
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1226
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1227
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1228
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1229
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1230
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1231
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1232
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1233
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1234
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1235
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1236
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1237
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1238
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1239
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1240
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1241
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1242
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1243
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1244
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1245
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1246
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1247
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1248
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1249
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1250
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1251
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1252
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1253
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1254
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1255
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1256
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1257
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1258
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1259
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1260
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1261
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1262
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1263
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1264
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1265
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1266
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1267
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1268
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1269
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1270
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1302
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1303
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1304
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1305
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1306
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1307
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1308
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1309
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1310
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1311
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1312
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1313
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1314
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1315
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1316
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1317
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1318
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1319
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1321
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1322
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1323
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1324
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1325
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1326
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1327
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1328
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1329
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1330
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1331
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1332
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1333
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1336
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1338
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1339
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1342
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1343
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1344
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1345
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1348
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1349
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1350
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1351
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1352
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1353
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1354
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1356
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1359
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1364
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1381
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1382
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1383
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1384
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1385
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1386
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1387
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1388
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1389
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1390
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1391
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1392
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1393
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1394
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1395
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1396
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1397
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1398
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1399
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1400
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1401
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1402
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1403
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1404
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1405
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1406
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1407
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1408
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1409
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1410
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1411
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1412
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1413
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1414
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1415
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1416
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1417
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1418
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1419
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1420
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1421
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1422
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1423
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1424
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1425
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1426
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1427
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1428
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1429
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1430
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1431
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1432
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1433
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1434
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1435
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1436
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1437
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1438
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1439
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1440
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1441
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1442
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1443
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1444
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1445
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1446
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1447
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1448
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1449
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1450
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1451
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1452
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1453
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1454
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1455
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1456
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1457
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1458
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1459
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1460
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1461
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1462
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1463
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1464
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1465
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1466
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1467
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1468
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1469
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1470
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1471
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1472
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1473
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1474
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1475
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1476
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1477
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1478
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1479
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1480
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1481
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1482
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1483
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1484
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1485
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1486
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1487
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1488
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1489
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1490
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1491
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1492
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1493
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1494
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1495
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1496
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1497
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1498
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1499
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1500
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1501
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1502
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1503
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1504
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1505
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1506
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1507
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1508
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1509
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1510
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1511
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1512
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1513
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1514
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1515
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1516
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1517
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1518
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1519
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1520
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1521
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1522
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1523
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1524
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1525
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1526
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1527
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1528
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1529
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1530
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1531
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1532
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1533
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1534
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1535
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1536
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1537
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1538
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1539
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1540
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1541
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1542
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1543
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1544
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1545
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1546
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1547
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1548
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1549
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1550
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1551
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1552
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1553
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1554
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1555
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1556
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1557
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1558
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1559
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1560
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1561
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1562
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1563
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1564
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1565
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1566
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1567
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1568
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1569
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1570
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1571
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1572
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1573
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1574
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1575
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1576
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1577
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1578
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1579
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1580
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1581
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1582
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1583
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1584
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1585
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1586
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1587
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1588
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1589
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1590
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1591
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1592
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1593
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1594
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1595
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1596
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1597
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1598
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1599
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1600
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1601
+0xD9, 0x04, 0x29, 0xC8, 0xB0, 0x0E, 0x41, 0x6E, 0x61, 0x6C, 0x6F, 0x67, 0x69, 0x78, 0x28, 0x4D, 
1602
+0x43, 0x55, 0x29, 0xA3, 0x53, 0x63, 0x23, 0xE5, 0x3B, 0x9A, 0x5D, 0x10, 0x23, 0x23, 0x3D, 0x9A, 
1603
+0x65, 0x10, 0xE3, 0x0B, 0x3F, 0x9A, 0x72, 0x1C, 0x63, 0x43, 0x47, 0x29, 0xF0, 0x12, 0xFF, 0x12, 
1604
+0xA2, 0x14, 0x02, 0x02, 0xB2, 0x12, 0xDF, 0x12, 0x50, 0x14, 0xBD, 0x40, 0xA2, 0x14, 0xF7, 0x08, 
1605
+0xAF, 0x14, 0x7F, 0x80, 0xE7, 0x3C, 0xEE, 0x12, 0xAF, 0x20, 0x41, 0x13, 0xF0, 0x01, 0x2A, 0x20, 
1606
+0x04, 0x23, 0x4D, 0x55, 0x1A, 0xA3, 0x04, 0x23, 0x51, 0x56, 0x13, 0x04, 0x02, 0x2A, 0x20, 0x04, 
 kernel/drivers/misc/nkio/mcu/jw_mcu_isp.h
..
..
@@ -0,0 +1,12 @@
1
+
2
+
3
+
4
+#define CMD_UPDATE_APROM		0x000000A0
5
+#define CMD_UPDATE_APROM_DATA	0x000000A1
6
+#define CMD_UPDATE_CONTINUOUS   0x00000000
7
+#define CMD_INTER_APROM         0x000000A2
8
+#define CMD_UPDATE_CONTINUOUS_END 0x000000A3
9
+
10
+
11
+
12
+
 kernel/drivers/misc/nkio/nk_io_core.c
..
..
@@ -0,0 +1,622 @@
1
+/* 
2
+ * Copyright (C) 2014 Rockchip Corporation.
3
+ *
4
+ * This software is licensed under the terms of the GNU General Public
5
+ * License version 2, as published by the Free Software Foundation, and
6
+ * may be copied, distributed, and modified under those terms.
7
+ *
8
+ * This program is distributed in the hope that it will be useful,
9
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
+ * GNU General Public License for more details.
12
+ *
13
+ */
14
+#include <linux/module.h>
15
+#include <linux/moduleparam.h>
16
+#include <linux/init.h>
17
+#include <linux/delay.h>
18
+#include <linux/pm.h>
19
+#include <linux/i2c.h>
20
+#include <linux/spi/spi.h>
21
+#include <linux/platform_device.h>
22
+#include <linux/errno.h>
23
+#include <linux/err.h>
24
+#include <linux/debugfs.h>
25
+#include <linux/of_gpio.h>
26
+#include <linux/gpio.h>
27
+#include <linux/iio/consumer.h>
28
+#include <linux/of.h>
29
+#include "nkio.h"
30
+
31
+/* Debug */
32
+#if 1
33
+#define DBG(x...) printk(x)
34
+#else
35
+#define DBG(x...) do { } while (0)
36
+#endif
37
+
38
+struct nk_io_pdata *NKpdata_info;
39
+u32 op0_enable,op1_enable,op2_enable,op3_enable,op4_enable,op5_enable,mic_enable;
40
+u32 ip0_enable,ip1_enable,ip2_enable,ip3_enable,ip4_enable,ip5_enable;
41
+u32 module_enable;
42
+//static struct class *nk_class;
43
+
44
+
45
+void MODULE_SET(int i)
46
+{
47
+	if(i==11){
48
+		gpio_direction_output(NKpdata_info->en_4g_gpio, 1);
49
+	}else{
50
+		gpio_direction_output(NKpdata_info->en_4g_gpio, 0);
51
+	}
52
+}
53
+
54
+EXPORT_SYMBOL_GPL(MODULE_SET);
55
+
56
+
57
+void LED_SET(int i)
58
+{
59
+	if(i==11){
60
+		gpio_direction_output(NKpdata_info->led_gpio, 1);
61
+	}else{
62
+		gpio_direction_output(NKpdata_info->led_gpio, 0);
63
+	}
64
+}
65
+
66
+EXPORT_SYMBOL_GPL(LED_SET);
67
+
68
+
69
+void Audio_SET(int i);
70
+
71
+  void Audio_SET(int i)
72
+ {
73
+	 if(i==11){
74
+		 gpio_direction_output(NKpdata_info->audio_switch_gpio, 1);
75
+		 printk("Audio_SET ENABLE------andy\n");
76
+	 }else{
77
+		 gpio_direction_output(NKpdata_info->audio_switch_gpio, 0);
78
+		 printk("Audio_SET DISABLE------andy\n");
79
+	 }
80
+ }
81
+  EXPORT_SYMBOL_GPL(Audio_SET);
82
+
83
+static int nk_io_control_probe(struct platform_device *pdev)
84
+{
85
+	struct device_node *node = pdev->dev.of_node;
86
+	struct nk_io_pdata *pdata;	
87
+	int gpio0, gpio1, gpio2, gpio3, reset_pin, ch342_reset;
88
+	int ret;
89
+        int lvds_index;
90
+        int i=0;
91
+        static int lvds_gpio[4] ;
92
+
93
+	enum of_gpio_flags flags;
94
+	
95
+	printk(" #######nk_io_control_probe####### \n");
96
+
97
+	pdata = kzalloc(sizeof(struct nk_io_pdata), GFP_KERNEL);
98
+	if (pdata == NULL) {
99
+		printk("%s failed to allocate driver data\n",__FUNCTION__);
100
+		return -ENOMEM;
101
+	}
102
+	memset(pdata,0,sizeof(struct nk_io_pdata));
103
+	
104
+	//vcc_5v_io
105
+	ret = of_get_named_gpio_flags(node, "vcc_5v_io", 0, &flags);
106
+	if (ret < 0) {
107
+		printk("%s() Can not read property vcc_5v_io\n", __FUNCTION__);
108
+		goto err;
109
+	} else {
110
+		pdata->vcc_5v_io = ret;
111
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc_5v_io, "vcc_5v_io");
112
+		if(ret < 0){
113
+			printk("%s() devm_gpio_request vcc_5v_io request ERROR\n", __FUNCTION__);
114
+			goto err;
115
+		}
116
+
117
+		ret = gpio_direction_output(pdata->vcc_5v_io,1); 
118
+		if(ret < 0){
119
+			printk("%s() gpio_direction_input vcc_5v_io set ERROR\n", __FUNCTION__);
120
+			goto err;
121
+		}
122
+	}
123
+	
124
+	//vcc3_io_en_gpio
125
+	ret = of_get_named_gpio_flags(node, "vcc3_io_en_gpio", 0, &flags);
126
+	if (ret < 0) {
127
+		printk("%s() Can not read property tp_enable\n", __FUNCTION__);
128
+		goto err;
129
+	} else {
130
+		pdata->vcc3_io_en_gpio = ret;
131
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc3_io_en_gpio, "vcc3_io_en_gpio");
132
+		if(ret < 0){
133
+			printk("%s() devm_gpio_request vcc3_io_en_gpio request ERROR\n", __FUNCTION__);
134
+			goto err;
135
+		}
136
+
137
+		ret = gpio_direction_output(pdata->vcc3_io_en_gpio,1); 
138
+		if(ret < 0){
139
+			printk("%s() gpio_direction_output vcc3_io_en_gpio set ERROR\n", __FUNCTION__);
140
+			goto err;
141
+		}
142
+	}
143
+
144
+        //vcc_12v_io
145
+        ret = of_get_named_gpio_flags(node, "vcc_12v_io", 0, &flags);
146
+        if (ret < 0) {
147
+                printk("%s() Can not read property vcc_12v_io\n", __FUNCTION__);
148
+                goto err;
149
+        } else {
150
+                pdata->vcc_12v_io = ret;
151
+                ret = devm_gpio_request(&pdev->dev, pdata->vcc_12v_io, "vcc_12v_io");
152
+                if(ret < 0){
153
+                        printk("%s() devm_gpio_request vcc_12v_io request ERROR\n", __FUNCTION__);
154
+                        goto err;
155
+                }
156
+
157
+                ret = gpio_direction_output(pdata->vcc_12v_io,1);
158
+                if(ret < 0){
159
+                        printk("%s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
160
+                        goto err;
161
+                }
162
+        }
163
+
164
+
165
+	
166
+	//hub_host2_5v_gpio
167
+	ret = of_get_named_gpio_flags(node, "hub_host2_5v_gpio", 0, &flags);
168
+	if (ret < 0) {
169
+		printk("%s() Can not read property hub_host2_5v_gpio\n", __FUNCTION__);
170
+		goto err;
171
+	} else {
172
+		pdata->hub_host2_5v_gpio = ret;
173
+		gpio_free(ret);
174
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5v_gpio, "hub_host2_5v_gpio");
175
+		if (ret < 0){
176
+			printk("%s() devm_gpio_request hub_host2_5v_gpio request ERROR\n", __FUNCTION__);
177
+			goto err;
178
+		}
179
+
180
+		ret = gpio_direction_output(pdata->hub_host2_5v_gpio,1); 
181
+		if(ret < 0){
182
+			printk("%s() gpio_direction_input hub_host2_5v_gpio set ERROR\n", __FUNCTION__);
183
+			goto err;
184
+		}
185
+	}
186
+	
187
+	//usb_en_oc_gpio
188
+	ret = of_get_named_gpio_flags(node, "usb_en_oc_gpio", 0, &flags);
189
+	if (ret < 0) {
190
+		printk("%s() Can not read property usb_en_oc_gpio\n", __FUNCTION__);
191
+		goto err;
192
+	} else {
193
+		pdata->usb_en_oc_gpio = ret;
194
+		gpio_free(ret);
195
+		ret = devm_gpio_request(&pdev->dev, pdata->usb_en_oc_gpio, "usb_en_oc_gpio");
196
+		if (ret < 0){
197
+			printk("%s() devm_gpio_request usb_en_oc_gpio request ERROR\n", __FUNCTION__);
198
+			goto err;
199
+		}
200
+
201
+		ret = gpio_direction_output(pdata->usb_en_oc_gpio,1); 
202
+		if(ret < 0){
203
+			printk("%s() gpio_direction_input usb_en_oc_gpio set ERROR\n", __FUNCTION__);
204
+			goto err;
205
+		}
206
+	}
207
+
208
+	//hub_host2_5V_rest_gpio
209
+	ret = of_get_named_gpio_flags(node, "hub_host2_5V_rest_gpio", 0, &flags);
210
+	if (ret < 0) {
211
+		printk("%s() Can not read property hub_host2_5V_rest_gpio\n", __FUNCTION__);
212
+		goto err;
213
+	} else {
214
+		pdata->hub_host2_5V_rest_gpio = ret;
215
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5V_rest_gpio, "hub_host2_5V_rest_gpio");
216
+		if(ret < 0){
217
+			printk("%s() devm_gpio_request hub_host2_5V_rest_gpio request ERROR\n", __FUNCTION__);
218
+			goto err;
219
+		}
220
+
221
+		ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,0); 
222
+		if(ret < 0){
223
+			printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
224
+			goto err;
225
+		}
226
+		msleep(800);
227
+		ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,1); 
228
+		if(ret < 0){
229
+			printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
230
+			goto err;
231
+		}
232
+	}
233
+
234
+	//hub_host3_5v_gpio
235
+	ret = of_get_named_gpio_flags(node, "hub_host3_5v_gpio", 0, &flags);
236
+	if (ret < 0) {
237
+		printk("%s() Can not read property hub_host3_5v_gpio\n", __FUNCTION__);
238
+		goto err;
239
+	} else {
240
+		pdata->hub_host3_5v_gpio = ret;
241
+		gpio_free(ret);
242
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5v_gpio, "hub_host3_5v_gpio");
243
+		if(ret < 0){
244
+			printk("%s() devm_gpio_request hub_host3_5v_gpio request ERROR\n", __FUNCTION__);
245
+			goto err;
246
+		}
247
+
248
+		ret = gpio_direction_output(pdata->hub_host3_5v_gpio,1); 
249
+		if(ret < 0){
250
+			printk("%s() gpio_direction_input hub_host3_5v_gpio set ERROR\n", __FUNCTION__);
251
+			goto err;
252
+		}
253
+	}
254
+#if 0
255
+	//hub_host3_5V_rest_gpio
256
+	ret = of_get_named_gpio_flags(node, "hub_host3_5V_rest_gpio", 0, &flags);
257
+	if (ret < 0) {
258
+		printk("%s() Can not read property hub_host3_5V_rest_gpio\n", __FUNCTION__);
259
+		goto err;
260
+	} else {
261
+		pdata->hub_host3_5V_rest_gpio = ret;
262
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5V_rest_gpio, "hub_host3_5V_rest_gpio");
263
+		if(ret < 0){
264
+			printk("%s() devm_gpio_request hub_host3_5V_rest_gpio request ERROR\n", __FUNCTION__);
265
+			goto err;
266
+		}
267
+
268
+		ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,0); 
269
+		if(ret < 0){
270
+			printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
271
+			goto err;
272
+		}
273
+		msleep(800);
274
+		ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,1); 
275
+		if(ret < 0){
276
+			printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
277
+			goto err;
278
+		}
279
+	}
280
+#endif
281
+	//wake_4g_gpio
282
+	   ret = of_get_named_gpio_flags(node, "wake_4g_gpio", 0, &flags);
283
+	   if (ret < 0) {
284
+	           printk("%s() Can not read property wake_4g_gpio\n", __FUNCTION__);
285
+	   } else {
286
+	           pdata->wake_4g_gpio = ret;
287
+
288
+	           ret = devm_gpio_request(&pdev->dev, pdata->wake_4g_gpio, "wake_4g_gpio");
289
+	           if(ret < 0){
290
+	                   printk("%s() devm_gpio_request wake_4g_gpio request ERROR\n", __FUNCTION__);
291
+	           }
292
+	           ret = gpio_direction_output(pdata->wake_4g_gpio,0);
293
+	           if(ret < 0){
294
+	                   printk("%s() gpio_direction_input wake_4g_gpio set ERROR\n", __FUNCTION__);
295
+	           }
296
+	   }
297
+
298
+
299
+	   //reset_4g_gpio
300
+	   ret = of_get_named_gpio_flags(node, "reset_4g_gpio", 0, &flags);
301
+	   if (ret < 0) {
302
+	           printk("%s() Can not read property reset_4g_gpio\n", __FUNCTION__);
303
+	   } else {
304
+	           pdata->reset_4g_gpio = ret;
305
+
306
+	           ret = devm_gpio_request(&pdev->dev, pdata->reset_4g_gpio, "reset_4g_gpio");
307
+	           if(ret < 0){
308
+	                   printk("%s() devm_gpio_request reset_4g_gpio request ERROR\n", __FUNCTION__);
309
+	           }
310
+	           ret = gpio_direction_output(pdata->reset_4g_gpio,0);
311
+	           if(ret < 0){
312
+	                   printk("%s() gpio_direction_input reset_4g_gpio set ERROR\n", __FUNCTION__);
313
+	           }
314
+	   }
315
+
316
+	   //en_4g_gpio
317
+	   ret = of_get_named_gpio_flags(node, "en_4g_gpio", 0, &flags);
318
+	   if (ret < 0) {
319
+	           printk("%s() Can not read property en_4g_gpio\n", __FUNCTION__);
320
+	   } else {
321
+	           pdata->en_4g_gpio = ret;
322
+
323
+	           ret = devm_gpio_request(&pdev->dev, pdata->en_4g_gpio, "en_4g_gpio");
324
+	           if(ret < 0){
325
+	                   printk("%s() devm_gpio_request en_4g_gpio request ERROR\n", __FUNCTION__);
326
+	           }
327
+	           ret = gpio_direction_output(pdata->en_4g_gpio,1);
328
+	           if(ret < 0){
329
+	                   printk("%s() gpio_direction_input en_4g_gpio set ERROR\n", __FUNCTION__);
330
+	           }
331
+	   }
332
+
333
+
334
+	   //air_mode_4g_gpio
335
+	   ret = of_get_named_gpio_flags(node, "air_mode_4g_gpio", 0, &flags);
336
+	   if (ret < 0) {
337
+	           printk("%s() Can not read property air_mode_4g_gpio\n", __FUNCTION__);
338
+	   } else {
339
+	           pdata->air_mode_4g_gpio = ret;
340
+
341
+	           ret = devm_gpio_request(&pdev->dev, pdata->air_mode_4g_gpio, "air_mode_4g_gpio");
342
+	           if(ret < 0){
343
+	                   printk("%s() devm_gpio_request air_mode_4g_gpio request ERROR\n", __FUNCTION__);
344
+	           }
345
+	           ret = gpio_direction_output(pdata->air_mode_4g_gpio,0);
346
+	           if(ret < 0){
347
+	                   printk("%s() gpio_direction_input air_mode_4g_gpio set ERROR\n", __FUNCTION__);
348
+	           }
349
+	   }
350
+
351
+	  
352
+/*
353
+	//edp_power_supply_gpio;
354
+	ret = of_get_named_gpio_flags(node, "edp_power_supply_gpio", 0, &flags);
355
+	if (ret < 0) {
356
+		printk("%s() Can not read property edp_power_supply_gpio\n", __FUNCTION__);
357
+	} else {
358
+		pdata->edp_power_supply_gpio = ret;
359
+
360
+		ret = devm_gpio_request(&pdev->dev, pdata->edp_power_supply_gpio, "edp_power_supply_gpio");
361
+		if(ret < 0){
362
+			printk("%s() devm_gpio_request edp_power_supply_gpio request ERROR\n", __FUNCTION__);
363
+		}
364
+		
365
+		ret = gpio_direction_output(pdata->edp_power_supply_gpio,1);
366
+		if(ret < 0){
367
+			printk("%s() gpio_direction_input edp_power_supply_gpio set ERROR\n", __FUNCTION__);
368
+		}
369
+	}
370
+	
371
+   //edp_enable-gpio;
372
+	ret = of_get_named_gpio_flags(node, "edp_enable_gpio", 0, &flags);
373
+	if (ret < 0) {
374
+		printk("%s() Can not read property edp_enable_gpio\n", __FUNCTION__);
375
+	} else {
376
+		pdata->edp_enable_gpio = ret;
377
+
378
+		ret = devm_gpio_request(&pdev->dev, pdata->edp_enable_gpio, "edp_enable_gpio");
379
+		if(ret < 0){
380
+			printk("%s() devm_gpio_request edp_enable_gpio request ERROR\n", __FUNCTION__);
381
+		}
382
+		
383
+		ret = gpio_direction_output(pdata->edp_enable_gpio,1);
384
+		if(ret < 0){
385
+			printk("%s() gpio_direction_input edp_enable_gpio set ERROR\n", __FUNCTION__);
386
+		}
387
+	} 
388
+  
389
+   //ch342_enable-gpio;
390
+	ret = of_get_named_gpio_flags(node, "ch342_power", 0, &flags);
391
+	if (ret < 0) {
392
+		printk("%s() Can not read property ch342_gpio\n", __FUNCTION__);
393
+	} else {
394
+		pdata->ch342_power = ret;
395
+
396
+		ret = devm_gpio_request(&pdev->dev, pdata->ch342_power, "ch342_power");
397
+		if(ret < 0){
398
+			printk("%s() devm_gpio_request ch342_power request ERROR\n", __FUNCTION__);
399
+		}
400
+		
401
+		ret = gpio_direction_output(pdata->ch342_power,1);
402
+		if(ret < 0){
403
+			printk("%s() gpio_direction_input ch342_power set ERROR\n", __FUNCTION__);
404
+		}
405
+	}   
406
+*/
407
+
408
+        //edp_set_pixel-s
409
+         ret = of_get_named_gpio_flags(node, "edp_reset", 0, &flags);
410
+    if (ret < 0) {
411
+        printk("%s() Can not read property edp_reset\n", __FUNCTION__);
412
+        goto err;
413
+    }
414
+
415
+    reset_pin = ret;
416
+
417
+// enable lvds
418
+     ret = of_get_named_gpio_flags(node, "edp_gpio0", 0, &flags);
419
+    if (ret < 0) {
420
+        printk("%s() Can not read property edp_gpio0\n", __FUNCTION__);
421
+        goto err;
422
+    }
423
+	 gpio0 = ret;
424
+
425
+
426
+
427
+    ret = of_get_named_gpio_flags(node, "edp_gpio1", 0, &flags);
428
+    if (ret < 0) {
429
+        printk("%s() Can not read property edp_gpio1\n", __FUNCTION__);
430
+        goto err;
431
+    }
432
+
433
+        gpio1 = ret;
434
+
435
+    ret = of_get_named_gpio_flags(node, "edp_gpio2", 0, &flags);
436
+    if (ret < 0) {
437
+        printk("%s() Can not read property edp_gpio2\n", __FUNCTION__);
438
+        goto err;
439
+    }
440
+
441
+    gpio2 = ret;
442
+
443
+    ret = of_get_named_gpio_flags(node, "edp_gpio3", 0, &flags);
444
+    if (ret < 0) {
445
+        printk("%s() Can not read property edp_gpio3\n", __FUNCTION__);
446
+        goto err;
447
+    }
448
+
449
+    gpio3 = ret;
450
+
451
+
452
+	 ret = devm_gpio_request(&pdev->dev, reset_pin, "edp_reset");
453
+    if(ret < 0){
454
+        printk("%s() devm_gpio_request edp_reset request ERROR\n", __FUNCTION__);
455
+        goto err;
456
+    }
457
+
458
+
459
+    ret = devm_gpio_request(&pdev->dev, gpio0, "edp_gpio0");
460
+    if(ret < 0){
461
+        printk("%s() devm_gpio_request edp_gpio0 request ERROR\n", __FUNCTION__);
462
+        goto err;
463
+    }
464
+
465
+    ret = devm_gpio_request(&pdev->dev, gpio1, "edp_gpio1");
466
+    if(ret < 0){
467
+        printk("%s() devm_gpio_request edp_gpio1 request ERROR\n", __FUNCTION__);
468
+        goto err;
469
+    }
470
+
471
+    ret = devm_gpio_request(&pdev->dev, gpio2, "edp_gpio2");
472
+    if(ret < 0){
473
+        printk("%s() devm_gpio_request edp_gpio2 request ERROR\n", __FUNCTION__);
474
+        goto err;
475
+    }
476
+
477
+    ret = devm_gpio_request(&pdev->dev, gpio3, "edp_gpio3");
478
+    if(ret < 0){
479
+        printk("%s() devm_gpio_request edp_gpio3 request ERROR\n", __FUNCTION__);
480
+        goto err;
481
+    }
482
+	
483
+	   ret = of_property_read_u32(node, "nodka_lvds", &lvds_index);
484
+        if (ret < 0){
485
+                printk("%s() Can not read property nodka_lvds\n", __FUNCTION__);
486
+        }
487
+
488
+        printk("nodka_lvds_index = %d\n",lvds_index);
489
+
490
+        while ( i < 4 ){
491
+                if ( lvds_index > 0)
492
+                        lvds_gpio[i] = lvds_index%2;
493
+                else
494
+                        lvds_gpio[i] = 0;
495
+                printk("lvds_gpio[%d]=%d\n",i,lvds_gpio[i]);
496
+                lvds_index = lvds_index/2;
497
+                i++;
498
+        }
499
+
500
+    gpio_direction_output(reset_pin, 0);
501
+    usleep_range(80000, 100000);
502
+    gpio_direction_output(reset_pin, 1);
503
+    usleep_range(80000, 100000);
504
+
505
+	gpio_direction_output(gpio0, lvds_gpio[0]);
506
+	gpio_direction_output(gpio1, lvds_gpio[1]);
507
+	gpio_direction_output(gpio2, lvds_gpio[2]);
508
+	gpio_direction_output(gpio3, lvds_gpio[3]);
509
+	
510
+	printk(" #######nk_io_control_probe end####### \n");
511
+	return 0;
512
+	
513
+err:
514
+	kfree(pdata);
515
+	return ret;	
516
+}	
517
+
518
+
519
+static int nk_io_control_remove(struct platform_device *pdev)
520
+{
521
+	if(NKpdata_info)
522
+		kfree(NKpdata_info);
523
+	return 0;
524
+}
525
+
526
+static int nk_io_control_suspend(struct platform_device *pdev, pm_message_t state)
527
+{
528
+	int ret;
529
+	struct nk_io_pdata *pdata;
530
+	printk("nk_suspend  !!!!\n");
531
+#if 0
532
+	ret = gpio_get_value(8);
533
+	printk("vcc12v gpio value : %d\n",ret);
534
+        usleep_range(80000, 100000);
535
+        gpio_set_value(8,0);
536
+	ret = gpio_get_value(8);
537
+	printk("vcc12v gpio value : %d\n",ret);
538
+#endif
539
+#if 0
540
+	ret = gpio_get_value(21);
541
+	printk("hub_host3_5v_gpio value : %d\n",ret);
542
+        usleep_range(80000, 100000);
543
+        gpio_set_value(21,0);
544
+	ret = gpio_get_value(21);
545
+	printk("hub_host3_5v_gpio value : %d\n",ret);
546
+	//enable = 0;
547
+	//LED_SET(0);
548
+#endif
549
+	return 0;
550
+}
551
+
552
+static int nk_io_control_resume(struct platform_device *pdev)
553
+{
554
+       int ret,reset_pin;
555
+        printk("nk_io resume !!!!\n");
556
+        ret = gpio_get_value(120);
557
+
558
+#if 0
559
+        gpio_set_value(8,1);
560
+	ret = gpio_get_value(8);
561
+	printk("vcc12v gpio value : %d\n",ret);
562
+#endif
563
+#if 0
564
+        gpio_set_value(15,1);
565
+	ret = gpio_get_value(15);
566
+	printk("edp_en gpio value : %d\n",ret);
567
+        gpio_set_value(21,1);
568
+	ret = gpio_get_value(21);
569
+	printk("hub_host3_5v_gpio value : %d\n",ret);
570
+#endif
571
+#if 0
572
+        usleep_range(80000, 100000);
573
+        gpio_set_value(120,0);
574
+//      gpio_direction_output(120, 0);
575
+        usleep_range(80000, 100000);
576
+        ret = gpio_get_value(120);
577
+        printk("edp_reset gpio value : %d\n",ret);
578
+//      gpio_direction_output(120, 1);
579
+        gpio_set_value(120,1);
580
+        usleep_range(80000, 100000);
581
+        ret = gpio_get_value(120);
582
+        printk("edp_reset gpio value : %d\n",ret);
583
+#endif
584
+        //enable = 1;
585
+        //LED_SET(11);
586
+        return 0;
587
+}
588
+
589
+static const struct of_device_id nk_io_control_of_match[] = {
590
+        { .compatible = "nk_io_control", },
591
+        {},
592
+};
593
+MODULE_DEVICE_TABLE(of, nk_io_control_of_match);
594
+
595
+static struct platform_driver nk_io_control_driver = {
596
+	.probe	= nk_io_control_probe,
597
+	.remove = nk_io_control_remove,
598
+	.resume = 	nk_io_control_resume,	
599
+	.suspend = 	nk_io_control_suspend,	
600
+	.driver	= {
601
+		.name	= "nk_io_control",
602
+		.owner	= THIS_MODULE,
603
+		.of_match_table = of_match_ptr(nk_io_control_of_match),		
604
+	},
605
+};
606
+
607
+static int __init nk_io_control_init(void)
608
+{
609
+	platform_driver_register(&nk_io_control_driver);
610
+	return 0;
611
+}
612
+
613
+static void __exit nk_io_control_exit(void)
614
+{
615
+	platform_driver_unregister(&nk_io_control_driver);
616
+}
617
+
618
+subsys_initcall(nk_io_control_init);
619
+
620
+//late_initcall(nk_io_control_init);
621
+MODULE_DESCRIPTION("nk io Core Driver");
622
+MODULE_LICENSE("GPL");

 kernel/drivers/misc/nkio/nk_io_core.c_suspend
..
..
@@ -0,0 +1,1882 @@
1
+/* 
2
+ * Copyright (C) 2014 Rockchip Corporation.
3
+ *
4
+ * This software is licensed under the terms of the GNU General Public
5
+ * License version 2, as published by the Free Software Foundation, and
6
+ * may be copied, distributed, and modified under those terms.
7
+ *
8
+ * This program is distributed in the hope that it will be useful,
9
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
+ * GNU General Public License for more details.
12
+ *
13
+ */
14
+#include <linux/module.h>
15
+#include <linux/moduleparam.h>
16
+#include <linux/init.h>
17
+#include <linux/delay.h>
18
+#include <linux/pm.h>
19
+#include <linux/i2c.h>
20
+#include <linux/spi/spi.h>
21
+#include <linux/platform_device.h>
22
+#include <linux/errno.h>
23
+#include <linux/err.h>
24
+#include <linux/debugfs.h>
25
+#include <linux/of_gpio.h>
26
+#include <linux/gpio.h>
27
+#include <linux/iio/consumer.h>
28
+#include <linux/of.h>
29
+#include "nkio.h"
30
+
31
+/* Debug */
32
+#if 1
33
+#define DBG(x...) printk(x)
34
+#else
35
+#define DBG(x...) do { } while (0)
36
+#endif
37
+
38
+struct nk_io_pdata *NKpdata_info;
39
+u32 op0_enable,op1_enable,op2_enable,op3_enable,op4_enable,op5_enable,mic_enable;
40
+u32 ip0_enable,ip1_enable,ip2_enable,ip3_enable,ip4_enable,ip5_enable;
41
+u32 module_enable;
42
+//static struct class *nk_class;
43
+
44
+
45
+#if 0
46
+
47
+ void mic_switch_control(int i)
48
+{
49
+if(i==11){
50
+	gpio_direction_output(NKpdata_info->mic_switch_gpio, 1);
51
+	printk("mic_switch_control ENABLE------andy\n");
52
+}else{
53
+	gpio_direction_output(NKpdata_info->mic_switch_gpio, 0);
54
+	printk("mic_switch_control DISABLE------andy\n");
55
+}
56
+}
57
+
58
+
59
+
60
+
61
+static ssize_t mic_switch_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
62
+{	
63
+		sscanf(buf, "%d", &mic_enable);
64
+		printk("MIC_SWITCH enable =%d\n",mic_enable);
65
+
66
+	if (mic_enable)
67
+		{
68
+			printk("store_MIC_SWITCH ENABLE------andy\n");
69
+			mic_switch_control(11);
70
+		}
71
+		else {
72
+			mic_switch_control(0);
73
+			printk("store_MIC_SWITCH DISABLE------andy\n");
74
+		}
75
+		return count;
76
+}
77
+
78
+static ssize_t mic_switch_show(struct class *class,struct class_attribute *attr, char *buf)
79
+{
80
+return snprintf(buf, 3, "%d\n",mic_enable);
81
+}
82
+
83
+static CLASS_ATTR(mic_switch, 0664, mic_switch_show, mic_switch_store);
84
+
85
+
86
+ 
87
+  void Audio_SET(int i)
88
+ {
89
+	 if(i==11){
90
+		 gpio_direction_output(NKpdata_info->audio_switch_gpio, 1);
91
+		 printk("Audio_SET ENABLE------andy\n");
92
+	 }else{
93
+		 gpio_direction_output(NKWpdata_info->audio_switch_gpio, 0);
94
+		 printk("Audio_SET DISABLE------andy\n");
95
+	 }
96
+ }
97
+  EXPORT_SYMBOL_GPL(Audio_SET);
98
+
99
+
100
+
101
+static void LED_SET(int i)
102
+{
103
+	if(i==11){
104
+		gpio_direction_output(NKpdata_info->led_gpio, 1);
105
+	}else{
106
+		gpio_direction_output(NKpdata_info->led_gpio, 0);
107
+	}
108
+}
109
+
110
+
111
+
112
+static ssize_t led_display_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
113
+{	
114
+		sscanf(buf, "%d", &enable);
115
+		printk("store_led enable =%d\n",enable);
116
+
117
+	if (enable)
118
+		{
119
+			printk("store_led ENABLE------andy\n");
120
+			LED_SET(11);
121
+		}
122
+		else {
123
+			LED_SET(0);
124
+			printk("store_led DISABLE------andy\n");
125
+		}
126
+		return count;
127
+}
128
+
129
+static ssize_t led_display_show(struct class *class,struct class_attribute *attr, char *buf)
130
+{
131
+return snprintf(buf, 3, "%d\n",enable);
132
+}
133
+
134
+static CLASS_ATTR(led_display, 0664, led_display_show, led_display_store);
135
+
136
+#endif
137
+
138
+void MODULE_SET(int i)
139
+{
140
+	if(i==11){
141
+		gpio_direction_output(NKpdata_info->en_4g_gpio, 1);
142
+	}else{
143
+		gpio_direction_output(NKpdata_info->en_4g_gpio, 0);
144
+	}
145
+}
146
+
147
+EXPORT_SYMBOL_GPL(MODULE_SET);
148
+
149
+
150
+void LED_SET(int i)
151
+{
152
+	if(i==11){
153
+		gpio_direction_output(NKpdata_info->led_gpio, 1);
154
+	}else{
155
+		gpio_direction_output(NKpdata_info->led_gpio, 0);
156
+	}
157
+}
158
+
159
+EXPORT_SYMBOL_GPL(LED_SET);
160
+
161
+
162
+void Audio_SET(int i);
163
+
164
+  void Audio_SET(int i)
165
+ {
166
+	 if(i==11){
167
+		 gpio_direction_output(NKpdata_info->audio_switch_gpio, 1);
168
+		 printk("Audio_SET ENABLE------andy\n");
169
+	 }else{
170
+		 gpio_direction_output(NKpdata_info->audio_switch_gpio, 0);
171
+		 printk("Audio_SET DISABLE------andy\n");
172
+	 }
173
+ }
174
+  EXPORT_SYMBOL_GPL(Audio_SET);
175
+
176
+
177
+//6 in 6 out-s
178
+static void GPIO_IO_SET(int i)
179
+{
180
+	if(i==11){
181
+		gpio_direction_output(NKpdata_info->gpio_op0, 1);
182
+	}
183
+	else if(i==10){
184
+		gpio_direction_output(NKpdata_info->gpio_op0, 0);
185
+	}
186
+	else if(i==21){
187
+		gpio_direction_output(NKpdata_info->gpio_op1, 1);
188
+	}
189
+	else if(i==20){
190
+		gpio_direction_output(NKpdata_info->gpio_op1, 0);
191
+	}
192
+	else if(i==31){
193
+		gpio_direction_output(NKpdata_info->gpio_op2, 1);
194
+	}
195
+	else if(i==30){
196
+		gpio_direction_output(NKpdata_info->gpio_op2, 0);
197
+	}
198
+	else if(i==41){
199
+		gpio_direction_output(NKpdata_info->gpio_op3, 1);
200
+	}
201
+	else if(i==40){
202
+		gpio_direction_output(NKpdata_info->gpio_op3, 0);
203
+	}
204
+	else if(i==51){
205
+		gpio_direction_output(NKpdata_info->gpio_op4, 1);
206
+	}
207
+	else if(i==50){
208
+		gpio_direction_output(NKpdata_info->gpio_op4, 0);
209
+	}
210
+	else if(i==61){
211
+		gpio_direction_output(NKpdata_info->gpio_op5, 1);
212
+	}
213
+	else if(i==60){
214
+		gpio_direction_output(NKpdata_info->gpio_op5, 0);
215
+	}
216
+	/*
217
+		else if(i==51){
218
+		gpio_direction_output(NKpdata_info->gpio_ip0, 1);
219
+	}
220
+		else if(i==50){
221
+		gpio_direction_output(NKpdata_info->gpio_ip0, 0);
222
+	}
223
+		else if(i==61){
224
+		gpio_direction_output(NKpdata_info->gpio_ip1, 1);
225
+	}
226
+		else if(i==60){
227
+		gpio_direction_output(NKpdata_info->gpio_ip1, 0);
228
+	}
229
+		else if(i==71){
230
+		gpio_direction_output(NKpdata_info->gpio_ip2, 1);
231
+	}
232
+		else if(i==70){
233
+		gpio_direction_output(NKpdata_info->gpio_ip2, 0);
234
+	}
235
+		else if(i==81){
236
+		gpio_direction_output(NKpdata_info->gpio_ip3, 1);
237
+	}
238
+		else if(i==80){
239
+		gpio_direction_output(NKpdata_info->gpio_ip3, 0);
240
+	}
241
+	*/	
242
+		
243
+}
244
+
245
+EXPORT_SYMBOL_GPL(GPIO_IO_SET);
246
+
247
+#if 0
248
+static ssize_t en_4g_gpio_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
249
+{	
250
+		sscanf(buf, "%d", &module_enable);
251
+		printk("store en_4g_gpio ouput =%d\n",module_enable);
252
+
253
+	if (module_enable)
254
+		{
255
+			printk("store en_4g_gpio output High \n");
256
+			MODULE_SET(11);
257
+		}
258
+		else {
259
+			MODULE_SET(10);
260
+			printk("store en_4g_gpio output Low \n");
261
+			
262
+		}
263
+		return count;
264
+}
265
+
266
+static ssize_t en_4g_gpio_show(struct class *class,struct class_attribute *attr, char *buf)
267
+{
268
+	module_enable = gpio_get_value(NKpdata_info->en_4g_gpio);
269
+    return snprintf(buf,3,"%d\n",module_enable);
270
+}
271
+
272
+
273
+
274
+static ssize_t gpio_op0_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
275
+{	
276
+		sscanf(buf, "%d", &op0_enable);
277
+		printk("store_gpio_op0 ouput =%d\n",op0_enable);
278
+
279
+	if (op0_enable)
280
+		{
281
+			printk("store_gpio_op0 output High------konby\n");
282
+			GPIO_IO_SET(11);
283
+		}
284
+		else {
285
+			GPIO_IO_SET(10);
286
+			printk("tore_gpio_op0 output Low------konby\n");
287
+			
288
+		}
289
+		return count;
290
+}
291
+
292
+static ssize_t gpio_op0_show(struct class *class,struct class_attribute *attr, char *buf)
293
+{
294
+	op0_enable = gpio_get_value(NKpdata_info->gpio_op0);
295
+    return snprintf(buf,3,"%d\n",op0_enable);
296
+}
297
+
298
+static ssize_t gpio_op1_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
299
+{	
300
+		sscanf(buf, "%d", &op1_enable);
301
+		printk("store_gpio_op1 ouput =%d\n",op1_enable);
302
+
303
+	if (op1_enable)
304
+		{
305
+			printk("store_gpio_op1 output High------konby\n");
306
+			GPIO_IO_SET(21);
307
+		}
308
+		else {
309
+			GPIO_IO_SET(20);
310
+			printk("tore_gpio_op1 output Low------konby\n");
311
+			
312
+		}
313
+		return count;
314
+}
315
+
316
+static ssize_t gpio_op1_show(struct class *class,struct class_attribute *attr, char *buf)
317
+{
318
+	op1_enable = gpio_get_value(NKpdata_info->gpio_op1);
319
+    return snprintf(buf,3,"%d\n",op1_enable);
320
+}
321
+
322
+static ssize_t gpio_op2_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
323
+{	
324
+		sscanf(buf, "%d", &op2_enable);
325
+		printk("store_gpio_op2 ouput =%d\n",op2_enable);
326
+
327
+	if (op2_enable)
328
+		{
329
+			printk("store_gpio_op2 output High------konby\n");
330
+			GPIO_IO_SET(31);
331
+		}
332
+		else {
333
+			GPIO_IO_SET(30);
334
+			printk("tore_gpio_op2 output Low------konby\n");
335
+			
336
+		}
337
+		return count;
338
+}
339
+
340
+static ssize_t gpio_op2_show(struct class *class,struct class_attribute *attr, char *buf)
341
+{
342
+	op2_enable = gpio_get_value(NKpdata_info->gpio_op2);
343
+    return snprintf(buf,3,"%d\n",op2_enable);
344
+}
345
+
346
+static ssize_t gpio_op3_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
347
+{	
348
+		sscanf(buf, "%d", &op3_enable);
349
+		printk("store_gpio_op3 ouput =%d\n",op3_enable);
350
+
351
+	if (op3_enable)
352
+		{
353
+			printk("store_gpio_op3 output High------konby\n");
354
+			GPIO_IO_SET(41);
355
+		}
356
+		else {
357
+			GPIO_IO_SET(40);
358
+			printk("tore_gpio_op3 output Low------konby\n");
359
+			
360
+		}
361
+		return count;
362
+}
363
+
364
+static ssize_t gpio_op3_show(struct class *class,struct class_attribute *attr, char *buf)
365
+{
366
+	op3_enable = gpio_get_value(NKpdata_info->gpio_op3);
367
+    return snprintf(buf,3,"%d\n",op3_enable);
368
+}
369
+
370
+static ssize_t gpio_op4_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
371
+{	
372
+		sscanf(buf, "%d", &op4_enable);
373
+		printk("store_gpio_op3 ouput =%d\n",op4_enable);
374
+
375
+	if (op4_enable)
376
+		{
377
+			printk("store_gpio_op4 output High------konby\n");
378
+			GPIO_IO_SET(51);
379
+		}
380
+		else {
381
+			GPIO_IO_SET(50);
382
+			printk("tore_gpio_op4 output Low------konby\n");
383
+			
384
+		}
385
+		return count;
386
+}
387
+
388
+static ssize_t gpio_op4_show(struct class *class,struct class_attribute *attr, char *buf)
389
+{
390
+	op4_enable = gpio_get_value(NKpdata_info->gpio_op4);
391
+    return snprintf(buf,3,"%d\n",op4_enable);
392
+}
393
+
394
+static ssize_t gpio_op5_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
395
+{	
396
+		sscanf(buf, "%d", &op5_enable);
397
+		printk("store_gpio_op5 ouput =%d\n",op5_enable);
398
+
399
+	if (op5_enable)
400
+		{
401
+			printk("store_gpio_op5 output High------konby\n");
402
+			GPIO_IO_SET(61);
403
+		}
404
+		else {
405
+			GPIO_IO_SET(60);
406
+			printk("tore_gpio_op5 output Low------konby\n");
407
+			
408
+		}
409
+		return count;
410
+}
411
+
412
+static ssize_t gpio_op5_show(struct class *class,struct class_attribute *attr, char *buf)
413
+{
414
+	op5_enable = gpio_get_value(NKpdata_info->gpio_op5);
415
+    return snprintf(buf,3,"%d\n",op5_enable);
416
+}
417
+
418
+
419
+
420
+
421
+static ssize_t gpio_ip0_show(struct class *class,struct class_attribute *attr, char *buf)
422
+{
423
+	ip0_enable = gpio_get_value(NKpdata_info->gpio_ip0);
424
+    return snprintf(buf,3,"%d\n",ip0_enable);
425
+
426
+}
427
+
428
+static ssize_t gpio_ip1_show(struct class *class,struct class_attribute *attr, char *buf)
429
+{
430
+	ip1_enable = gpio_get_value(NKpdata_info->gpio_ip1);
431
+    return snprintf(buf,3,"%d\n",ip1_enable);
432
+}
433
+
434
+static ssize_t gpio_ip2_show(struct class *class,struct class_attribute *attr, char *buf)
435
+{
436
+	ip2_enable = gpio_get_value(NKpdata_info->gpio_ip2);
437
+    return snprintf(buf,3,"%d\n",ip2_enable);
438
+}
439
+
440
+static ssize_t gpio_ip3_show(struct class *class,struct class_attribute *attr, char *buf)
441
+{
442
+	ip3_enable = gpio_get_value(NKpdata_info->gpio_ip3);
443
+    return snprintf(buf,3,"%d\n",ip3_enable);
444
+}
445
+
446
+static ssize_t gpio_ip4_show(struct class *class,struct class_attribute *attr, char *buf)
447
+{
448
+	ip4_enable = gpio_get_value(NKpdata_info->gpio_ip4);
449
+    return snprintf(buf,3,"%d\n",ip4_enable);
450
+}
451
+
452
+static ssize_t gpio_ip5_show(struct class *class,struct class_attribute *attr, char *buf)
453
+{
454
+	ip5_enable = gpio_get_value(NKpdata_info->gpio_ip5);
455
+    return snprintf(buf,3,"%d\n",ip5_enable);
456
+}
457
+#endif
458
+
459
+
460
+#if 0
461
+static ssize_t gpio_ip0_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
462
+{	
463
+		sscanf(buf, "%d", &ip0_enable);
464
+		printk("store_gpio_op3 ouput =%d\n",ip0_enable);
465
+
466
+	if (ip0_enable)
467
+		{
468
+			printk("store_gpio_op3 output High------konby\n");
469
+			GPIO_IO_SET(51);
470
+		}
471
+		else {
472
+			GPIO_IO_SET(50);
473
+			printk("tore_gpio_op3 output Low------konby\n");
474
+			
475
+		}
476
+		return count;
477
+}
478
+
479
+static ssize_t gpio_ip1_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
480
+{	
481
+		sscanf(buf, "%d", &ip1_enable);
482
+		printk("store_gpio_op3 ouput =%d\n",ip1_enable);
483
+
484
+	if (ip1_enable)
485
+		{
486
+			printk("store_gpio_op3 output High------konby\n");
487
+			GPIO_IO_SET(61);
488
+		}
489
+		else {
490
+			GPIO_IO_SET(60);
491
+			printk("tore_gpio_op3 output Low------konby\n");
492
+			
493
+		}
494
+		return count;
495
+}
496
+
497
+static ssize_t gpio_ip2_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
498
+{	
499
+		sscanf(buf, "%d", &ip2_enable);
500
+		printk("store_gpio_op3 ouput =%d\n",ip2_enable);
501
+
502
+	if (ip2_enable)
503
+		{
504
+			printk("store_gpio_op3 output High------konby\n");
505
+			GPIO_IO_SET(71);
506
+		}
507
+		else {
508
+			GPIO_IO_SET(70);
509
+			printk("tore_gpio_op3 output Low------konby\n");
510
+			
511
+		}
512
+		return count;
513
+}
514
+
515
+static ssize_t gpio_ip3_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
516
+{	
517
+		sscanf(buf, "%d", &ip3_enable);
518
+		printk("store_gpio_op3 ouput =%d\n",ip3_enable);
519
+
520
+	if (ip3_enable)
521
+		{
522
+			printk("store_gpio_op3 output High------konby\n");
523
+			GPIO_IO_SET(81);
524
+		}
525
+		else {
526
+			GPIO_IO_SET(80);
527
+			printk("tore_gpio_op3 output Low------konby\n");
528
+			
529
+		}
530
+		return count;
531
+}
532
+
533
+#endif
534
+
535
+
536
+
537
+#if 0
538
+
539
+//static CLASS_ATTR(en_4g_gpio, 0666, module_show, module_store);
540
+static CLASS_ATTR_RW(en_4g_gpio);
541
+
542
+
543
+//static CLASS_ATTR(gpio_op0, 0666, gpio_op0_show, gpio_op0_store);
544
+static CLASS_ATTR_RW(gpio_op0);
545
+//static CLASS_ATTR(gpio_op1, 0666, gpio_op1_show, gpio_op1_store);
546
+static CLASS_ATTR_RW(gpio_op1);
547
+//static CLASS_ATTR(gpio_op2, 0666, gpio_op2_show, gpio_op2_store);
548
+static CLASS_ATTR_RW(gpio_op2);
549
+//static CLASS_ATTR(gpio_op3, 0666, gpio_op3_show, gpio_op3_store);
550
+static CLASS_ATTR_RW(gpio_op3);
551
+//static CLASS_ATTR(gpio_op4, 0666, gpio_op4_show, gpio_op4_store);
552
+static CLASS_ATTR_RW(gpio_op4);
553
+//static CLASS_ATTR(gpio_op5, 0666, gpio_op5_show, gpio_op5_store);
554
+static CLASS_ATTR_RW(gpio_op5);
555
+
556
+
557
+
558
+//static CLASS_ATTR(gpio_ip0, 0666, gpio_ip0_show, NULL);
559
+static CLASS_ATTR_RO(gpio_ip0);
560
+//static CLASS_ATTR(gpio_ip1, 0666, gpio_ip1_show, NULL);
561
+static CLASS_ATTR_RO(gpio_ip1);
562
+//static CLASS_ATTR(gpio_ip2, 0666, gpio_ip2_show, NULL);
563
+static CLASS_ATTR_RO(gpio_ip2);
564
+//static CLASS_ATTR(gpio_ip3, 0666, gpio_ip3_show, NULL);
565
+static CLASS_ATTR_RO(gpio_ip3);
566
+//static CLASS_ATTR(gpio_ip4, 0666, gpio_ip4_show, NULL);
567
+static CLASS_ATTR_RO(gpio_ip4);
568
+//static CLASS_ATTR(gpio_ip5, 0666, gpio_ip5_show, NULL);
569
+static CLASS_ATTR_RO(gpio_ip5);
570
+
571
+
572
+#endif
573
+
574
+
575
+
576
+
577
+//ben
578
+static int nk_io_control_probe(struct platform_device *pdev)
579
+{
580
+	struct device_node *node = pdev->dev.of_node;
581
+	struct nk_io_pdata *pdata;	
582
+	int gpio0, gpio1, gpio2, gpio3, reset_pin, ch342_reset;
583
+	int ret;
584
+        int lvds_index;
585
+        int i=0;
586
+        static int lvds_gpio[4] ;
587
+
588
+	enum of_gpio_flags flags;
589
+	
590
+	printk(" #######nk_io_control_probe####### \n");
591
+
592
+	pdata = kzalloc(sizeof(struct nk_io_pdata), GFP_KERNEL);
593
+	if (pdata == NULL) {
594
+		printk("%s failed to allocate driver data\n",__FUNCTION__);
595
+		return -ENOMEM;
596
+	}
597
+	memset(pdata,0,sizeof(struct nk_io_pdata));
598
+	
599
+	//vcc_5v_io
600
+#if 0
601
+	ret = of_get_named_gpio_flags(node, "vcc_5v_io", 0, &flags);
602
+	if (ret < 0) {
603
+		printk("%s() Can not read property vcc_5v_io\n", __FUNCTION__);
604
+		goto err;
605
+	} else {
606
+		pdata->vcc_5v_io = ret;
607
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc_5v_io, "vcc_5v_io");
608
+		if(ret < 0){
609
+			printk("%s() devm_gpio_request vcc_5v_io request ERROR\n", __FUNCTION__);
610
+			goto err;
611
+		}
612
+
613
+		ret = gpio_direction_output(pdata->vcc_5v_io,1); 
614
+		if(ret < 0){
615
+			printk("%s() gpio_direction_input vcc_5v_io set ERROR\n", __FUNCTION__);
616
+			goto err;
617
+		}
618
+	}
619
+#endif
620
+	//tp_enable
621
+	ret = of_get_named_gpio_flags(node, "tp_enable", 0, &flags);
622
+	if (ret < 0) {
623
+		printk("%s() Can not read property tp_enable\n", __FUNCTION__);
624
+		goto err;
625
+	} else {
626
+		pdata->tp_enable = ret;
627
+		ret = devm_gpio_request(&pdev->dev, pdata->tp_enable, "tp_enable");
628
+		if(ret < 0){
629
+			printk("%s() devm_gpio_request tp_enable request ERROR\n", __FUNCTION__);
630
+			goto err;
631
+		}
632
+
633
+		ret = gpio_direction_output(pdata->tp_enable,1); 
634
+		if(ret < 0){
635
+			printk("%s() gpio_direction_output tp_enable set ERROR\n", __FUNCTION__);
636
+			goto err;
637
+		}
638
+	}
639
+
640
+	//vcc_12v_io
641
+	ret = of_get_named_gpio_flags(node, "vcc_12v_io", 0, &flags);
642
+	if (ret < 0) {
643
+		printk("%s() Can not read property vcc_12v_io\n", __FUNCTION__);
644
+		goto err;
645
+	} else {
646
+		pdata->vcc_12v_io = ret;
647
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc_12v_io, "vcc_12v_io");
648
+		if(ret < 0){
649
+			printk("%s() devm_gpio_request vcc_12v_io request ERROR\n", __FUNCTION__);
650
+			goto err;
651
+		}
652
+
653
+		ret = gpio_direction_output(pdata->vcc_12v_io,1); 
654
+		if(ret < 0){
655
+			printk("%s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
656
+			goto err;
657
+		}
658
+	}
659
+	
660
+	//hub_hos2_5V_gpio
661
+	ret = of_get_named_gpio_flags(node, "hub_host2_5v_gpio", 0, &flags);
662
+	if (ret < 0) {
663
+		printk("%s() Can not read property hub_host2_5v_gpio\n", __FUNCTION__);
664
+		goto err;
665
+	} else {
666
+		pdata->hub_host2_5v_gpio = ret;
667
+		gpio_free(ret);
668
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5v_gpio, "hub_host2_5v_gpio");
669
+		if(ret < 0){
670
+			printk("%s() devm_gpio_request hub_host2_5v_gpio request ERROR\n", __FUNCTION__);
671
+			goto err;
672
+		}
673
+
674
+		ret = gpio_direction_output(pdata->hub_host2_5v_gpio,1); 
675
+		if(ret < 0){
676
+			printk("%s() gpio_direction_input hub_host2_5v_gpio set ERROR\n", __FUNCTION__);
677
+			goto err;
678
+		}
679
+	}
680
+
681
+	//hub_host2_5V_rest_gpio
682
+	ret = of_get_named_gpio_flags(node, "hub_host2_5V_rest_gpio", 0, &flags);
683
+	if (ret < 0) {
684
+		printk("%s() Can not read property hub_host2_5V_rest_gpio\n", __FUNCTION__);
685
+		goto err;
686
+	} else {
687
+		pdata->hub_host2_5V_rest_gpio = ret;
688
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5V_rest_gpio, "hub_host2_5V_rest_gpio");
689
+		if(ret < 0){
690
+			printk("%s() devm_gpio_request hub_host2_5V_rest_gpio request ERROR\n", __FUNCTION__);
691
+			goto err;
692
+		}
693
+
694
+		ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,0); 
695
+		if(ret < 0){
696
+			printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
697
+			goto err;
698
+		}
699
+		msleep(800);
700
+		ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,1); 
701
+		if(ret < 0){
702
+			printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
703
+			goto err;
704
+		}
705
+	}
706
+
707
+	//hub_hos3_5V_gpio
708
+	ret = of_get_named_gpio_flags(node, "hub_host3_5v_gpio", 0, &flags);
709
+	if (ret < 0) {
710
+		printk("%s() Can not read property hub_host3_5v_gpio\n", __FUNCTION__);
711
+		goto err;
712
+	} else {
713
+		pdata->hub_host3_5v_gpio = ret;
714
+		gpio_free(ret);
715
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5v_gpio, "hub_host3_5v_gpio");
716
+		if(ret < 0){
717
+			printk("%s() devm_gpio_request hub_host3_5v_gpio request ERROR\n", __FUNCTION__);
718
+			goto err;
719
+		}
720
+
721
+		ret = gpio_direction_output(pdata->hub_host3_5v_gpio,1); 
722
+		if(ret < 0){
723
+			printk("%s() gpio_direction_input hub_host3_5v_gpio set ERROR\n", __FUNCTION__);
724
+			goto err;
725
+		}
726
+	}
727
+
728
+	//hub_host3_5V_rest_gpio
729
+	ret = of_get_named_gpio_flags(node, "hub_host3_5V_rest_gpio", 0, &flags);
730
+	if (ret < 0) {
731
+		printk("%s() Can not read property hub_host3_5V_rest_gpio\n", __FUNCTION__);
732
+		goto err;
733
+	} else {
734
+		pdata->hub_host3_5V_rest_gpio = ret;
735
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5V_rest_gpio, "hub_host3_5V_rest_gpio");
736
+		if(ret < 0){
737
+			printk("%s() devm_gpio_request hub_host3_5V_rest_gpio request ERROR\n", __FUNCTION__);
738
+			goto err;
739
+		}
740
+
741
+		ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,0); 
742
+		if(ret < 0){
743
+			printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
744
+			goto err;
745
+		}
746
+		msleep(800);
747
+		ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,1); 
748
+		if(ret < 0){
749
+			printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
750
+			goto err;
751
+		}
752
+	}
753
+
754
+	//wake_4g_gpio
755
+	   ret = of_get_named_gpio_flags(node, "wake_4g_gpio", 0, &flags);
756
+	   if (ret < 0) {
757
+	           printk("%s() Can not read property wake_4g_gpio\n", __FUNCTION__);
758
+	   } else {
759
+	           pdata->wake_4g_gpio = ret;
760
+
761
+	           ret = devm_gpio_request(&pdev->dev, pdata->wake_4g_gpio, "wake_4g_gpio");
762
+	           if(ret < 0){
763
+	                   printk("%s() devm_gpio_request wake_4g_gpio request ERROR\n", __FUNCTION__);
764
+	           }
765
+	           ret = gpio_direction_output(pdata->wake_4g_gpio,0);
766
+	           if(ret < 0){
767
+	                   printk("%s() gpio_direction_input wake_4g_gpio set ERROR\n", __FUNCTION__);
768
+	           }
769
+	   }
770
+
771
+#if 0
772
+	   //reset_4g_gpio
773
+	   ret = of_get_named_gpio_flags(node, "reset_4g_gpio", 0, &flags);
774
+	   if (ret < 0) {
775
+	           printk("%s() Can not read property reset_4g_gpio\n", __FUNCTION__);
776
+	   } else {
777
+	           pdata->reset_4g_gpio = ret;
778
+
779
+	           ret = devm_gpio_request(&pdev->dev, pdata->reset_4g_gpio, "reset_4g_gpio");
780
+	           if(ret < 0){
781
+	                   printk("%s() devm_gpio_request reset_4g_gpio request ERROR\n", __FUNCTION__);
782
+	           }
783
+	           ret = gpio_direction_output(pdata->reset_4g_gpio,0);
784
+	           if(ret < 0){
785
+	                   printk("%s() gpio_direction_input reset_4g_gpio set ERROR\n", __FUNCTION__);
786
+	           }
787
+	   }
788
+
789
+	   //en_4g_gpio
790
+	   ret = of_get_named_gpio_flags(node, "en_4g_gpio", 0, &flags);
791
+	   if (ret < 0) {
792
+	           printk("%s() Can not read property en_4g_gpio\n", __FUNCTION__);
793
+	   } else {
794
+	           pdata->en_4g_gpio = ret;
795
+
796
+	           ret = devm_gpio_request(&pdev->dev, pdata->en_4g_gpio, "en_4g_gpio");
797
+	           if(ret < 0){
798
+	                   printk("%s() devm_gpio_request en_4g_gpio request ERROR\n", __FUNCTION__);
799
+	           }
800
+	           ret = gpio_direction_output(pdata->en_4g_gpio,1);
801
+	           if(ret < 0){
802
+	                   printk("%s() gpio_direction_input en_4g_gpio set ERROR\n", __FUNCTION__);
803
+	           }
804
+	   }
805
+
806
+
807
+	   //air_mode_4g_gpio
808
+	   ret = of_get_named_gpio_flags(node, "air_mode_4g_gpio", 0, &flags);
809
+	   if (ret < 0) {
810
+	           printk("%s() Can not read property air_mode_4g_gpio\n", __FUNCTION__);
811
+	   } else {
812
+	           pdata->air_mode_4g_gpio = ret;
813
+
814
+	           ret = devm_gpio_request(&pdev->dev, pdata->air_mode_4g_gpio, "air_mode_4g_gpio");
815
+	           if(ret < 0){
816
+	                   printk("%s() devm_gpio_request air_mode_4g_gpio request ERROR\n", __FUNCTION__);
817
+	           }
818
+	           ret = gpio_direction_output(pdata->air_mode_4g_gpio,0);
819
+	           if(ret < 0){
820
+	                   printk("%s() gpio_direction_input air_mode_4g_gpio set ERROR\n", __FUNCTION__);
821
+	           }
822
+	   }
823
+
824
+#endif	  
825
+/*
826
+	//edp_power_supply_gpio;
827
+	ret = of_get_named_gpio_flags(node, "edp_power_supply_gpio", 0, &flags);
828
+	if (ret < 0) {
829
+		printk("%s() Can not read property edp_power_supply_gpio\n", __FUNCTION__);
830
+	} else {
831
+		pdata->edp_power_supply_gpio = ret;
832
+
833
+		ret = devm_gpio_request(&pdev->dev, pdata->edp_power_supply_gpio, "edp_power_supply_gpio");
834
+		if(ret < 0){
835
+			printk("%s() devm_gpio_request edp_power_supply_gpio request ERROR\n", __FUNCTION__);
836
+		}
837
+		
838
+		ret = gpio_direction_output(pdata->edp_power_supply_gpio,1);
839
+		if(ret < 0){
840
+			printk("%s() gpio_direction_input edp_power_supply_gpio set ERROR\n", __FUNCTION__);
841
+		}
842
+	}
843
+*/	
844
+   //edp_enable-gpio;
845
+#if 0
846
+	ret = of_get_named_gpio_flags(node, "edp_enable_gpio", 0, &flags);
847
+	if (ret < 0) {
848
+		printk("%s() Can not read property edp_enable_gpio\n", __FUNCTION__);
849
+	} else {
850
+		pdata->edp_enable_gpio = ret;
851
+
852
+		ret = devm_gpio_request(&pdev->dev, pdata->edp_enable_gpio, "edp_enable_gpio");
853
+		if(ret < 0){
854
+			printk("%s() devm_gpio_request edp_enable_gpio request ERROR\n", __FUNCTION__);
855
+		}
856
+		
857
+		ret = gpio_direction_output(pdata->edp_enable_gpio,1);
858
+		if(ret < 0){
859
+			printk("%s() gpio_direction_input edp_enable_gpio set ERROR\n", __FUNCTION__);
860
+		}
861
+	} 
862
+  
863
+#endif
864
+   //ch342_enable-gpio;
865
+	ret = of_get_named_gpio_flags(node, "ch342_power", 0, &flags);
866
+	if (ret < 0) {
867
+		printk("%s() Can not read property ch342_gpio\n", __FUNCTION__);
868
+	} else {
869
+		pdata->ch342_power = ret;
870
+
871
+		ret = devm_gpio_request(&pdev->dev, pdata->ch342_power, "ch342_power");
872
+		if(ret < 0){
873
+			printk("%s() devm_gpio_request ch342_power request ERROR\n", __FUNCTION__);
874
+		}
875
+		
876
+		ret = gpio_direction_output(pdata->ch342_power,1);
877
+		if(ret < 0){
878
+			printk("%s() gpio_direction_input ch342_power set ERROR\n", __FUNCTION__);
879
+		}
880
+	}   
881
+
882
+
883
+        //edp_set_pixel-s
884
+         ret = of_get_named_gpio_flags(node, "edp_reset", 0, &flags);
885
+    if (ret < 0) {
886
+        printk("%s() Can not read property edp_reset\n", __FUNCTION__);
887
+        goto err;
888
+    }
889
+
890
+    reset_pin = ret;
891
+
892
+	   // ch342_reset
893
+	   ret = of_get_named_gpio_flags(node, "ch342_reset", 0, &flags);
894
+	   if (ret < 0) {
895
+	           printk("%s() Can not read property ch342_reset\n", __FUNCTION__);
896
+	   } else {
897
+	           pdata->reset_ch342_gpio = ret;
898
+
899
+	           ret = devm_gpio_request(&pdev->dev, pdata->reset_ch342_gpio, "ch342_reset");
900
+	           if(ret < 0){
901
+	                   printk("%s() devm_gpio_request ch342_reset request ERROR\n", __FUNCTION__);
902
+	           }
903
+	           ret = gpio_direction_output(pdata->reset_ch342_gpio,1);
904
+	           if(ret < 0){
905
+	                   printk("%s() gpio_direction_output ch342_reset set ERROR\n", __FUNCTION__);
906
+	           }
907
+//    		 ch342_reset = ret;
908
+	   }
909
+
910
+
911
+// enable lvds
912
+     ret = of_get_named_gpio_flags(node, "edp_gpio0", 0, &flags);
913
+    if (ret < 0) {
914
+        printk("%s() Can not read property edp_gpio0\n", __FUNCTION__);
915
+        goto err;
916
+    }
917
+	 gpio0 = ret;
918
+
919
+
920
+
921
+    ret = of_get_named_gpio_flags(node, "edp_gpio1", 0, &flags);
922
+    if (ret < 0) {
923
+        printk("%s() Can not read property edp_gpio1\n", __FUNCTION__);
924
+        goto err;
925
+    }
926
+
927
+        gpio1 = ret;
928
+
929
+    ret = of_get_named_gpio_flags(node, "edp_gpio2", 0, &flags);
930
+    if (ret < 0) {
931
+        printk("%s() Can not read property edp_gpio2\n", __FUNCTION__);
932
+        goto err;
933
+    }
934
+
935
+    gpio2 = ret;
936
+
937
+    ret = of_get_named_gpio_flags(node, "edp_gpio3", 0, &flags);
938
+    if (ret < 0) {
939
+        printk("%s() Can not read property edp_gpio3\n", __FUNCTION__);
940
+        goto err;
941
+    }
942
+
943
+    gpio3 = ret;
944
+
945
+
946
+	 ret = devm_gpio_request(&pdev->dev, reset_pin, "edp_reset");
947
+    if(ret < 0){
948
+        printk("%s() devm_gpio_request edp_reset request ERROR\n", __FUNCTION__);
949
+        goto err;
950
+    }
951
+
952
+
953
+    ret = devm_gpio_request(&pdev->dev, gpio0, "edp_gpio0");
954
+    if(ret < 0){
955
+        printk("%s() devm_gpio_request edp_gpio0 request ERROR\n", __FUNCTION__);
956
+        goto err;
957
+    }
958
+
959
+    ret = devm_gpio_request(&pdev->dev, gpio1, "edp_gpio1");
960
+    if(ret < 0){
961
+        printk("%s() devm_gpio_request edp_gpio1 request ERROR\n", __FUNCTION__);
962
+        goto err;
963
+    }
964
+
965
+    ret = devm_gpio_request(&pdev->dev, gpio2, "edp_gpio2");
966
+    if(ret < 0){
967
+        printk("%s() devm_gpio_request edp_gpio2 request ERROR\n", __FUNCTION__);
968
+        goto err;
969
+    }
970
+
971
+    ret = devm_gpio_request(&pdev->dev, gpio3, "edp_gpio3");
972
+    if(ret < 0){
973
+        printk("%s() devm_gpio_request edp_gpio3 request ERROR\n", __FUNCTION__);
974
+        goto err;
975
+    }
976
+	
977
+	   ret = of_property_read_u32(node, "nodka_lvds", &lvds_index);
978
+        if (ret < 0){
979
+                printk("%s() Can not read property nodka_lvds\n", __FUNCTION__);
980
+        }
981
+
982
+        printk("nodka_lvds_index = %d\n",lvds_index);
983
+
984
+        while ( i < 4 ){
985
+                if ( lvds_index > 0)
986
+                        lvds_gpio[i] = lvds_index%2;
987
+                else
988
+                        lvds_gpio[i] = 0;
989
+                printk("lvds_gpio[%d]=%d\n",i,lvds_gpio[i]);
990
+                lvds_index = lvds_index/2;
991
+                i++;
992
+        }
993
+
994
+    gpio_direction_output(reset_pin, 0);
995
+    usleep_range(80000, 100000);
996
+    gpio_direction_output(reset_pin, 1);
997
+    usleep_range(80000, 100000);
998
+
999
+//    gpio_direction_output(ch342_reset, 0);
1000
+//   usleep_range(80000, 100000);
1001
+//    gpio_direction_output(ch342_reset, 1);
1002
+//    usleep_range(80000, 100000);
1003
+
1004
+/*
1005
+      //gpio_op0
1006
+         ret = of_get_named_gpio_flags(node, "gpio_op0", 0, &flags);
1007
+    if (ret < 0) {
1008
+        printk("%s() Can not read property gpio_op0\n", __FUNCTION__);
1009
+        goto err;
1010
+    }
1011
+
1012
+    pdata->gpio_op0 = ret;
1013
+
1014
+         ret = devm_gpio_request(&pdev->dev, pdata->gpio_op0, "gpio_op0");
1015
+    if(ret < 0){
1016
+        printk("%s() devm_gpio_request gpio_op0 request ERROR\n", __FUNCTION__);
1017
+        goto err;
1018
+    }
1019
+
1020
+	gpio_direction_output(pdata->gpio_op0, 1);
1021
+*/
1022
+	
1023
+	gpio_direction_output(gpio0, lvds_gpio[0]);
1024
+	gpio_direction_output(gpio1, lvds_gpio[1]);
1025
+	gpio_direction_output(gpio2, lvds_gpio[2]);
1026
+	gpio_direction_output(gpio3, lvds_gpio[3]);
1027
+	
1028
+	printk(" #######nk_io_control_probe end####### \n");
1029
+	return 0;
1030
+	
1031
+err:
1032
+	kfree(pdata);
1033
+	return ret;	
1034
+}	
1035
+
1036
+//6 in 6 out-e
1037
+#if 0 
1038
+static int nk_io_control_probe1(struct platform_device *pdev)
1039
+{
1040
+	struct device_node *node = pdev->dev.of_node;
1041
+	struct nk_io_pdata *pdata;
1042
+	int ret;
1043
+	int gpio0, gpio1, gpio2, gpio3, reset_pin;
1044
+	enum of_gpio_flags flags;
1045
+	printk(" #######nk_io_control_probe####### \n");
1046
+	//enable = 0 ;
1047
+
1048
+
1049
+//	ret = gpio_direction_output(74,0); 
1050
+//	if(ret < 0){
1051
+//		printk("fuwei %s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
1052
+//		goto err;
1053
+//	}
1054
+
1055
+
1056
+	pdata = kzalloc(sizeof(struct nk_io_pdata), GFP_KERNEL);
1057
+	if (pdata == NULL) {
1058
+		printk("%s failed to allocate driver data\n",__FUNCTION__);
1059
+		return -ENOMEM;
1060
+	}
1061
+	memset(pdata,0,sizeof(struct nk_io_pdata));
1062
+
1063
+
1064
+	//edp_set_pixel-s
1065
+	 ret = of_get_named_gpio_flags(node, "edp_reset", 0, &flags);
1066
+    if (ret < 0) {
1067
+        printk("%s() Can not read property edp_reset\n", __FUNCTION__);
1068
+        goto err;
1069
+    }
1070
+
1071
+    reset_pin = ret;
1072
+
1073
+	ret = of_get_named_gpio_flags(node, "edp_gpio0", 0, &flags);
1074
+    if (ret < 0) {
1075
+        printk("%s() Can not read property edp_gpio0\n", __FUNCTION__);
1076
+        goto err;
1077
+    } 
1078
+
1079
+    gpio0 = ret;
1080
+
1081
+    ret = of_get_named_gpio_flags(node, "edp_gpio1", 0, &flags);
1082
+    if (ret < 0) {
1083
+        printk("%s() Can not read property edp_gpio1\n", __FUNCTION__);
1084
+        goto err;
1085
+    }
1086
+
1087
+	gpio1 = ret;
1088
+
1089
+    ret = of_get_named_gpio_flags(node, "edp_gpio2", 0, &flags);
1090
+    if (ret < 0) {
1091
+        printk("%s() Can not read property edp_gpio2\n", __FUNCTION__);
1092
+        goto err;
1093
+    }
1094
+
1095
+    gpio2 = ret;
1096
+
1097
+    ret = of_get_named_gpio_flags(node, "edp_gpio3", 0, &flags);
1098
+    if (ret < 0) {
1099
+        printk("%s() Can not read property edp_gpio3\n", __FUNCTION__);
1100
+        goto err;
1101
+    }
1102
+
1103
+    gpio3 = ret;
1104
+
1105
+    ret = devm_gpio_request(&pdev->dev, reset_pin, "edp_reset");
1106
+    if(ret < 0){
1107
+        printk("%s() devm_gpio_request edp_reset request ERROR\n", __FUNCTION__);
1108
+        goto err;
1109
+    }
1110
+
1111
+    ret = devm_gpio_request(&pdev->dev, gpio0, "edp_gpio0");
1112
+    if(ret < 0){
1113
+        printk("%s() devm_gpio_request edp_gpio0 request ERROR\n", __FUNCTION__);
1114
+        goto err;
1115
+    }
1116
+
1117
+    ret = devm_gpio_request(&pdev->dev, gpio1, "edp_gpio1");
1118
+    if(ret < 0){
1119
+        printk("%s() devm_gpio_request edp_gpio1 request ERROR\n", __FUNCTION__);
1120
+        goto err;
1121
+    }
1122
+
1123
+    ret = devm_gpio_request(&pdev->dev, gpio2, "edp_gpio2");
1124
+    if(ret < 0){
1125
+        printk("%s() devm_gpio_request edp_gpio2 request ERROR\n", __FUNCTION__);
1126
+        goto err;
1127
+    }
1128
+
1129
+    ret = devm_gpio_request(&pdev->dev, gpio3, "edp_gpio3");
1130
+    if(ret < 0){
1131
+        printk("%s() devm_gpio_request edp_gpio3 request ERROR\n", __FUNCTION__);
1132
+        goto err;
1133
+    }
1134
+
1135
+    gpio_direction_output(reset_pin, 0); 
1136
+    usleep_range(80000, 100000);
1137
+    gpio_direction_output(reset_pin, 1); 
1138
+    usleep_range(80000, 100000);
1139
+
1140
+    gpio_direction_output(gpio0, 0); 
1141
+    gpio_direction_output(gpio1, 1); 
1142
+    gpio_direction_output(gpio2, 1); 
1143
+    gpio_direction_output(gpio3, 0); 
1144
+	printk("edp set pixels success.\r\n");
1145
+
1146
+	//edp_set_pixel-e
1147
+
1148
+	//6 in 6 out-s	
1149
+	//gpio_op0
1150
+	 ret = of_get_named_gpio_flags(node, "gpio_op0", 0, &flags);
1151
+    if (ret < 0) {
1152
+        printk("%s() Can not read property gpio_op0\n", __FUNCTION__);
1153
+        goto err;
1154
+    }
1155
+
1156
+    pdata->gpio_op0 = ret;
1157
+
1158
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_op0, "gpio_op0");
1159
+    if(ret < 0){
1160
+        printk("%s() devm_gpio_request gpio_op0 request ERROR\n", __FUNCTION__);
1161
+        goto err;
1162
+    }
1163
+
1164
+
1165
+	//gpio_op1
1166
+	 ret = of_get_named_gpio_flags(node, "gpio_op1", 0, &flags);
1167
+    if (ret < 0) {
1168
+        printk("%s() Can not read property gpio_op1\n", __FUNCTION__);
1169
+        goto err;
1170
+    }
1171
+
1172
+    pdata->gpio_op1 = ret;
1173
+
1174
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_op1, "gpio_op1");
1175
+    if(ret < 0){
1176
+        printk("%s() devm_gpio_request gpio_op1 request ERROR\n", __FUNCTION__);
1177
+        goto err;
1178
+    }
1179
+
1180
+
1181
+	//gpio_op2
1182
+	 ret = of_get_named_gpio_flags(node, "gpio_op2", 0, &flags);
1183
+    if (ret < 0) {
1184
+        printk("%s() Can not read property gpio_op2\n", __FUNCTION__);
1185
+        goto err;
1186
+    }
1187
+
1188
+    pdata->gpio_op2 = ret;
1189
+
1190
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_op2, "gpio_op2");
1191
+    if(ret < 0){
1192
+        printk("%s() devm_gpio_request gpio_op2 request ERROR\n", __FUNCTION__);
1193
+        goto err;
1194
+    }
1195
+
1196
+
1197
+
1198
+	//gpio_op3
1199
+	 ret = of_get_named_gpio_flags(node, "gpio_op3", 0, &flags);
1200
+    if (ret < 0) {
1201
+        printk("%s() Can not read property gpio_op3\n", __FUNCTION__);
1202
+        goto err;
1203
+    }
1204
+
1205
+    pdata->gpio_op3 = ret;
1206
+
1207
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_op3, "gpio_op3");
1208
+    if(ret < 0){
1209
+        printk("%s() devm_gpio_request gpio_op3 request ERROR\n", __FUNCTION__);
1210
+        goto err;
1211
+    }
1212
+
1213
+	//gpio_op4
1214
+	 ret = of_get_named_gpio_flags(node, "gpio_op4", 0, &flags);
1215
+    if (ret < 0) {
1216
+        printk("%s() Can not read property gpio_op4\n", __FUNCTION__);
1217
+        goto err;
1218
+    }
1219
+
1220
+    pdata->gpio_op4 = ret;
1221
+
1222
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_op4, "gpio_op4");
1223
+    if(ret < 0){
1224
+        printk("%s() devm_gpio_request gpio_op4 request ERROR\n", __FUNCTION__);
1225
+        goto err;
1226
+    }
1227
+
1228
+	//gpio_op5
1229
+	 ret = of_get_named_gpio_flags(node, "gpio_op5", 0, &flags);
1230
+    if (ret < 0) {
1231
+        printk("%s() Can not read property gpio_op5\n", __FUNCTION__);
1232
+        goto err;
1233
+    }
1234
+
1235
+    pdata->gpio_op5 = ret;
1236
+
1237
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_op5, "gpio_op5");
1238
+    if(ret < 0){
1239
+        printk("%s() devm_gpio_request gpio_op5 request ERROR\n", __FUNCTION__);
1240
+        goto err;
1241
+    }
1242
+	
1243
+
1244
+	//d4 low
1245
+	gpio_direction_output(pdata->gpio_op0, 1);
1246
+	gpio_direction_output(pdata->gpio_op1, 1);
1247
+	gpio_direction_output(pdata->gpio_op2, 1);
1248
+	gpio_direction_output(pdata->gpio_op3, 1);
1249
+	gpio_direction_output(pdata->gpio_op4, 1);
1250
+	gpio_direction_output(pdata->gpio_op5, 1);
1251
+
1252
+	
1253
+
1254
+
1255
+
1256
+	//gpio_ip0
1257
+	 ret = of_get_named_gpio_flags(node, "gpio_ip0", 0, &flags);
1258
+    if (ret < 0) {
1259
+        printk("%s() Can not read property gpio_ip0\n", __FUNCTION__);
1260
+        goto err;
1261
+    }
1262
+
1263
+    pdata->gpio_ip0 = ret;
1264
+
1265
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip0, "gpio_ip0");
1266
+    if(ret < 0){
1267
+        printk("%s() devm_gpio_request gpio_ip0 request ERROR\n", __FUNCTION__);
1268
+        goto err;
1269
+    }
1270
+
1271
+	//gpio_ip1
1272
+	 ret = of_get_named_gpio_flags(node, "gpio_ip1", 0, &flags);
1273
+    if (ret < 0) {
1274
+        printk("%s() Can not read property gpio_ip1\n", __FUNCTION__);
1275
+        goto err;
1276
+    }
1277
+
1278
+    pdata->gpio_ip1 = ret;
1279
+
1280
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip1, "gpio_ip1");
1281
+    if(ret < 0){
1282
+        printk("%s() devm_gpio_request gpio_ip1 request ERROR\n", __FUNCTION__);
1283
+        goto err;
1284
+    }
1285
+
1286
+	//gpio_ip2
1287
+	 ret = of_get_named_gpio_flags(node, "gpio_ip2", 0, &flags);
1288
+    if (ret < 0) {
1289
+        printk("%s() Can not read property gpio_ip2\n", __FUNCTION__);
1290
+        goto err;
1291
+    }
1292
+
1293
+    pdata->gpio_ip2 = ret;
1294
+
1295
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip2, "gpio_ip2");
1296
+    if(ret < 0){
1297
+        printk("%s() devm_gpio_request gpio_ip2 request ERROR\n", __FUNCTION__);
1298
+        goto err;
1299
+    }
1300
+
1301
+	//gpio_ip3
1302
+	 ret = of_get_named_gpio_flags(node, "gpio_ip3", 0, &flags);
1303
+    if (ret < 0) {
1304
+        printk("%s() Can not read property gpio_ip3\n", __FUNCTION__);
1305
+        goto err;
1306
+    }
1307
+
1308
+    pdata->gpio_ip3 = ret;
1309
+
1310
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip3, "gpio_ip3");
1311
+    if(ret < 0){
1312
+        printk("%s() devm_gpio_request gpio_ip3 request ERROR\n", __FUNCTION__);
1313
+        goto err;
1314
+    }
1315
+
1316
+	//gpio_ip4
1317
+	 ret = of_get_named_gpio_flags(node, "gpio_ip4", 0, &flags);
1318
+    if (ret < 0) {
1319
+        printk("%s() Can not read property gpio_ip4\n", __FUNCTION__);
1320
+        goto err;
1321
+    }
1322
+
1323
+    pdata->gpio_ip4 = ret;
1324
+
1325
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip4, "gpio_ip4");
1326
+    if(ret < 0){
1327
+        printk("%s() devm_gpio_request gpio_ip4 request ERROR\n", __FUNCTION__);
1328
+        goto err;
1329
+    }
1330
+
1331
+	//gpio_ip5
1332
+	 ret = of_get_named_gpio_flags(node, "gpio_ip5", 0, &flags);
1333
+    if (ret < 0) {
1334
+        printk("%s() Can not read property gpio_ip5\n", __FUNCTION__);
1335
+        goto err;
1336
+    }
1337
+
1338
+    pdata->gpio_ip5 = ret;
1339
+
1340
+	 ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip5, "gpio_ip3");
1341
+    if(ret < 0){
1342
+        printk("%s() devm_gpio_request gpio_ip5 request ERROR\n", __FUNCTION__);
1343
+        goto err;
1344
+    }
1345
+
1346
+	//d4 low
1347
+	gpio_direction_input(pdata->gpio_ip0);
1348
+	gpio_direction_input(pdata->gpio_ip1);
1349
+	gpio_direction_input(pdata->gpio_ip2);
1350
+	gpio_direction_input(pdata->gpio_ip3);
1351
+	gpio_direction_input(pdata->gpio_ip4);
1352
+	gpio_direction_input(pdata->gpio_ip5);
1353
+
1354
+
1355
+	//6 in 6 out-e
1356
+
1357
+
1358
+	   //wake_4g_gpio
1359
+	   ret = of_get_named_gpio_flags(node, "wake_4g_gpio", 0, &flags);
1360
+	   if (ret < 0) {
1361
+	           printk("%s() Can not read property wake_4g_gpio\n", __FUNCTION__);
1362
+	   } else {
1363
+	           pdata->wake_4g_gpio = ret;
1364
+
1365
+	           ret = devm_gpio_request(&pdev->dev, pdata->wake_4g_gpio, "wake_4g_gpio");
1366
+	           if(ret < 0){
1367
+	                   printk("%s() devm_gpio_request wake_4g_gpio request ERROR\n", __FUNCTION__);
1368
+	           }
1369
+	           ret = gpio_direction_output(pdata->wake_4g_gpio,0);
1370
+	           if(ret < 0){
1371
+	                   printk("%s() gpio_direction_input wake_4g_gpio set ERROR\n", __FUNCTION__);
1372
+	           }
1373
+	   }
1374
+
1375
+
1376
+	   //reset_4g_gpio
1377
+	   ret = of_get_named_gpio_flags(node, "reset_4g_gpio", 0, &flags);
1378
+	   if (ret < 0) {
1379
+	           printk("%s() Can not read property reset_4g_gpio\n", __FUNCTION__);
1380
+	   } else {
1381
+	           pdata->reset_4g_gpio = ret;
1382
+
1383
+	           ret = devm_gpio_request(&pdev->dev, pdata->reset_4g_gpio, "reset_4g_gpio");
1384
+	           if(ret < 0){
1385
+	                   printk("%s() devm_gpio_request reset_4g_gpio request ERROR\n", __FUNCTION__);
1386
+	           }
1387
+	           ret = gpio_direction_output(pdata->reset_4g_gpio,0);
1388
+	           if(ret < 0){
1389
+	                   printk("%s() gpio_direction_input reset_4g_gpio set ERROR\n", __FUNCTION__);
1390
+	           }
1391
+	   }
1392
+
1393
+	   //en_4g_gpio
1394
+	   ret = of_get_named_gpio_flags(node, "en_4g_gpio", 0, &flags);
1395
+	   if (ret < 0) {
1396
+	           printk("%s() Can not read property en_4g_gpio\n", __FUNCTION__);
1397
+	   } else {
1398
+	           pdata->en_4g_gpio = ret;
1399
+
1400
+	           ret = devm_gpio_request(&pdev->dev, pdata->en_4g_gpio, "en_4g_gpio");
1401
+	           if(ret < 0){
1402
+	                   printk("%s() devm_gpio_request en_4g_gpio request ERROR\n", __FUNCTION__);
1403
+	           }
1404
+	           ret = gpio_direction_output(pdata->en_4g_gpio,1);
1405
+	           if(ret < 0){
1406
+	                   printk("%s() gpio_direction_input en_4g_gpio set ERROR\n", __FUNCTION__);
1407
+	           }
1408
+	   }
1409
+
1410
+
1411
+	   //air_mode_4g_gpio
1412
+	   ret = of_get_named_gpio_flags(node, "air_mode_4g_gpio", 0, &flags);
1413
+	   if (ret < 0) {
1414
+	           printk("%s() Can not read property air_mode_4g_gpio\n", __FUNCTION__);
1415
+	   } else {
1416
+	           pdata->air_mode_4g_gpio = ret;
1417
+
1418
+	           ret = devm_gpio_request(&pdev->dev, pdata->air_mode_4g_gpio, "air_mode_4g_gpio");
1419
+	           if(ret < 0){
1420
+	                   printk("%s() devm_gpio_request air_mode_4g_gpio request ERROR\n", __FUNCTION__);
1421
+	           }
1422
+	           ret = gpio_direction_output(pdata->air_mode_4g_gpio,0);
1423
+	           if(ret < 0){
1424
+	                   printk("%s() gpio_direction_input air_mode_4g_gpio set ERROR\n", __FUNCTION__);
1425
+	           }
1426
+	   }
1427
+
1428
+
1429
+       
1430
+	
1431
+
1432
+	//mic_switch_gpio
1433
+		ret = of_get_named_gpio_flags(node, "mic_switch_gpio", 0, &flags);
1434
+		if (ret < 0) {
1435
+				printk("%s() Can not read property mic_switch_gpio\n", __FUNCTION__);
1436
+				goto err;
1437
+		} else {
1438
+				pdata->mic_switch_gpio = ret;
1439
+				ret = devm_gpio_request(&pdev->dev, pdata->mic_switch_gpio, "mic_switch_gpio");
1440
+				if(ret < 0){
1441
+						printk("%s() devm_gpio_request mic_switch_gpio request ERROR\n", __FUNCTION__);
1442
+						goto err;
1443
+				}
1444
+				ret = gpio_direction_output(pdata->mic_switch_gpio,0); 
1445
+				mic_enable = 0;
1446
+				if(ret < 0){
1447
+				printk("%s() gpio_direction_input mic_switch_gpio set ERROR\n", __FUNCTION__);
1448
+				goto err;
1449
+		}
1450
+				}
1451
+#if 0
1452
+	//vcc_5v_io
1453
+	ret = of_get_named_gpio_flags(node, "vcc_5v_io", 0, &flags);
1454
+	if (ret < 0) {
1455
+		printk("%s() Can not read property vcc_5v_io\n", __FUNCTION__);
1456
+		goto err;
1457
+	} else {
1458
+		pdata->vcc_5v_io = ret;
1459
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc_5v_io, "vcc_5v_io");
1460
+		if(ret < 0){
1461
+			printk("%s() devm_gpio_request vcc_5v_io request ERROR\n", __FUNCTION__);
1462
+			goto err;
1463
+		}
1464
+
1465
+		ret = gpio_direction_output(pdata->vcc_5v_io,1); 
1466
+		if(ret < 0){
1467
+			printk("%s() gpio_direction_input vcc_5v_io set ERROR\n", __FUNCTION__);
1468
+			goto err;
1469
+		}
1470
+	}
1471
+#endif
1472
+	//vcc_3.3v_io
1473
+	ret = of_get_named_gpio_flags(node, "vcc_3_3v_io", 0, &flags);
1474
+	if (ret < 0) {
1475
+		printk("%s() Can not read property vcc_3_3v_io\n", __FUNCTION__);
1476
+		goto err;
1477
+	} else {
1478
+		pdata->vcc_3_3v_io = ret;
1479
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc_3_3v_io, "vcc_3_3v_io");
1480
+		if(ret < 0){
1481
+			printk("%s() devm_gpio_request vcc_3_3v_io request ERROR\n", __FUNCTION__);
1482
+			goto err;
1483
+		}
1484
+
1485
+		ret = gpio_direction_output(pdata->vcc_3_3v_io,1); 
1486
+		if(ret < 0){
1487
+			printk("%s() gpio_direction_input vcc_3_3v_io set ERROR\n", __FUNCTION__);
1488
+			goto err;
1489
+		}
1490
+	}
1491
+
1492
+		//vcc_12v_io
1493
+	ret = of_get_named_gpio_flags(node, "vcc_12v_io", 0, &flags);
1494
+	if (ret < 0) {
1495
+		printk("%s() Can not read property vcc_12v_io\n", __FUNCTION__);
1496
+		goto err;
1497
+	} else {
1498
+		pdata->vcc_12v_io = ret;
1499
+		ret = devm_gpio_request(&pdev->dev, pdata->vcc_12v_io, "vcc_12v_io");
1500
+		if(ret < 0){
1501
+			printk("%s() devm_gpio_request vcc_12v_io request ERROR\n", __FUNCTION__);
1502
+			goto err;
1503
+		}
1504
+
1505
+		ret = gpio_direction_output(pdata->vcc_12v_io,1); 
1506
+		if(ret < 0){
1507
+			printk("%s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
1508
+			goto err;
1509
+		}
1510
+	}
1511
+	
1512
+		//hub_5V_gpio
1513
+	ret = of_get_named_gpio_flags(node, "hub_5V_gpio", 0, &flags);
1514
+	if (ret < 0) {
1515
+		printk("%s() Can not read property hub_5V_gpio\n", __FUNCTION__);
1516
+		goto err;
1517
+	} else {
1518
+		
1519
+		pdata->hub_5V_gpio = ret;
1520
+		gpio_free(ret);
1521
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_5V_gpio, "hub_5V_gpio");
1522
+		if(ret < 0){
1523
+			printk("%s() devm_gpio_request hub_5V_gpio request ERROR\n", __FUNCTION__);
1524
+			goto err;
1525
+		}
1526
+
1527
+		ret = gpio_direction_output(pdata->hub_5V_gpio,1); 
1528
+		if(ret < 0){
1529
+			printk("%s() gpio_direction_input hub_5V_gpio set ERROR\n", __FUNCTION__);
1530
+			goto err;
1531
+		}
1532
+	}
1533
+
1534
+
1535
+	//hub_5V_rest_gpio
1536
+	ret = of_get_named_gpio_flags(node, "hub_5V_rest_gpio", 0, &flags);
1537
+	if (ret < 0) {
1538
+		printk("%s() Can not read property hub_5V_rest_gpio\n", __FUNCTION__);
1539
+		goto err;
1540
+	} else {
1541
+		pdata->hub_5V_rest_gpio = ret;
1542
+		ret = devm_gpio_request(&pdev->dev, pdata->hub_5V_rest_gpio, "hub_5V_rest_gpio");
1543
+		if(ret < 0){
1544
+			printk("%s() devm_gpio_request hub_5V_rest_gpio request ERROR\n", __FUNCTION__);
1545
+			goto err;
1546
+		}
1547
+
1548
+		ret = gpio_direction_output(pdata->hub_5V_rest_gpio,0); 
1549
+		if(ret < 0){
1550
+			printk("%s() gpio_direction_input hub_5V_rest_gpio set ERROR\n", __FUNCTION__);
1551
+			goto err;
1552
+		}
1553
+		msleep(800);
1554
+		ret = gpio_direction_output(pdata->hub_5V_rest_gpio,1); 
1555
+		if(ret < 0){
1556
+			printk("%s() gpio_direction_input hub_5V_rest_gpio set ERROR\n", __FUNCTION__);
1557
+			goto err;
1558
+		}
1559
+	}
1560
+	
1561
+		//audio_switch_gpio
1562
+	ret = of_get_named_gpio_flags(node, "audio_switch_gpio", 0, &flags);
1563
+	if (ret < 0) {
1564
+		printk("%s() Can not read property audio_switch_gpio\n", __FUNCTION__);
1565
+		goto err;
1566
+	} else {
1567
+		pdata->audio_switch_gpio = ret;
1568
+		ret = devm_gpio_request(&pdev->dev, pdata->audio_switch_gpio, "audio_switch_gpio");
1569
+		if(ret < 0){
1570
+			printk("%s() devm_gpio_request audio_switch_gpio request ERROR\n", __FUNCTION__);
1571
+			goto err;
1572
+		}
1573
+            ret = gpio_direction_output(pdata->audio_switch_gpio, !flags); 
1574
+		if(ret < 0){
1575
+		printk("%s() gpio_direction_input audio_switch_gpio set ERROR\n", __FUNCTION__);
1576
+		goto err;
1577
+	}
1578
+		}
1579
+
1580
+	//led_ctl
1581
+		ret = of_get_named_gpio_flags(node, "led_ctl", 0, &flags);
1582
+		if (ret < 0) {
1583
+			printk("%s() Can not read property usb_5v_gpio\n", __FUNCTION__);
1584
+			goto err;
1585
+		} else {
1586
+			pdata->led_gpio = ret;
1587
+			ret = devm_gpio_request(&pdev->dev, pdata->led_gpio, "led_ctl");
1588
+			if(ret < 0){
1589
+				printk("%s() devm_gpio_request led_gpio request ERROR\n", __FUNCTION__);
1590
+				goto err;
1591
+			}
1592
+	
1593
+			ret = gpio_direction_output(pdata->led_gpio,0); 
1594
+			if(ret < 0){
1595
+				printk("%s() gpio_direction_input led_gpio set ERROR\n", __FUNCTION__);
1596
+				goto err;
1597
+			}
1598
+		}
1599
+		
1600
+		   
1601
+
1602
+    printk("edp_bl_on ....\r\n"); 
1603
+    ret = of_get_named_gpio_flags(node, "edp_bl_on", 0, &flags);
1604
+    if (ret < 0) {
1605
+        printk("%s() Can not read property edp_bl_on\n", __FUNCTION__);
1606
+        goto err;
1607
+    } else {
1608
+        int gpio = ret;
1609
+        ret = devm_gpio_request(&pdev->dev, gpio, "edp_bl_on");
1610
+        if(ret < 0){
1611
+            printk("%s() devm_gpio_request edp_b1_on request ERROR\n", __FUNCTION__);
1612
+            goto err;
1613
+        }
1614
+
1615
+        ret = gpio_direction_output(gpio, !flags); 
1616
+        if(ret < 0){
1617
+            printk("%s() gpio_direction_input edp_bl_on set ERROR\n", __FUNCTION__);
1618
+            goto err;
1619
+        }
1620
+    }
1621
+    printk("edp_bl_on ....ok!\r\n"); 
1622
+
1623
+    printk("edp_bl_en ....\r\n"); 
1624
+    ret = of_get_named_gpio_flags(node, "edp_bl_en", 0, &flags);
1625
+    if (ret < 0) {
1626
+        printk("%s() Can not read property edp_bl_en\n", __FUNCTION__);
1627
+        goto err;
1628
+    } else {
1629
+        int gpio = ret;
1630
+        ret = devm_gpio_request(&pdev->dev, gpio, "edp_bl_en");
1631
+        if(ret < 0){
1632
+            printk("%s() devm_gpio_request edp_bl_en  request ERROR\n", __FUNCTION__);
1633
+            goto err;
1634
+        }
1635
+        ret = gpio_direction_output(gpio, !flags); 
1636
+        if(ret < 0){
1637
+            printk("%s() gpio_direction_input edp_bl_en set ERROR\n", __FUNCTION__);
1638
+            goto err;
1639
+        }
1640
+    }
1641
+    printk("edp_bl_en ....ok!\r\n"); 
1642
+
1643
+    printk("fan_io_en ....\r\n"); 
1644
+    ret = of_get_named_gpio_flags(node, "fan_io_en", 0, &flags);
1645
+    if (ret < 0) {
1646
+        printk("%s() Can not read property fan_io_en\n", __FUNCTION__);
1647
+        goto err;
1648
+    } else {
1649
+        int gpio = ret;
1650
+        ret = devm_gpio_request(&pdev->dev, gpio, "fan_io_en");
1651
+        if(ret < 0){
1652
+            printk("%s() devm_gpio_request fan_io_en request ERROR\n", __FUNCTION__);
1653
+            goto err;
1654
+        }
1655
+
1656
+        ret = gpio_direction_output(gpio, !flags); 
1657
+        if(ret < 0){
1658
+            printk("%s() gpio_direction_input fan_io_en set ERROR\n", __FUNCTION__);
1659
+            goto err;
1660
+        }
1661
+    }
1662
+    printk("fan_io_en ....ok!\r\n"); 
1663
+
1664
+
1665
+    //pcie_wakeup for ap6256 BT_wake
1666
+    /* Rfkill-bt.c bt driver config and set this pin already
1667
+    printk("pcie_wakeup ....\r\n"); 
1668
+
1669
+	ret = of_get_named_gpio_flags(node, "pcie_wakeup", 0, &flags);
1670
+	if (ret < 0) {
1671
+		printk("%s() Can not read property pcie_wakeup\n", __FUNCTION__);
1672
+		goto err;
1673
+	} else {
1674
+        int gpio = ret;
1675
+		ret = devm_gpio_request(&pdev->dev, gpio, "pcie_wakeup");
1676
+		if(ret < 0){
1677
+			printk("%s() devm_gpio_request pcie_wakeup request ERROR\n", __FUNCTION__);
1678
+			goto err;
1679
+		}
1680
+
1681
+		ret = gpio_direction_output(gpio, 1); 
1682
+		if(ret < 0){
1683
+			printk("%s() gpio_direction_input pcie_wakeup set ERROR\n", __FUNCTION__);
1684
+			goto err;
1685
+		}
1686
+	}
1687
+    printk("pcie_wakeup ....ok!\r\n"); 
1688
+	*/
1689
+
1690
+
1691
+	nk_class = class_create(THIS_MODULE, "io_control");
1692
+#if 0
1693
+	ret = class_create_file(nk_class, &class_attr_en_4g_gpio);
1694
+	if (ret) {
1695
+		printk(KERN_ERR "%s:Fail to creat en_4g_gpio class file\n", __func__);
1696
+		return ret;
1697
+	}else
1698
+	printk("class_create io_control en_4g_gpio OK !!!!\n");
1699
+	
1700
+	ret = class_create_file(nk_class, &class_attr_gpio_op0);
1701
+	if (ret) {
1702
+		printk(KERN_ERR "%s:Fail to creat gpio_op0 class file\n", __func__);
1703
+		return ret;
1704
+	}else
1705
+	printk("class_create io_control gpio_op0 OK !!!!\n");
1706
+
1707
+	ret = class_create_file(nk_class, &class_attr_gpio_op1);
1708
+	if (ret) {
1709
+		printk(KERN_ERR "%s:Fail to creat gpio_op1 class file\n", __func__);
1710
+		return ret;
1711
+	}else
1712
+	printk("class_create io_control gpio_op1 OK !!!!\n");
1713
+
1714
+	ret = class_create_file(nk_class, &class_attr_gpio_op2);
1715
+	if (ret) {
1716
+		printk(KERN_ERR "%s:Fail to creat gpio_op2 class file\n", __func__);
1717
+		return ret;
1718
+	}else
1719
+	printk("class_create io_control gpio_op2 OK !!!!\n");
1720
+
1721
+	ret = class_create_file(nk_class, &class_attr_gpio_op3);
1722
+	if (ret) {
1723
+		printk(KERN_ERR "%s:Fail to creat gpio_op3 class file\n", __func__);
1724
+		return ret;
1725
+	}else
1726
+	printk("class_create io_control gpio_op3 OK !!!!\n");
1727
+
1728
+	ret = class_create_file(nk_class, &class_attr_gpio_op4);
1729
+	if (ret) {
1730
+		printk(KERN_ERR "%s:Fail to creat gpio_op4 class file\n", __func__);
1731
+		return ret;
1732
+	}else
1733
+	printk("class_create io_control gpio_op4 OK !!!!\n");
1734
+
1735
+	ret = class_create_file(nk_class, &class_attr_gpio_op5);
1736
+	if (ret) {
1737
+		printk(KERN_ERR "%s:Fail to creat gpio_op5 class file\n", __func__);
1738
+		return ret;
1739
+	}else
1740
+	printk("class_create io_control gpio_op5 OK !!!!\n");
1741
+
1742
+	ret = class_create_file(nk_class, &class_attr_gpio_ip0);
1743
+	if (ret) {
1744
+		printk(KERN_ERR "%s:Fail to creat gpio_ip0 class file\n", __func__);
1745
+		return ret;
1746
+	}else
1747
+	printk("class_create io_control gpio_ip0 OK !!!!\n");
1748
+
1749
+	ret = class_create_file(nk_class, &class_attr_gpio_ip1);
1750
+	if (ret) {
1751
+		printk(KERN_ERR "%s:Fail to creat gpio_ip1 class file\n", __func__);
1752
+		return ret;
1753
+	}else
1754
+	printk("class_create io_control gpio_ip1 OK !!!!\n");
1755
+
1756
+	ret = class_create_file(nk_class, &class_attr_gpio_ip2);
1757
+	if (ret) {
1758
+		printk(KERN_ERR "%s:Fail to creat gpio_ip2 class file\n", __func__);
1759
+		return ret;
1760
+	}else
1761
+	printk("class_create io_control gpio_ip2 OK !!!!\n");
1762
+
1763
+	ret = class_create_file(nk_class, &class_attr_gpio_ip3);
1764
+	if (ret) {
1765
+		printk(KERN_ERR "%s:Fail to creat gpio_ip3 class file\n", __func__);
1766
+		return ret;
1767
+	}else
1768
+	printk("class_create io_control gpio_ip3 OK !!!!\n");
1769
+
1770
+	ret = class_create_file(nk_class, &class_attr_gpio_ip4);
1771
+	if (ret) {
1772
+		printk(KERN_ERR "%s:Fail to creat gpio_ip4 class file\n", __func__);
1773
+		return ret;
1774
+	}else
1775
+	printk("class_create io_control gpio_ip4 OK !!!!\n");
1776
+
1777
+	ret = class_create_file(nk_class, &class_attr_gpio_ip5);
1778
+	if (ret) {
1779
+		printk(KERN_ERR "%s:Fail to creat gpio_ip5 class file\n", __func__);
1780
+		return ret;
1781
+	}else
1782
+	printk("class_create io_control gpio_ip5 OK !!!!\n");
1783
+	
1784
+	ret = class_create_file(nk_class, &class_attr_led_display);
1785
+	if (ret) {
1786
+		printk(KERN_ERR "%s:Fail to creat led_display class file\n", __func__);
1787
+		return ret;
1788
+	}else
1789
+	printk("class_create nk_io_control led OK !!!!\n");	
1790
+
1791
+   ret = class_create_file(nk_class, &class_attr_mic_switch);
1792
+   if (ret) {
1793
+           printk(KERN_ERR "%s:Fail to creat mic_switch class file\n", __func__);
1794
+           return ret;
1795
+   }else
1796
+   printk("class_create nk_io_control mic OK !!!!\n");	
1797
+#endif
1798
+		   
1799
+	NKpdata_info = pdata;
1800
+
1801
+	printk(" #######nk_io_control_probe end####### \n");
1802
+	return 0;
1803
+err:
1804
+	kfree(pdata);
1805
+	return ret;
1806
+}
1807
+#endif
1808
+
1809
+static int nk_io_control_remove(struct platform_device *pdev)
1810
+{
1811
+	if(NKpdata_info)
1812
+		kfree(NKpdata_info);
1813
+	return 0;
1814
+}
1815
+
1816
+static int nk_io_control_suspend(struct platform_device *pdev, pm_message_t state)
1817
+{
1818
+	printk("LED_early_suspend LED_early_suspend LED_early_suspend !!!!\n");
1819
+
1820
+	//enable = 0;
1821
+	//LED_SET(0);
1822
+	return 0;
1823
+}
1824
+
1825
+static int nk_io_control_resume(struct platform_device *pdev)
1826
+{
1827
+	int ret,reset_pin;
1828
+	printk("nk_io resume !!!!\n");
1829
+	ret = gpio_get_value(120);
1830
+	printk("edp_reset gpio value : %d\n",ret);
1831
+
1832
+        usleep_range(80000, 100000);
1833
+	gpio_set_value(120,0);
1834
+//    	gpio_direction_output(120, 0);
1835
+        usleep_range(80000, 100000);
1836
+	ret = gpio_get_value(120);
1837
+	printk("edp_reset gpio value : %d\n",ret);
1838
+//    	gpio_direction_output(120, 1);
1839
+	gpio_set_value(120,1);
1840
+    	usleep_range(80000, 100000);
1841
+	ret = gpio_get_value(120);
1842
+	printk("edp_reset gpio value : %d\n",ret);
1843
+
1844
+	//enable = 1;
1845
+    	//LED_SET(11);
1846
+	return 0;
1847
+}
1848
+
1849
+static const struct of_device_id nk_io_control_of_match[] = {
1850
+        { .compatible = "nk_io_control", },
1851
+        {},
1852
+};
1853
+MODULE_DEVICE_TABLE(of, nk_io_control_of_match);
1854
+
1855
+static struct platform_driver nk_io_control_driver = {
1856
+	.probe	= nk_io_control_probe,
1857
+	.remove = nk_io_control_remove,
1858
+	.resume = 	nk_io_control_resume,	
1859
+	.suspend = 	nk_io_control_suspend,	
1860
+	.driver	= {
1861
+		.name	= "nk_io_control",
1862
+		.owner	= THIS_MODULE,
1863
+		.of_match_table = of_match_ptr(nk_io_control_of_match),		
1864
+	},
1865
+};
1866
+
1867
+static int __init nk_io_control_init(void)
1868
+{
1869
+	platform_driver_register(&nk_io_control_driver);
1870
+	return 0;
1871
+}
1872
+
1873
+static void __exit nk_io_control_exit(void)
1874
+{
1875
+	platform_driver_unregister(&nk_io_control_driver);
1876
+}
1877
+
1878
+subsys_initcall(nk_io_control_init);
1879
+
1880
+//late_initcall(nk_io_control_init);
1881
+MODULE_DESCRIPTION("nk io Core Driver");
1882
+MODULE_LICENSE("GPL");

 kernel/drivers/misc/nkio/nkio.h
..
..
@@ -0,0 +1,36 @@
1
+/* SPDX-License-Identifier: GPL-2.0 */
2
+#ifndef NK_IO_H
3
+#define NK_IO_H
4
+
5
+struct nk_io_pdata{
6
+	unsigned int vcc_5v_io;
7
+	unsigned int vcc_3_3v_io;
8
+	unsigned int vcc_12v_io;
9
+	unsigned int usb_5v_gpio;
10
+	//unsigned int hub_5V_rest_gpio;
11
+	//unsigned int hub_5V_gpio;
12
+	unsigned int led_gpio;
13
+	unsigned int mic_switch_gpio;
14
+	unsigned int audio_switch_gpio;
15
+	unsigned int wake_4g_gpio;
16
+	unsigned int reset_4g_gpio;
17
+	unsigned int en_4g_gpio;
18
+	unsigned int air_mode_4g_gpio;
19
+	unsigned int usb_en_oc_gpio;
20
+	unsigned int lcd_bk_en_gpio;
21
+	unsigned int lcd_pwblk_gpio;
22
+	unsigned int vcc3_io_en_gpio;
23
+	
24
+	unsigned int hub_host2_5V_rest_gpio;
25
+	unsigned int hub_host2_5v_gpio; 	
26
+	unsigned int hub_host3_5V_rest_gpio;
27
+	unsigned int hub_host3_5v_gpio; 
28
+	unsigned int edp_power_supply_gpio;
29
+	unsigned int edp_enable_gpio;
30
+   	unsigned int tp_enable;
31
+	unsigned int vddio_mipi;
32
+//    unsigned int tp_reset;
33
+};
34
+
35
+#endif
36
+
 kernel/drivers/misc/nkmcu/Makefile
..
..
@@ -0,0 +1 @@
1
+obj-y += nk_mcu.o 
 kernel/drivers/misc/nkmcu/nk_mcu.c
..
..
@@ -0,0 +1,161 @@
1
+#include <linux/module.h>
2
+#include <linux/clk-provider.h>
3
+#include <linux/i2c.h>
4
+#include <linux/delay.h>
5
+
6
+static struct i2c_client s_m_client;
7
+static struct i2c_client* m_client;
8
+ 
9
+//写16位寄存器
10
+static inline int nkmcu_reg_write(struct i2c_client *client,int index,unsigned short reg, unsigned char val)
11
+{
12
+	unsigned char u8_buf[3] = { 0 };
13
+	unsigned int buf_len = 3;
14
+	int retry, timeout = 5;
15
+	int ret;
16
+
17
+	ret = 0;
18
+	u8_buf[0] = (reg >> 8) & 0xFF;//寄存器地址高位
19
+	u8_buf[1] = reg & 0xFF;  //寄存器地址低位
20
+	u8_buf[2] = val; //要发送的数据
21
+
22
+	//pdata->client->addr = ADDR + index;
23
+	for (retry = 0; retry < timeout; retry++) 
24
+    {
25
+		if (i2c_master_send(client, u8_buf, buf_len) < 0) 
26
+        {
27
+			pr_err("%s:write reg error: reg=0x%x, val=0x%x, retry = %d.\n", __func__, reg, val, retry);
28
+			ret = -1;
29
+			msleep(5);
30
+			continue;
31
+		}
32
+		else
33
+        {      
34
+			pr_err("%s:write reg ok: reg=0x%x, val=0x%x, retry = %d.\n", __func__, reg, val, retry);
35
+			ret = 0;
36
+            break;
37
+        }
38
+	}
39
+	return ret;
40
+}
41
+
42
+//16位读
43
+static inline int nkmcu_reg_read(struct i2c_client *client, int index, unsigned short reg)
44
+{
45
+	unsigned char u8_buf[2] = { 0 };
46
+	unsigned int buf_len = 2;
47
+	int retry, timeout = 5;
48
+	unsigned char u8_val = 0;
49
+
50
+	u8_buf[0] = (reg >> 8) & 0xFF;//寄存器地址高位
51
+	u8_buf[1] = reg & 0xFF;//寄存器地址低位
52
+
53
+	//pdata->client->addr = ADDR + index;
54
+	for (retry = 0; retry < timeout; retry++) 
55
+    {
56
+		if (i2c_master_send(client, u8_buf, buf_len) < 0) 
57
+        {
58
+			pr_err("%s:read reg error on send: reg=0x%x, retry = %d.\n", __func__, reg, retry);
59
+			msleep(5);
60
+			continue;
61
+		}
62
+		if (i2c_master_recv(client, &u8_val, 1) != 1) {
63
+			pr_err("%s:read reg error on recv: reg=0x%x, retry = %d.\n", __func__, reg, retry);
64
+			msleep(5);
65
+			continue;
66
+		}
67
+		break;
68
+	}
69
+
70
+	if (retry >= timeout) {
71
+		pr_err("%s:read reg error: reg=0x%x.\n", __func__, reg);
72
+		return -1;
73
+	}
74
+
75
+	return u8_val;
76
+}
77
+
78
+void nkmcu_device_shutdown(void)
79
+{
80
+	int ret;
81
+	
82
+	pr_err("nkmcu_device_shutdown.. \n");
83
+	
84
+	//powenoff
85
+	if (m_client != NULL)
86
+	{	
87
+		ret = nkmcu_reg_write(m_client, 0x00, 0x06, 0x01);
88
+		if (ret < 0)	
89
+			pr_err("nkmcu_device_shutdown..failed \n");	
90
+		else
91
+			pr_err("nkmcu_device_shutdown.. ok \n");
92
+	}	
93
+	
94
+}
95
+EXPORT_SYMBOL(nkmcu_device_shutdown);
96
+	
97
+static int  nk_mcu_probe(struct i2c_client *client, const struct i2c_device_id *id)
98
+{
99
+	struct device_node *np = client->dev.of_node;
100
+	int ret;
101
+	
102
+	printk("%s: probe\n", __FUNCTION__);
103
+	
104
+	/* check state of calendar information */
105
+	//device id
106
+	//i2c_smbus_read_word_data
107
+	msleep(100);
108
+	//ret = i2c_smbus_read_byte_data(client, 0x00);
109
+	ret = nkmcu_reg_read(client, 0x00, 0x00);
110
+	printk("device id:%x \n", ret);
111
+	if (ret != 0xaa)
112
+		goto error;
113
+	
114
+	//powenon
115
+	msleep(100);
116
+	//ret = i2c_smbus_write_word_data(client, 0x07, 0x01);
117
+	ret = nkmcu_reg_write(client, 0x00, 0x07, 0x01);
118
+	printk("poweron command:%x \n", ret);
119
+	if (ret < 0)
120
+		goto error;
121
+	
122
+	//m_client = client;
123
+	memcpy(&s_m_client, client, sizeof(struct i2c_client));
124
+	m_client = &s_m_client;
125
+	return 0;
126
+	
127
+error:
128
+	return -1;			
129
+}
130
+
131
+static const struct i2c_device_id nk_mcu_id[] = {
132
+        { "nk_mcu", 0 },
133
+        { }
134
+};
135
+
136
+static struct i2c_driver nk_mcu_driver = {
137
+        .driver         = {
138
+                .name   = "nk_mcu",
139
+                .owner  = THIS_MODULE,
140
+        },
141
+        .probe          = nk_mcu_probe,
142
+        .id_table       = nk_mcu_id,
143
+};
144
+
145
+static int __init nk_mcu_init(void)
146
+{
147
+        return i2c_add_driver(&nk_mcu_driver);
148
+}
149
+
150
+static void __exit nk_mcu_exit(void)
151
+{
152
+        i2c_del_driver(&nk_mcu_driver);
153
+}
154
+
155
+
156
+MODULE_AUTHOR("ben@hotmail.com");
157
+MODULE_DESCRIPTION("nodka mcu driver");
158
+MODULE_LICENSE("GPL");
159
+
160
+late_initcall(nk_mcu_init);
161
+module_exit(nk_mcu_exit);
 mk-rootfs.sh
..
..
@@ -0,0 +1,50 @@
1
+#!/bin/bash -e
2
+TARGET_ROOTFS_DIR=./debian/debian_rootfs
3
+MOUNTPOINT=./temp
4
+ROOTFSIMAGE=rootfs.ext4
5
+OUT=$PWD/tools/linux/Linux_Pack_Firmware/rockdev/Image/
6
+
7
+echo Making rootfs!
8
+
9
+if [ -e ${ROOTFSIMAGE} ]; then 
10
+	rm ${ROOTFSIMAGE}
11
+fi
12
+if [ -e ${MOUNTPOINT} ]; then 
13
+	rm -r ${MOUNTPOINT}
14
+fi
15
+
16
+# Create directories
17
+mkdir ${MOUNTPOINT}
18
+dd if=/dev/zero of=${ROOTFSIMAGE} bs=1M count=0 seek=4300
19
+
20
+finish() {
21
+	sudo umount ${MOUNTPOINT} || true
22
+	echo -e "\e[31m MAKE ROOTFS FAILED.\e[0m"
23
+	exit -1
24
+}
25
+
26
+echo Format rootfs to ext4
27
+mkfs.ext4 ${ROOTFSIMAGE}
28
+
29
+echo Mount rootfs to ${MOUNTPOINT}
30
+sudo mount  ${ROOTFSIMAGE} ${MOUNTPOINT}
31
+trap finish ERR
32
+
33
+echo Copy rootfs to ${MOUNTPOINT}
34
+sudo cp -rvfp ${TARGET_ROOTFS_DIR}/*  ${MOUNTPOINT}
35
+sync
36
+
37
+
38
+echo Umount rootfs
39
+sudo umount ${MOUNTPOINT}
40
+
41
+echo Rootfs Image: ${ROOTFSIMAGE}
42
+
43
+e2fsck -p -f ${ROOTFSIMAGE}
44
+resize2fs -M ${ROOTFSIMAGE}
45
+
46
+#[ ! -d ${OUT} ] && mkdir ${OUT}
47
+cp $ROOTFSIMAGE ${OUT}
48
+
49
+unlink $ROOTFSIMAGE
50
+cd ..