| .. | .. |
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| 590 | 590 | } |
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| 591 | 591 | #endif /* CONFIG_DEBUG_FS */ |
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| 592 | 592 | |
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| 593 | | -static inline int sunxi_get_ic_version(struct device *dev, char *version) |
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| 594 | | -{ |
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| 595 | | -#define SYS_CFG_BASE 0x03000000 |
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| 596 | | -#define VER_REG_OFFS 0x00000024 |
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| 597 | | - void __iomem *io = NULL; |
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| 598 | | - static char ver = 0xff; |
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| 599 | | - /* IC version: |
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| 600 | | - * A/B/C: 0 |
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| 601 | | - * D: 3 |
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| 602 | | - * E: 4 |
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| 603 | | - * F: 5 |
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| 604 | | - * 6/7/1/2 to be used in future. |
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| 605 | | - */ |
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| 606 | | - *version = 0; |
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| 607 | | - if (ver == 0xff) { |
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| 608 | | - io = ioremap(SYS_CFG_BASE, 0x100); |
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| 609 | | - if (io == NULL) { |
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| 610 | | - dev_err(dev, "ioremap of sys_cfg register failed!\n"); |
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| 611 | | - return -1; |
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| 612 | | - } |
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| 613 | | - *version = (char)(readl(io + VER_REG_OFFS) & 0x7); |
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| 614 | | - iounmap(io); |
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| 615 | | - ver = *version; |
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| 616 | | - } else { |
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| 617 | | - *version = ver; |
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| 618 | | - } |
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| 619 | | - return 0; |
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| 620 | | -} |
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| 621 | | - |
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| 622 | | -bool sunxi_ic_version_ctrl(struct device *dev) |
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| 623 | | -{ |
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| 624 | | - char ic_version = 0; |
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| 625 | | - sunxi_get_ic_version(dev, &ic_version); |
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| 626 | | - /* |
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| 627 | | - * The flow of jtag reset before gpu reset will cause MIPS crash, so we |
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| 628 | | - * will put the domainA, domainB and gpu reset operations to boot0 stage. |
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| 629 | | - * And in kernel stage, we will always keep domainA poweron. |
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| 630 | | - */ |
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| 631 | | - if (ic_version == 0 || ic_version == 3 || ic_version == 4 || ic_version == 5) |
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| 632 | | - return false; |
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| 633 | | - return true; |
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| 634 | | -} |
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| 635 | | - |
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| 636 | | - |
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| 637 | 593 | int sunxi_platform_init(struct device *dev) |
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| 638 | 594 | { |
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| 639 | 595 | #if defined(CONFIG_OF) |
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| .. | .. |
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| 641 | 597 | struct platform_device *pdev = to_platform_device(dev); |
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| 642 | 598 | #endif /* defined(CONFIG_OF) */ |
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| 643 | 599 | unsigned int val, volt_val = 0; |
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| 644 | | - char ic_version = 0; |
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| 600 | + |
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| 645 | 601 | sunxi_data = (struct sunxi_platform *)kzalloc(sizeof(struct sunxi_platform), GFP_KERNEL); |
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| 646 | 602 | if (!sunxi_data) { |
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| 647 | 603 | dev_err(dev, "failed to get kzalloc sunxi_platform"); |
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| .. | .. |
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| 678 | 634 | sunxi_data->power_idle = 1; |
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| 679 | 635 | sunxi_data->dvfs = 1; |
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| 680 | 636 | sunxi_data->independent_power = 0; |
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| 681 | | - sunxi_data->soft_mode = 0; |
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| 637 | + sunxi_data->soft_mode = 1; |
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| 682 | 638 | |
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| 683 | 639 | parse_dts(dev, sunxi_data); |
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| 684 | 640 | if (!sunxi_data->independent_power) |
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| 685 | 641 | sunxi_data->dvfs = 0; |
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| 686 | | - sunxi_get_ic_version(dev, &ic_version); |
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| 687 | | - dev_info(dev, "IC version: 0x%08x \n", ic_version); |
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| 688 | | - |
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| 689 | | - if (!sunxi_ic_version_ctrl(dev)) { |
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| 690 | | - sunxi_data->power_idle = 0; |
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| 691 | | - sunxi_data->soft_mode = 1; |
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| 692 | | - } else { |
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| 693 | | - sunxi_data->soft_mode = 0; |
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| 694 | | - } |
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| 695 | 642 | |
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| 696 | 643 | sunxi_decide_pll(sunxi_data); |
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| 697 | 644 | spin_lock_init(&sunxi_data->lock); |
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| .. | .. |
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| 720 | 667 | sunxi_data->power_idle = 0; |
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| 721 | 668 | regulator_set_voltage(sunxi_data->regula, 900000, 900000); |
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| 722 | 669 | #endif |
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| 723 | | - |
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| 724 | 670 | init_waitqueue_head(&dvfs_wq); |
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| 725 | 671 | |
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| 726 | 672 | dev_info(dev, "idle:%d dvfs:%d power:%d %s mode:%d volt:%u core:%lu\n", |
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