固定GMAC1 网卡名为 eth3

hc

2024-11-15 a46a1ad097419aeea7350987dd95230f50d90392

 kernel/drivers/clocksource/arm_global_timer.c
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@@ -153,11 +153,11 @@
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 	 *	the Global Timer flag _after_ having incremented
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 	 *	the Comparator register	value to a higher value.
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 	 */
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-	if (clockevent_state_oneshot(evt))
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+	if (clockevent_is_oob(evt) || clockevent_state_oneshot(evt))
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 		gt_compare_set(ULONG_MAX, 0);
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 	writel_relaxed(GT_INT_STATUS_EVENT_FLAG, gt_base + GT_INT_STATUS);
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-	evt->event_handler(evt);
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+	clockevents_handle_event(evt);
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 	return IRQ_HANDLED;
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 }
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@@ -168,7 +168,7 @@
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 	clk->name = "arm_global_timer";
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 	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
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-		CLOCK_EVT_FEAT_PERCPU;
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+		CLOCK_EVT_FEAT_PERCPU | CLOCK_EVT_FEAT_PIPELINE;
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 	clk->set_state_shutdown = gt_clockevent_shutdown;
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 	clk->set_state_periodic = gt_clockevent_set_periodic;
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 	clk->set_state_oneshot = gt_clockevent_shutdown;
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@@ -192,11 +192,6 @@
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 	return 0;
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 }
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-static u64 gt_clocksource_read(struct clocksource *cs)
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-{
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-	return gt_counter_read();
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-}
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-
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 static void gt_resume(struct clocksource *cs)
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 {
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 	unsigned long ctrl;
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@@ -207,13 +202,15 @@
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 		writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
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 }
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-static struct clocksource gt_clocksource = {
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-	.name	= "arm_global_timer",
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-	.rating	= 300,
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-	.read	= gt_clocksource_read,
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-	.mask	= CLOCKSOURCE_MASK(64),
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-	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
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-	.resume = gt_resume,
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+static struct clocksource_user_mmio gt_clocksource = {
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+	.mmio.clksrc = {
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+		.name	= "arm_global_timer",
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+		.rating	= 300,
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+		.read	= clocksource_dual_mmio_readl_up,
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+		.mask	= CLOCKSOURCE_MASK(64),
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+		.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
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+		.resume = gt_resume,
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+	},
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 };
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 #ifdef CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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@@ -240,6 +237,8 @@
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237
 
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 static int __init gt_clocksource_init(void)
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 {
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+	struct clocksource_mmio_regs mmr;
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+
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 	writel(0, gt_base + GT_CONTROL);
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 	writel(0, gt_base + GT_COUNTER0);
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 	writel(0, gt_base + GT_COUNTER1);
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@@ -249,7 +248,13 @@
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 #ifdef CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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 	sched_clock_register(gt_sched_clock_read, 64, gt_clk_rate);
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 #endif
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-	return clocksource_register_hz(&gt_clocksource, gt_clk_rate);
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+	mmr.reg_upper = gt_base + GT_COUNTER1;
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+	mmr.reg_lower = gt_base + GT_COUNTER0;
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+	mmr.bits_upper = 32;
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+	mmr.bits_lower = 32;
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+	mmr.revmap = NULL;
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+
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+	return clocksource_user_mmio_init(&gt_clocksource, &mmr, gt_clk_rate);
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 }
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 static int __init global_timer_of_register(struct device_node *np)
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@@ -299,8 +304,8 @@
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 		goto out_clk;
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 	}
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-	err = request_percpu_irq(gt_ppi, gt_clockevent_interrupt,
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-				 "gt", gt_evt);
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+	err = __request_percpu_irq(gt_ppi, gt_clockevent_interrupt,
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+				   IRQF_TIMER, "gt", gt_evt);
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 	if (err) {
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 		pr_warn("global-timer: can't register interrupt %d (%d)\n",
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 			gt_ppi, err);