forked from ~ljy/RK3588_XEN

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hc
2024-08-16 a24a44ff9ca902811b99aa9663d697cf452e08ef 
 kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -38,10 +38,10 @@
3838 		io-channels = <&saradc 3>;
3939 		io-channel-names = "adc-detect";
4040 		keyup-threshold-microvolt = <1800000>;
41
-		pinctrl-0 = <&hp_det>;
41
+		pinctrl-0 = <&spk_con>;
4242 		pinctrl-names = "default";
43
-		hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
44
-		spk-con-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
43
+		//hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
44
+		//spk-con-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
4545 		play-pause-key {
4646 			label = "playpause";
4747 			linux,code = <164>;
....@@ -128,13 +128,14 @@
128128 		 * - PDN (power down when low)
129129 		 */
130130 		post-power-on-delay-ms = <200>;
131
-		reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;  //WIFI_REG_ON_H
131
+		reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;  //BT_DISABLE_GPIO1_C6_d_1V8
132132 	};
133133 
134134 	rk_headset: rk-headset {
135
-		status = "disabled";
135
+		status = "okay";
136136 		compatible = "rockchip_headset";
137
-		headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
137
+		headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138
+		spk_ctl_gpio  = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
138139 		pinctrl-names = "default";
139140 		pinctrl-0 = <&hp_det>;
140141 		io-channels = <&saradc 3>;
....@@ -158,7 +159,7 @@
158159 		regulator-boot-on;
159160 		enable-active-high;
160161 		//gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
161
-		gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
162
+		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
162163 		vin-supply = <&vcc_1v8_s0>;
163164 	};
164165 
....@@ -216,9 +217,9 @@
216217 */
217218 	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
218219 		compatible = "regulator-fixed";
219
-		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
220
-		pinctrl-names = "default";
221
-		pinctrl-0 = <&sd_s0_pwr>;
220
+		//gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
221
+		//pinctrl-names = "default";
222
+		//pinctrl-0 = <&sd_s0_pwr>;
222223 		regulator-name = "vcc_3v3_sd_s0";
223224 		enable-active-high;
224225 	};
....@@ -229,20 +230,20 @@
229230 		clock-names = "ext_clock";
230231 		uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
231232 		pinctrl-names = "default", "rts_gpio";
232
-		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
233
+		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
233234 		pinctrl-1 = <&uart9_gpios>;
234
-		BT,reset_gpio    = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H
235
-		BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
236
-		BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
235
+		BT,reset_gpio    = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236
+		//BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237
+		//BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
237238 		status = "okay";
238239 	};
239240 
240241 	wireless_wlan: wireless-wlan {
241242 		compatible = "wlan-platdata";
242243 		wifi_chip_type = "ap6398s";
243
-		pinctrl-names = "default";
244
-		pinctrl-0 = <&wifi_host_wake_irq>;
245
-		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //WIFI_WAKE_HOST_H
244
+	//	pinctrl-names = "default";
245
+	//	pinctrl-0 = <&wifi_host_wake_irq>;
246
+	//	WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
246247 	//	WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
247248 		status = "okay";
248249 	};
....@@ -251,58 +252,48 @@
251252            	compatible = "nk_io_control";
252253 			pinctrl-names = "default";
253254           	pinctrl-0 = <&ndj_io_gpio>;
254
-						
255
-//			vcc_5v {
256
-//				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
257
-//				gpio_function = <0>;
258
-//			};
259
-			
255
+									
260256 			vcc_12v {
261
-				gpio_num = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
257
+				gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
262258 				gpio_function = <0>;
263
-			};
259
+			};//VCC12_IO_EN_GPIO0_D3_u_3V3
264260 			
265261 			vcc_3v {
266
-				gpio_num = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
262
+				gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
267263 				gpio_function = <0>;
268
-			};
264
+			};//VCC3_IO_EN_GPIO4_A1_d_3V3
269265 			
270266            	hub_5V_reset {
271
-				gpio_num = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
267
+				gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 
272268 				gpio_function = <3>;
273
-			};
269
+			};//HUB_RESET_GPIO4_B6_d_3V3
274270 			
275271 			4g_power {
276
-				gpio_num = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
272
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
273
+				gpio_function = <0>;
274
+			};//4G_PWREN_GPIO3_C7_u_3V3
275
+			
276
+			5g_power {
277
+				gpio_num =<&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
277278 				gpio_function = <0>;
278279 			};
279280 			
280
-           	wake_4g {
281
+         	wake_wifi_bt {
281282 				gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
282283 				gpio_function = <0>;
283
-			};
284
+			};//GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
284285 			
285286 			air_mode_4g {
286287 				gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
287288 				gpio_function = <0>;
288
-			};			
289
+			};	//GPIO2_B4_u_1V8_4G_AIR_MODE_IN		
289290 			
290291 			reset_4g {
291292 				gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
292293 				gpio_function = <3>;
293
-			};	
294
-/*
295
-			spk_ctl {
296
-				gpio_num = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
297
-				gpio_function = <0>;
298
-			};
294
+			};	//GPIO2_C3_d_1V8_4G_RESET_N_IN
299295 			
300
-			hp_det
301
-			 {
302
-				gpio_num = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
303
-				gpio_function = <1>;
304
-			};
305
-*/
296
+			
306297 		};
307298 		
308299 		
....@@ -310,12 +301,11 @@
310301                compatible = "simple-panel";
311302                backlight = <&backlight>;
312303                power-supply = <&vcc3v3_lcd_n>;
313
-			   vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
314
-			   vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;  //MIPIDIS_PWR_EN_1V8
315
-               enable-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN
316
-               reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
317
-               edp-bl-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;  //LCD_BLK-PWR_EN
318
-               edp-bl-en = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_D4_d_3V3
304
+			   vcc-5v-gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;	//VCC5_IO_EN_GPIO4_B5_d_3V3		   
305
+               enable-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN_GPIO3_C6_u_3V3
306
+               reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
307
+               edp-bl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;  //LCD_BKL_PWM3_3V3
308
+               edp-bl-en = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_A6_d_3V3
319309                bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
320310                bpc = <8>;
321311                prepare-delay-ms = <200>;
....@@ -382,13 +372,26 @@
382372 };
383373 
384374 &backlight {
385
-	pwms = <&pwm10 0 25000 0>;
375
+	pwms = <&pwm3 0 25000 0>;
386376 	status = "okay";
377
+};
378
+
379
+&backlight1 {
380
+	pwms = <&pwm11 0 25000 0>;
381
+	status = "disabled";
387382 };
388383 
389384 &combphy0_ps {
390385 	status = "okay";
391386 };
387
+
388
+/*
389
+&usbdrd_dwc3_0 {
390
+       dr_mode = "otg";
391
+       extcon = <&u2phy0>;
392
+       status = "okay";
393
+};
394
+*/
392395 
393396 &combphy1_ps {
394397 	status = "okay";
....@@ -423,6 +426,10 @@
423426  * mipi_dcphy0 needs to be enabled
424427  * when dsi0 is enabled
425428  */
429
+&mipi_dcphy0 {
430
+	status = "disabled";
431
+}; 
432
+ 
426433 &dsi0 {
427434 	status = "disabled";
428435 };
....@@ -432,14 +439,7 @@
432439 };
433440 
434441 &dsi0_in_vp3 {
435
-	status = "disabled";
436
-};
437
-
438
-&dsi0_panel {
439
-	power-supply = <&vcc3v3_lcd_n>;
440
-	reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
441
-	pinctrl-names = "default";
442
-	pinctrl-0 = <&lcd_rst_gpio>;
442
+	status = "okay";
443443 };
444444 
445445 /*
....@@ -493,7 +493,7 @@
493493 	/* rx_delay = <0x3f>; */
494494 
495495 	phy-handle = <&rgmii_phy>;
496
-	status = "disabled";
496
+	status = "okay";
497497 };
498498 
499499 &hdmi0 {
....@@ -524,12 +524,12 @@
524524 
525525 /* Should work with at least 128MB cma reserved above. */
526526 &hdmirx_ctrler {
527
-	status = "disabled";
527
+	status = "okay";
528528 
529529 	#sound-dai-cells = <1>;
530530 	/* Effective level used to trigger HPD: 0-low, 1-high */
531531 	hpd-trigger-level = <1>;
532
-	hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
532
+	hdmirx-det-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
533533 	pinctrl-names = "default";
534534 	pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
535535 };
....@@ -700,6 +700,12 @@
700700                 compatible = "atmel,24c256";
701701                 reg = <0x50>;
702702     };
703
+		
704
+	eeprom@53 {
705
+                //compatible = "atmel,24c02";
706
+                compatible = "atmel,24c256";
707
+                reg = <0x53>;
708
+    };
703709 #if 0
704710 	usbc0: fusb302@22 {
705711                 compatible = "fcs,fusb302";
....@@ -824,9 +830,7 @@
824830 	};
825831 };
826832 
827
-&mipi_dcphy0 {
828
-	status = "okay";
829
-};
833
+
830834 
831835 &mipi_dcphy1 {
832836 	status = "disabled";
....@@ -834,21 +838,21 @@
834838 
835839 &pcie2x1l2 {
836840 	phys = <&combphy0_ps PHY_TYPE_PCIE>;
837
-	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
841
+	reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
838842 	vpcie3v3-supply = <&vcc3v3_pcie30>;
839843 	status = "okay";
840844 };//MINIPCIE
841845 
842846 &pcie2x1l1 {
843847 	phys = <&combphy2_psu PHY_TYPE_PCIE>;
844
-	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
848
+	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
845849 	vpcie3v3-supply = <&vcc3v3_pcie30>;
846
-	status = "okay";
850
+	status = "disabled";
847851 };//M.2 WIFI6
848852 
849853 &pcie2x1l0 {
850854 	phys = <&combphy1_ps PHY_TYPE_PCIE>;
851
-	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
855
+	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;  //PCIEx1_0_PERSTn_M1_L
852856 	vpcie3v3-supply = <&vcc3v3_pcie30>;
853857 	status = "okay";
854858 };//RTL8111H
....@@ -893,13 +897,17 @@
893897 
894898 	hdmi {
895899 		hdmirx_det: hdmirx-det {
896
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
900
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
897901 		};
898902 	};
899903 
900904 	headphone {
901905 		hp_det: hp-det {
902
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
906
+			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
907
+		};
908
+		
909
+		spk_con: spk-con {
910
+			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
903911 		};
904912 	};
905913 
....@@ -911,7 +919,7 @@
911919 
912920 	lcd {
913921 		lcd_rst_gpio: lcd-rst-gpio {
914
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
922
+			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
915923 		};
916924 	};
917925 
....@@ -923,16 +931,16 @@
923931 
924932 	sdio-pwrseq {
925933 		wifi_enable_h: wifi-enable-h {
926
-			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
934
+			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
927935 		};
928936 	};
929
-
937
+/*
930938 	sdmmc {
931939 		sd_s0_pwr: sd-s0-pwr {
932940 			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
933941 		};
934942 	};
935
-
943
+*/
936944 	touch {
937945 		touch_gpio: touch-gpio {
938946 			rockchip,pins =
....@@ -954,55 +962,45 @@
954962 		};
955963 
956964 		bt_reset_gpio: bt-reset-gpio {
957
-			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
958
-		};
959
-
960
-		bt_wake_gpio: bt-wake-gpio {
961
-			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
962
-		};
963
-
964
-		bt_irq_gpio: bt-irq-gpio {
965
-			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
965
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
966966 		};
967967 	};
968
-
968
+/*
969969 	wireless-wlan {
970970 		wifi_host_wake_irq: wifi-host-wake-irq {
971
-			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
971
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
972972 		};
973973 	};
974
-	
974
+*/	
975975 	
976976 	ndj_io_init{
977977 		ndj_io_gpio: ndj_io_gpio_col{
978978 				rockchip,pins =
979
-					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
980
-					<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
981
-					<4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
982
-					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
983
-					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
979
+					<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
980
+					<4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
981
+					<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
982
+					<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
984983 					<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
985984 					<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
986
-					<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //vcc_5v
987
-					<4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B5_d_3V3
988
-					<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B6_d_3V3
989
-					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B0_u_3V3
990
-					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B2_d_3V3
991
-					<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B3_u_3V3
992
-					<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B4_u_3V3
993
-					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_A7_u_3V3
994
-					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;  //GPIO3_A0_u_3V3
995
-
985
+					<4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,  //vcc_5v				
986
+					<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_MISO_M2_1V8 41
987
+					<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI4_MISO_M2_1V8 32
988
+					<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_MOSI_M2_3V3 42
989
+					<1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI4_MOSI_M2_1V8 33
990
+					<1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_CLK_M2_1V8  43 
991
+					<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI4_CLK_M2_1V8  34
992
+					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_CS0_M2_1V8  44
993
+					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;  //SPI4_CS0_M2_1V8  35		 		
996994 		};
997995 	};
998996 };
999997 &pwm3 {
1000
-	pinctrl-0 = <&pwm3m1_pins>;
1001998 	status = "okay";
999
+	pinctrl-0 = <&pwm3m1_pins>;
10021000 };
10031001 
10041002 &route_dsi0 {
1005
-	status = "okay";
1003
+	status = "disabled";
10061004 	connect = <&vp3_out_dsi0>;
10071005 };
10081006 
....@@ -1012,8 +1010,13 @@
10121010 };
10131011 
10141012 &pwm10 {
1015
-	status = "okay";
1013
+	status = "disabled";
10161014 	pinctrl-0 = <&pwm10m2_pins>;
1015
+};
1016
+
1017
+&pwm11 {
1018
+	status = "disabled";
1019
+	pinctrl-0 = <&pwm11m3_pins>;
10171020 };
10181021 
10191022 &route_hdmi0 {
....@@ -1026,6 +1029,10 @@
10261029 
10271030 &sata0 {
10281031 	status = "disabled";
1032
+};
1033
+
1034
+&sata2 {
1035
+	status = "okay";
10291036 };
10301037 
10311038 &sdio {
....@@ -1050,14 +1057,9 @@
10501057 	vmmc-supply = <&vcc_3v3_sd_s0>;
10511058 };
10521059 
1053
-&uart9 {
1054
-	status = "okay";
1055
-	pinctrl-names = "default";
1056
-	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
1057
-};
1058
-
10591060 &u2phy0_otg {
10601061 	status = "okay";
1062
+	phy-supply = <&vcc5v0_host>;
10611063 };
10621064 
10631065 &u2phy1_otg {
....@@ -1071,7 +1073,7 @@
10711073 &u2phy3_host {
10721074 	phy-supply = <&vcc5v0_host>;
10731075 };
1074
-
1076
+#if 0
10751077 &usbdp_phy0 {
10761078 	rockchip,dp-lane-mux = <2 3>;
10771079 	status = "okay";
....@@ -1099,17 +1101,12 @@
10991101 	status = "okay";
11001102 };
11011103 
1102
-&usbdrd_dwc3_0 {
1103
-	dr_mode = "otg";
1104
-	extcon = <&u2phy0>;
1105
-	status = "okay";
1106
-};
1107
-
11081104 &usbdrd_dwc3_1 {
11091105 	dr_mode = "host";
11101106 	maximum-speed = "high-speed";
11111107 	status = "okay";
11121108 };
1109
+#endif
11131110 
11141111 &uart1 {
11151112 	status = "okay";
....@@ -1119,7 +1116,7 @@
11191116 };
11201117 
11211118 &uart3 {
1122
-	status = "okay";
1119
+	status = "disabled";
11231120 	pinctrl-names = "default";
11241121 	pinctrl-0 = <&uart3m1_xfer>;
11251122 };
....@@ -1150,7 +1147,7 @@
11501147 };
11511148 
11521149 &uart8 {
1153
-	status = "okay";
1150
+	status = "disabled";
11541151 	pinctrl-names = "default";
11551152 	pinctrl-0 = <&uart8m1_xfer>;
11561153 };
....@@ -1161,3 +1158,17 @@
11611158 	pinctrl-names = "default";
11621159 	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;	
11631160 };
1161
+
1162
+
1163
+&can0 {
1164
+	status = "okay";
1165
+	pinctrl-names = "default";
1166
+	pinctrl-0 = <&can0m0_pins>;
1167
+};
1168
+
1169
+
1170
+&can1 {
1171
+	status = "okay";
1172
+	pinctrl-names = "default";
1173
+	pinctrl-0 = <&can1m1_pins>;
1174
+};