forked from ~ljy/RK3588_XEN

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hc
2024-11-15 a46a1ad097419aeea7350987dd95230f50d90392 
 kernel/include/linux/irq.h
....@@ -16,6 +16,7 @@
1616 #include <linux/irqhandler.h>
1717 #include <linux/irqreturn.h>
1818 #include <linux/irqnr.h>
19
+#include <linux/irq_work.h>
1920 #include <linux/topology.h>
2021 #include <linux/io.h>
2122 #include <linux/slab.h>
....@@ -73,6 +74,11 @@
7374  * IRQ_DISABLE_UNLAZY		- Disable lazy irq disable
7475  * IRQ_HIDDEN			- Don't show up in /proc/interrupts
7576  * IRQ_RAW			- Skip tick management and irqtime accounting
77
+ * IRQ_OOB                      - Interrupt can be delivered to the out-of-band handler
78
+ *                                when pipelining is enabled (CONFIG_IRQ_PIPELINE),
79
+ *                                regardless of the (virtualized) interrupt state
80
+ *                                maintained by local_irq_save/disable().
81
+ * IRQ_CHAINED                  - Interrupt is chained.
7682  */
7783 enum {
7884 	IRQ_TYPE_NONE		= 0x00000000,
....@@ -101,13 +107,15 @@
101107 	IRQ_DISABLE_UNLAZY	= (1 << 19),
102108 	IRQ_HIDDEN		= (1 << 20),
103109 	IRQ_RAW			= (1 << 21),
110
+	IRQ_OOB			= (1 << 22),
111
+	IRQ_CHAINED		= (1 << 23),
104112 };
105113 
106114 #define IRQF_MODIFY_MASK	\
107115 	(IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
108116 	 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
109117 	 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \
110
-	 IRQ_IS_POLLED | IRQ_DISABLE_UNLAZY | IRQ_HIDDEN)
118
+	 IRQ_IS_POLLED | IRQ_DISABLE_UNLAZY | IRQ_HIDDEN | IRQ_OOB)
111119 
112120 #define IRQ_NO_BALANCING_MASK	(IRQ_PER_CPU | IRQ_NO_BALANCING)
113121 
....@@ -173,6 +181,7 @@
173181  *			irq_domain
174182  * @chip_data:		platform-specific per-chip private data for the chip
175183  *			methods, to allow shared chip implementations
184
+ * @move_work:		irq_work for setaffinity deferral when pipelining irqs
176185  */
177186 struct irq_data {
178187 	u32			mask;
....@@ -183,6 +192,9 @@
183192 	struct irq_domain	*domain;
184193 #ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
185194 	struct irq_data		*parent_data;
195
+#endif
196
+#if defined(CONFIG_IRQ_PIPELINE) && defined(CONFIG_GENERIC_PENDING_IRQ)
197
+	struct irq_work		move_work;
186198 #endif
187199 	void			*chip_data;
188200 };
....@@ -221,6 +233,7 @@
221233  *				  irq_chip::irq_set_affinity() when deactivated.
222234  * IRQD_IRQ_ENABLED_ON_SUSPEND	- Interrupt is enabled on suspend by irq pm if
223235  *				  irqchip have flag IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND set.
236
+ * IRQD_SETAFFINITY_BLOCKED	- Pending affinity setting on hold (IRQ_PIPELINE)
224237  */
225238 enum {
226239 	IRQD_TRIGGER_MASK		= 0xf,
....@@ -247,6 +260,7 @@
247260 	IRQD_HANDLE_ENFORCE_IRQCTX	= (1 << 28),
248261 	IRQD_AFFINITY_ON_ACTIVATE	= (1 << 29),
249262 	IRQD_IRQ_ENABLED_ON_SUSPEND	= (1 << 30),
263
+	IRQD_SETAFFINITY_BLOCKED	= (1 << 31),
250264 };
251265 
252266 #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
....@@ -254,6 +268,21 @@
254268 static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
255269 {
256270 	return __irqd_to_state(d) & IRQD_SETAFFINITY_PENDING;
271
+}
272
+
273
+static inline void irqd_set_move_blocked(struct irq_data *d)
274
+{
275
+	__irqd_to_state(d) |= IRQD_SETAFFINITY_BLOCKED;
276
+}
277
+
278
+static inline void irqd_clr_move_blocked(struct irq_data *d)
279
+{
280
+	__irqd_to_state(d) &= ~IRQD_SETAFFINITY_BLOCKED;
281
+}
282
+
283
+static inline bool irqd_is_setaffinity_blocked(struct irq_data *d)
284
+{
285
+	return irqs_pipelined() && __irqd_to_state(d) & IRQD_SETAFFINITY_BLOCKED;
257286 }
258287 
259288 static inline bool irqd_is_per_cpu(struct irq_data *d)
....@@ -570,6 +599,7 @@
570599  * IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND:  Invokes __enable_irq()/__disable_irq() for wake irqs
571600  *                                    in the suspend path if they are in disabled state
572601  * IRQCHIP_AFFINITY_PRE_STARTUP:      Default affinity update before startup
602
+ * IRQCHIP_PIPELINE_SAFE:             Chip can work in pipelined mode
573603  */
574604 enum {
575605 	IRQCHIP_SET_TYPE_MASKED			= (1 <<  0),
....@@ -583,6 +613,7 @@
583613 	IRQCHIP_SUPPORTS_NMI			= (1 <<  8),
584614 	IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND	= (1 <<  9),
585615 	IRQCHIP_AFFINITY_PRE_STARTUP		= (1 << 10),
616
+	IRQCHIP_PIPELINE_SAFE			= (1 << 11),
586617 };
587618 
588619 #include <linux/irqdesc.h>
....@@ -660,6 +691,7 @@
660691 extern void handle_percpu_devid_irq(struct irq_desc *desc);
661692 extern void handle_bad_irq(struct irq_desc *desc);
662693 extern void handle_nested_irq(unsigned int irq);
694
+extern void handle_synthetic_irq(struct irq_desc *desc);
663695 
664696 extern void handle_fasteoi_nmi(struct irq_desc *desc);
665697 extern void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc);
....@@ -813,7 +845,13 @@
813845 extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
814846 extern int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
815847 				struct msi_desc *entry);
816
-extern struct irq_data *irq_get_irq_data(unsigned int irq);
848
+
849
+static inline struct irq_data *irq_get_irq_data(unsigned int irq)
850
+{
851
+	struct irq_desc *desc = irq_to_desc(irq);
852
+
853
+	return desc ? &desc->irq_data : NULL;
854
+}
817855 
818856 static inline struct irq_chip *irq_get_chip(unsigned int irq)
819857 {
....@@ -1056,7 +1094,7 @@
10561094  * different flow mechanisms (level/edge) for it.
10571095  */
10581096 struct irq_chip_generic {
1059
-	raw_spinlock_t		lock;
1097
+	hard_spinlock_t		lock;
10601098 	void __iomem		*reg_base;
10611099 	u32			(*reg_readl)(void __iomem *addr);
10621100 	void			(*reg_writel)(u32 val, void __iomem *addr);
....@@ -1183,6 +1221,12 @@
11831221 
11841222 #define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
11851223 
1224
+#ifdef CONFIG_IRQ_PIPELINE
1225
+
1226
+int irq_switch_oob(unsigned int irq, bool on);
1227
+
1228
+#endif	/* !CONFIG_IRQ_PIPELINE */
1229
+
11861230 #ifdef CONFIG_SMP
11871231 static inline void irq_gc_lock(struct irq_chip_generic *gc)
11881232 {