~ljy/RK3588_XEN.git

..	..	@@ -95,7 +95,7 @@
95	95	#clock-cells = <0x0>;
96	96	clock-frequency = <0x29d7ab80>;
97	97	clock-output-names = "spll";
98		- phandle = <0x1ec>;
	98	+ phandle = <0x1f4>;
99	99	};
100	100
101	101	xin32k {
..	..	@@ -103,7 +103,7 @@
103	103	#clock-cells = <0x0>;
104	104	clock-frequency = <0x8000>;
105	105	clock-output-names = "xin32k";
106		- phandle = <0x1ed>;
	106	+ phandle = <0x1f5>;
107	107	};
108	108
109	109	xin24m {
..	..	@@ -111,7 +111,7 @@
111	111	#clock-cells = <0x0>;
112	112	clock-frequency = <0x16e3600>;
113	113	clock-output-names = "xin24m";
114		- phandle = <0x1ee>;
	114	+ phandle = <0x1f6>;
115	115	};
116	116
117	117	hclk_vo1@fd7c08ec {
..	..	@@ -131,7 +131,7 @@
131	131	clocks = <0x2 0x1bc>;
132	132	#power-domain-cells = <0x1>;
133	133	#clock-cells = <0x0>;
134		- phandle = <0x1ef>;
	134	+ phandle = <0x1f7>;
135	135	};
136	136
137	137	hclk_vo0@fd7c08dc {
..	..	@@ -151,7 +151,7 @@
151	151	clocks = <0x2 0x264>;
152	152	#power-domain-cells = <0x1>;
153	153	#clock-cells = <0x0>;
154		- phandle = <0x1f0>;
	154	+ phandle = <0x1f8>;
155	155	};
156	156
157	157	hclk_nvm@fd7c087c {
..	..	@@ -181,7 +181,7 @@
181	181	clocks = <0x2 0x1e1>;
182	182	#power-domain-cells = <0x1>;
183	183	#clock-cells = <0x0>;
184		- phandle = <0x1f1>;
	184	+ phandle = <0x1f9>;
185	185	};
186	186
187	187	aclk_isp1_pre@fd7c0868 {
..	..	@@ -191,7 +191,7 @@
191	191	clocks = <0x2 0x1e0>;
192	192	#power-domain-cells = <0x1>;
193	193	#clock-cells = <0x0>;
194		- phandle = <0x1f2>;
	194	+ phandle = <0x1fa>;
195	195	};
196	196
197	197	aclk_rkvdec0_pre@fd7c08a0 {
..	..	@@ -201,7 +201,7 @@
201	201	clocks = <0x2 0x1bc>;
202	202	#power-domain-cells = <0x1>;
203	203	#clock-cells = <0x0>;
204		- phandle = <0x1f3>;
	204	+ phandle = <0x1fb>;
205	205	};
206	206
207	207	hclk_rkvdec0_pre@fd7c08a0 {
..	..	@@ -211,7 +211,7 @@
211	211	clocks = <0x2 0x1be>;
212	212	#power-domain-cells = <0x1>;
213	213	#clock-cells = <0x0>;
214		- phandle = <0x1f4>;
	214	+ phandle = <0x1fc>;
215	215	};
216	216
217	217	aclk_rkvdec1_pre@fd7c08a4 {
..	..	@@ -221,7 +221,7 @@
221	221	clocks = <0x2 0x1bc>;
222	222	#power-domain-cells = <0x1>;
223	223	#clock-cells = <0x0>;
224		- phandle = <0x1f5>;
	224	+ phandle = <0x1fd>;
225	225	};
226	226
227	227	hclk_rkvdec1_pre@fd7c08a4 {
..	..	@@ -231,7 +231,7 @@
231	231	clocks = <0x2 0x1be>;
232	232	#power-domain-cells = <0x1>;
233	233	#clock-cells = <0x0>;
234		- phandle = <0x1f6>;
	234	+ phandle = <0x1fe>;
235	235	};
236	236
237	237	aclk_jpeg_decoder_pre@fd7c08b0 {
..	..	@@ -241,7 +241,7 @@
241	241	clocks = <0x2 0x1bc>;
242	242	#power-domain-cells = <0x1>;
243	243	#clock-cells = <0x0>;
244		- phandle = <0x1f7>;
	244	+ phandle = <0x1ff>;
245	245	};
246	246
247	247	aclk_rkvenc1_pre@fd7c08c0 {
..	..	@@ -251,7 +251,7 @@
251	251	clocks = <0x2 0x1c5>;
252	252	#power-domain-cells = <0x1>;
253	253	#clock-cells = <0x0>;
254		- phandle = <0x1f8>;
	254	+ phandle = <0x200>;
255	255	};
256	256
257	257	hclk_rkvenc1_pre@fd7c08c0 {
..	..	@@ -261,7 +261,7 @@
261	261	clocks = <0x2 0x1c4>;
262	262	#power-domain-cells = <0x1>;
263	263	#clock-cells = <0x0>;
264		- phandle = <0x1f9>;
	264	+ phandle = <0x201>;
265	265	};
266	266
267	267	aclk_hdcp0_pre@fd7c08dc {
..	..	@@ -271,7 +271,7 @@
271	271	clocks = <0x2 0x26c>;
272	272	#power-domain-cells = <0x1>;
273	273	#clock-cells = <0x0>;
274		- phandle = <0x1fa>;
	274	+ phandle = <0x202>;
275	275	};
276	276
277	277	aclk_hdcp1_pre@fd7c08ec {
..	..	@@ -281,7 +281,7 @@
281	281	clocks = <0x2 0x263>;
282	282	#power-domain-cells = <0x1>;
283	283	#clock-cells = <0x0>;
284		- phandle = <0x1fb>;
	284	+ phandle = <0x203>;
285	285	};
286	286
287	287	pclk_av1_pre@fd7c0910 {
..	..	@@ -291,7 +291,7 @@
291	291	clocks = <0x2 0x1be>;
292	292	#power-domain-cells = <0x1>;
293	293	#clock-cells = <0x0>;
294		- phandle = <0x1fc>;
	294	+ phandle = <0x204>;
295	295	};
296	296
297	297	aclk_av1_pre@fd7c0910 {
..	..	@@ -301,7 +301,7 @@
301	301	clocks = <0x2 0x1bc>;
302	302	#power-domain-cells = <0x1>;
303	303	#clock-cells = <0x0>;
304		- phandle = <0x1fd>;
	304	+ phandle = <0x205>;
305	305	};
306	306
307	307	hclk_sdio_pre@fd7c092c {
..	..	@@ -311,7 +311,7 @@
311	311	clocks = <0x3>;
312	312	#power-domain-cells = <0x1>;
313	313	#clock-cells = <0x0>;
314		- phandle = <0x1fe>;
	314	+ phandle = <0x206>;
315	315	};
316	316
317	317	pclk_vo0_grf@fd7c08dc {
..	..	@@ -337,7 +337,7 @@
337	337	#clock-cells = <0x0>;
338	338	clock-frequency = <0x0>;
339	339	clock-output-names = "i2s0_mclkin";
340		- phandle = <0x1ff>;
	340	+ phandle = <0x207>;
341	341	};
342	342
343	343	mclkin-i2s1 {
..	..	@@ -345,7 +345,7 @@
345	345	#clock-cells = <0x0>;
346	346	clock-frequency = <0x0>;
347	347	clock-output-names = "i2s1_mclkin";
348		- phandle = <0x200>;
	348	+ phandle = <0x208>;
349	349	};
350	350
351	351	mclkin-i2s2 {
..	..	@@ -353,7 +353,7 @@
353	353	#clock-cells = <0x0>;
354	354	clock-frequency = <0x0>;
355	355	clock-output-names = "i2s2_mclkin";
356		- phandle = <0x201>;
	356	+ phandle = <0x209>;
357	357	};
358	358
359	359	mclkin-i2s3 {
..	..	@@ -361,7 +361,7 @@
361	361	#clock-cells = <0x0>;
362	362	clock-frequency = <0x0>;
363	363	clock-output-names = "i2s3_mclkin";
364		- phandle = <0x202>;
	364	+ phandle = <0x20a>;
365	365	};
366	366
367	367	mclkout-i2s0@fd58c318 {
..	..	@@ -383,7 +383,7 @@
383	383	clock-output-names = "i2s1_mclkout_to_io";
384	384	rockchip,bit-shift = <0x1>;
385	385	rockchip,bit-set-to-disable;
386		- phandle = <0x203>;
	386	+ phandle = <0x20b>;
387	387	};
388	388
389	389	mclkout-i2s1@fd58a000 {
..	..	@@ -393,7 +393,7 @@
393	393	#clock-cells = <0x0>;
394	394	clock-output-names = "i2s1m1_mclkout_to_io";
395	395	rockchip,bit-shift = <0x6>;
396		- phandle = <0x204>;
	396	+ phandle = <0x20c>;
397	397	};
398	398
399	399	mclkout-i2s2@fd58c318 {
..	..	@@ -404,7 +404,7 @@
404	404	clock-output-names = "i2s2_mclkout_to_io";
405	405	rockchip,bit-shift = <0x2>;
406	406	rockchip,bit-set-to-disable;
407		- phandle = <0x205>;
	407	+ phandle = <0x20d>;
408	408	};
409	409
410	410	mclkout-i2s3@fd58c318 {
..	..	@@ -415,7 +415,7 @@
415	415	clock-output-names = "i2s3_mclkout_to_io";
416	416	rockchip,bit-shift = <0x7>;
417	417	rockchip,bit-set-to-disable;
418		- phandle = <0x206>;
	418	+ phandle = <0x20e>;
419	419	};
420	420	};
421	421
..	..	@@ -1420,7 +1420,7 @@
1420	1420	compatible = "arm,armv8-pmuv3";
1421	1421	interrupts = <0x1 0x7 0x8>;
1422	1422	interrupt-affinity = <0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd>;
1423		- phandle = <0x207>;
	1423	+ phandle = <0x20f>;
1424	1424	};
1425	1425
1426	1426	cpuinfo {
..	..	@@ -1435,7 +1435,7 @@
1435	1435	phys = <0x2f 0x30>;
1436	1436	phy-names = "dcphy0", "dcphy1";
1437	1437	status = "disabled";
1438		- phandle = <0x208>;
	1438	+ phandle = <0x210>;
1439	1439	};
1440	1440
1441	1441	csi2-dcphy1 {
..	..	@@ -1444,7 +1444,7 @@
1444	1444	phys = <0x2f 0x30>;
1445	1445	phy-names = "dcphy0", "dcphy1";
1446	1446	status = "disabled";
1447		- phandle = <0x209>;
	1447	+ phandle = <0x211>;
1448	1448	};
1449	1449
1450	1450	csi2-dphy0 {
..	..	@@ -1453,7 +1453,7 @@
1453	1453	phys = <0x2f 0x30>;
1454	1454	phy-names = "dcphy0", "dcphy1";
1455	1455	status = "disabled";
1456		- phandle = <0x20a>;
	1456	+ phandle = <0x212>;
1457	1457	};
1458	1458
1459	1459	csi2-dphy1 {
..	..	@@ -1462,7 +1462,7 @@
1462	1462	phys = <0x2f 0x30>;
1463	1463	phy-names = "dcphy0", "dcphy1";
1464	1464	status = "disabled";
1465		- phandle = <0x20b>;
	1465	+ phandle = <0x213>;
1466	1466	};
1467	1467
1468	1468	csi2-dphy2 {
..	..	@@ -1471,7 +1471,7 @@
1471	1471	phys = <0x2f 0x30>;
1472	1472	phy-names = "dcphy0", "dcphy1";
1473	1473	status = "disabled";
1474		- phandle = <0x20c>;
	1474	+ phandle = <0x214>;
1475	1475	};
1476	1476
1477	1477	csi2-dphy3 {
..	..	@@ -1480,7 +1480,7 @@
1480	1480	phys = <0x2f 0x30>;
1481	1481	phy-names = "dcphy0", "dcphy1";
1482	1482	status = "disabled";
1483		- phandle = <0x20d>;
	1483	+ phandle = <0x215>;
1484	1484	};
1485	1485
1486	1486	csi2-dphy4 {
..	..	@@ -1489,7 +1489,7 @@
1489	1489	phys = <0x2f 0x30>;
1490	1490	phy-names = "dcphy0", "dcphy1";
1491	1491	status = "disabled";
1492		- phandle = <0x20e>;
	1492	+ phandle = <0x216>;
1493	1493	};
1494	1494
1495	1495	csi2-dphy5 {
..	..	@@ -1498,7 +1498,7 @@
1498	1498	phys = <0x2f 0x30>;
1499	1499	phy-names = "dcphy0", "dcphy1";
1500	1500	status = "disabled";
1501		- phandle = <0x20f>;
	1501	+ phandle = <0x217>;
1502	1502	};
1503	1503
1504	1504	display-subsystem {
..	..	@@ -1506,7 +1506,7 @@
1506	1506	ports = <0x31>;
1507	1507	memory-region = <0x32>;
1508	1508	memory-region-names = "drm-logo";
1509		- phandle = <0x210>;
	1509	+ phandle = <0x218>;
1510	1510
1511	1511	route {
1512	1512
..	..	@@ -1517,7 +1517,7 @@
1517	1517	logo,mode = "center";
1518	1518	charge_logo,mode = "center";
1519	1519	connect = <0x33>;
1520		- phandle = <0x211>;
	1520	+ phandle = <0x219>;
1521	1521	};
1522	1522
1523	1523	route-dsi0 {
..	..	@@ -1527,7 +1527,7 @@
1527	1527	logo,mode = "center";
1528	1528	charge_logo,mode = "center";
1529	1529	connect = <0x34>;
1530		- phandle = <0x212>;
	1530	+ phandle = <0x21a>;
1531	1531	};
1532	1532
1533	1533	route-dsi1 {
..	..	@@ -1537,7 +1537,7 @@
1537	1537	logo,mode = "center";
1538	1538	charge_logo,mode = "center";
1539	1539	connect = <0x35>;
1540		- phandle = <0x213>;
	1540	+ phandle = <0x21b>;
1541	1541	};
1542	1542
1543	1543	route-edp0 {
..	..	@@ -1547,7 +1547,7 @@
1547	1547	logo,mode = "center";
1548	1548	charge_logo,mode = "center";
1549	1549	connect = <0x36>;
1550		- phandle = <0x214>;
	1550	+ phandle = <0x21c>;
1551	1551	};
1552	1552
1553	1553	route-edp1 {
..	..	@@ -1557,7 +1557,7 @@
1557	1557	logo,mode = "center";
1558	1558	charge_logo,mode = "center";
1559	1559	connect = <0x37>;
1560		- phandle = <0x215>;
	1560	+ phandle = <0x21d>;
1561	1561	};
1562	1562
1563	1563	route-hdmi0 {
..	..	@@ -1567,7 +1567,7 @@
1567	1567	logo,mode = "center";
1568	1568	charge_logo,mode = "center";
1569	1569	connect = <0x38>;
1570		- phandle = <0x216>;
	1570	+ phandle = <0x21e>;
1571	1571	};
1572	1572
1573	1573	route-rgb {
..	..	@@ -1577,7 +1577,7 @@
1577	1577	logo,mode = "center";
1578	1578	charge_logo,mode = "center";
1579	1579	connect = <0x39>;
1580		- phandle = <0x217>;
	1580	+ phandle = <0x21f>;
1581	1581	};
1582	1582
1583	1583	route-dp1 {
..	..	@@ -1587,7 +1587,7 @@
1587	1587	logo,mode = "center";
1588	1588	charge_logo,mode = "center";
1589	1589	connect = <0x3a>;
1590		- phandle = <0x218>;
	1590	+ phandle = <0x220>;
1591	1591	};
1592	1592
1593	1593	route-hdmi1 {
..	..	@@ -1597,7 +1597,7 @@
1597	1597	logo,mode = "center";
1598	1598	charge_logo,mode = "center";
1599	1599	connect = <0x3b>;
1600		- phandle = <0x219>;
	1600	+ phandle = <0x221>;
1601	1601	};
1602	1602	};
1603	1603	};
..	..	@@ -1617,7 +1617,7 @@
1617	1617	status = "okay";
1618	1618	center-supply = <0x3e>;
1619	1619	mem-supply = <0x3f>;
1620		- phandle = <0x21a>;
	1620	+ phandle = <0x222>;
1621	1621	};
1622	1622
1623	1623	dmc-opp-table {
..	..	@@ -1706,7 +1706,7 @@
1706	1706	arm,smc-id = <0x82000010>;
1707	1707	#address-cells = <0x1>;
1708	1708	#size-cells = <0x0>;
1709		- phandle = <0x21b>;
	1709	+ phandle = <0x223>;
1710	1710
1711	1711	protocol@14 {
1712	1712	reg = <0x14>;
..	..	@@ -1726,13 +1726,13 @@
1726	1726	sdei {
1727	1727	compatible = "arm,sdei-1.0";
1728	1728	method = "smc";
1729		- phandle = <0x21c>;
	1729	+ phandle = <0x224>;
1730	1730	};
1731	1731
1732	1732	optee {
1733	1733	compatible = "linaro,optee-tz";
1734	1734	method = "smc";
1735		- phandle = <0x21d>;
	1735	+ phandle = <0x225>;
1736	1736	};
1737	1737	};
1738	1738
..	..	@@ -1744,49 +1744,49 @@
1744	1744
1745	1745	mipi-dcphy-dummy {
1746	1746	status = "disabled";
1747		- phandle = <0x21e>;
	1747	+ phandle = <0x226>;
1748	1748	};
1749	1749
1750	1750	mipi0-csi2 {
1751	1751	compatible = "rockchip,rk3588-mipi-csi2";
1752	1752	rockchip,hw = <0x43 0x44 0x45 0x46 0x47 0x48>;
1753	1753	status = "disabled";
1754		- phandle = <0x21f>;
	1754	+ phandle = <0x227>;
1755	1755	};
1756	1756
1757	1757	mipi1-csi2 {
1758	1758	compatible = "rockchip,rk3588-mipi-csi2";
1759	1759	rockchip,hw = <0x43 0x44 0x45 0x46 0x47 0x48>;
1760	1760	status = "disabled";
1761		- phandle = <0x220>;
	1761	+ phandle = <0x228>;
1762	1762	};
1763	1763
1764	1764	mipi2-csi2 {
1765	1765	compatible = "rockchip,rk3588-mipi-csi2";
1766	1766	rockchip,hw = <0x43 0x44 0x45 0x46 0x47 0x48>;
1767	1767	status = "disabled";
1768		- phandle = <0x221>;
	1768	+ phandle = <0x229>;
1769	1769	};
1770	1770
1771	1771	mipi3-csi2 {
1772	1772	compatible = "rockchip,rk3588-mipi-csi2";
1773	1773	rockchip,hw = <0x43 0x44 0x45 0x46 0x47 0x48>;
1774	1774	status = "disabled";
1775		- phandle = <0x222>;
	1775	+ phandle = <0x22a>;
1776	1776	};
1777	1777
1778	1778	mipi4-csi2 {
1779	1779	compatible = "rockchip,rk3588-mipi-csi2";
1780	1780	rockchip,hw = <0x43 0x44 0x45 0x46 0x47 0x48>;
1781	1781	status = "disabled";
1782		- phandle = <0x223>;
	1782	+ phandle = <0x22b>;
1783	1783	};
1784	1784
1785	1785	mipi5-csi2 {
1786	1786	compatible = "rockchip,rk3588-mipi-csi2";
1787	1787	rockchip,hw = <0x43 0x44 0x45 0x46 0x47 0x48>;
1788	1788	status = "disabled";
1789		- phandle = <0x224>;
	1789	+ phandle = <0x22c>;
1790	1790	};
1791	1791
1792	1792	mpp-srv {
..	..	@@ -1814,7 +1814,7 @@
1814	1814	compatible = "rockchip,rkcif-sditf";
1815	1815	rockchip,cif = <0x4b>;
1816	1816	status = "disabled";
1817		- phandle = <0x225>;
	1817	+ phandle = <0x22d>;
1818	1818	};
1819	1819
1820	1820	rkcif-mipi-lvds {
..	..	@@ -1829,28 +1829,28 @@
1829	1829	compatible = "rockchip,rkcif-sditf";
1830	1830	rockchip,cif = <0x4c>;
1831	1831	status = "disabled";
1832		- phandle = <0x226>;
	1832	+ phandle = <0x22e>;
1833	1833	};
1834	1834
1835	1835	rkcif-mipi-lvds-sditf-vir1 {
1836	1836	compatible = "rockchip,rkcif-sditf";
1837	1837	rockchip,cif = <0x4c>;
1838	1838	status = "disabled";
1839		- phandle = <0x227>;
	1839	+ phandle = <0x22f>;
1840	1840	};
1841	1841
1842	1842	rkcif-mipi-lvds-sditf-vir2 {
1843	1843	compatible = "rockchip,rkcif-sditf";
1844	1844	rockchip,cif = <0x4c>;
1845	1845	status = "disabled";
1846		- phandle = <0x228>;
	1846	+ phandle = <0x230>;
1847	1847	};
1848	1848
1849	1849	rkcif-mipi-lvds-sditf-vir3 {
1850	1850	compatible = "rockchip,rkcif-sditf";
1851	1851	rockchip,cif = <0x4c>;
1852	1852	status = "disabled";
1853		- phandle = <0x229>;
	1853	+ phandle = <0x231>;
1854	1854	};
1855	1855
1856	1856	rkcif-mipi-lvds1 {
..	..	@@ -1865,28 +1865,28 @@
1865	1865	compatible = "rockchip,rkcif-sditf";
1866	1866	rockchip,cif = <0x4d>;
1867	1867	status = "disabled";
1868		- phandle = <0x22a>;
	1868	+ phandle = <0x232>;
1869	1869	};
1870	1870
1871	1871	rkcif-mipi-lvds1-sditf-vir1 {
1872	1872	compatible = "rockchip,rkcif-sditf";
1873	1873	rockchip,cif = <0x4d>;
1874	1874	status = "disabled";
1875		- phandle = <0x22b>;
	1875	+ phandle = <0x233>;
1876	1876	};
1877	1877
1878	1878	rkcif-mipi-lvds1-sditf-vir2 {
1879	1879	compatible = "rockchip,rkcif-sditf";
1880	1880	rockchip,cif = <0x4d>;
1881	1881	status = "disabled";
1882		- phandle = <0x22c>;
	1882	+ phandle = <0x234>;
1883	1883	};
1884	1884
1885	1885	rkcif-mipi-lvds1-sditf-vir3 {
1886	1886	compatible = "rockchip,rkcif-sditf";
1887	1887	rockchip,cif = <0x4d>;
1888	1888	status = "disabled";
1889		- phandle = <0x22d>;
	1889	+ phandle = <0x235>;
1890	1890	};
1891	1891
1892	1892	rkcif-mipi-lvds2 {
..	..	@@ -1901,28 +1901,28 @@
1901	1901	compatible = "rockchip,rkcif-sditf";
1902	1902	rockchip,cif = <0x4e>;
1903	1903	status = "disabled";
1904		- phandle = <0x22e>;
	1904	+ phandle = <0x236>;
1905	1905	};
1906	1906
1907	1907	rkcif-mipi-lvds2-sditf-vir1 {
1908	1908	compatible = "rockchip,rkcif-sditf";
1909	1909	rockchip,cif = <0x4e>;
1910	1910	status = "disabled";
1911		- phandle = <0x22f>;
	1911	+ phandle = <0x237>;
1912	1912	};
1913	1913
1914	1914	rkcif-mipi-lvds2-sditf-vir2 {
1915	1915	compatible = "rockchip,rkcif-sditf";
1916	1916	rockchip,cif = <0x4e>;
1917	1917	status = "disabled";
1918		- phandle = <0x230>;
	1918	+ phandle = <0x238>;
1919	1919	};
1920	1920
1921	1921	rkcif-mipi-lvds2-sditf-vir3 {
1922	1922	compatible = "rockchip,rkcif-sditf";
1923	1923	rockchip,cif = <0x4e>;
1924	1924	status = "disabled";
1925		- phandle = <0x231>;
	1925	+ phandle = <0x239>;
1926	1926	};
1927	1927
1928	1928	rkcif-mipi-lvds3 {
..	..	@@ -1937,98 +1937,98 @@
1937	1937	compatible = "rockchip,rkcif-sditf";
1938	1938	rockchip,cif = <0x4f>;
1939	1939	status = "disabled";
1940		- phandle = <0x232>;
	1940	+ phandle = <0x23a>;
1941	1941	};
1942	1942
1943	1943	rkcif-mipi-lvds3-sditf-vir1 {
1944	1944	compatible = "rockchip,rkcif-sditf";
1945	1945	rockchip,cif = <0x4f>;
1946	1946	status = "disabled";
1947		- phandle = <0x233>;
	1947	+ phandle = <0x23b>;
1948	1948	};
1949	1949
1950	1950	rkcif-mipi-lvds3-sditf-vir2 {
1951	1951	compatible = "rockchip,rkcif-sditf";
1952	1952	rockchip,cif = <0x4f>;
1953	1953	status = "disabled";
1954		- phandle = <0x234>;
	1954	+ phandle = <0x23c>;
1955	1955	};
1956	1956
1957	1957	rkcif-mipi-lvds3-sditf-vir3 {
1958	1958	compatible = "rockchip,rkcif-sditf";
1959	1959	rockchip,cif = <0x4f>;
1960	1960	status = "disabled";
1961		- phandle = <0x235>;
	1961	+ phandle = <0x23d>;
1962	1962	};
1963	1963
1964	1964	rkisp0-vir0 {
1965	1965	compatible = "rockchip,rkisp-vir";
1966	1966	rockchip,hw = <0x50>;
1967	1967	status = "disabled";
1968		- phandle = <0x236>;
	1968	+ phandle = <0x23e>;
1969	1969	};
1970	1970
1971	1971	rkisp0-vir1 {
1972	1972	compatible = "rockchip,rkisp-vir";
1973	1973	rockchip,hw = <0x50>;
1974	1974	status = "disabled";
1975		- phandle = <0x237>;
	1975	+ phandle = <0x23f>;
1976	1976	};
1977	1977
1978	1978	rkisp0-vir2 {
1979	1979	compatible = "rockchip,rkisp-vir";
1980	1980	rockchip,hw = <0x50>;
1981	1981	status = "disabled";
1982		- phandle = <0x238>;
	1982	+ phandle = <0x240>;
1983	1983	};
1984	1984
1985	1985	rkisp0-vir3 {
1986	1986	compatible = "rockchip,rkisp-vir";
1987	1987	rockchip,hw = <0x50>;
1988	1988	status = "disabled";
1989		- phandle = <0x239>;
	1989	+ phandle = <0x241>;
1990	1990	};
1991	1991
1992	1992	rkisp1-vir0 {
1993	1993	compatible = "rockchip,rkisp-vir";
1994	1994	rockchip,hw = <0x51>;
1995	1995	status = "disabled";
1996		- phandle = <0x23a>;
	1996	+ phandle = <0x242>;
1997	1997	};
1998	1998
1999	1999	rkisp1-vir1 {
2000	2000	compatible = "rockchip,rkisp-vir";
2001	2001	rockchip,hw = <0x51>;
2002	2002	status = "disabled";
2003		- phandle = <0x23b>;
	2003	+ phandle = <0x243>;
2004	2004	};
2005	2005
2006	2006	rkisp1-vir2 {
2007	2007	compatible = "rockchip,rkisp-vir";
2008	2008	rockchip,hw = <0x51>;
2009	2009	status = "disabled";
2010		- phandle = <0x23c>;
	2010	+ phandle = <0x244>;
2011	2011	};
2012	2012
2013	2013	rkisp1-vir3 {
2014	2014	compatible = "rockchip,rkisp-vir";
2015	2015	rockchip,hw = <0x51>;
2016	2016	status = "disabled";
2017		- phandle = <0x23d>;
	2017	+ phandle = <0x245>;
2018	2018	};
2019	2019
2020	2020	rkispp0-vir0 {
2021	2021	compatible = "rockchip,rk3588-rkispp-vir";
2022	2022	rockchip,hw = <0x52>;
2023	2023	status = "disabled";
2024		- phandle = <0x23e>;
	2024	+ phandle = <0x246>;
2025	2025	};
2026	2026
2027	2027	rkispp1-vir0 {
2028	2028	compatible = "rockchip,rk3588-rkispp-vir";
2029	2029	rockchip,hw = <0x53>;
2030	2030	status = "disabled";
2031		- phandle = <0x23f>;
	2031	+ phandle = <0x247>;
2032	2032	};
2033	2033
2034	2034	rkvenc-ccu {
..	..	@@ -2043,24 +2043,24 @@
2043	2043	rockchip,sleep-debug-en = <0x1>;
2044	2044	rockchip,sleep-mode-config = <0x1000608>;
2045	2045	rockchip,wakeup-config = <0x100>;
2046		- phandle = <0x240>;
	2046	+ phandle = <0x248>;
2047	2047	};
2048	2048
2049	2049	rockchip-system-monitor {
2050	2050	compatible = "rockchip,system-monitor";
2051	2051	rockchip,thermal-zone = "soc-thermal";
2052		- phandle = <0x241>;
	2052	+ phandle = <0x249>;
2053	2053	};
2054	2054
2055	2055	thermal-zones {
2056		- phandle = <0x242>;
	2056	+ phandle = <0x24a>;
2057	2057
2058	2058	soc-thermal {
2059	2059	polling-delay-passive = <0x14>;
2060	2060	polling-delay = <0x3e8>;
2061	2061	sustainable-power = <0x834>;
2062	2062	thermal-sensors = <0x54 0x0>;
2063		- phandle = <0x243>;
	2063	+ phandle = <0x24b>;
2064	2064
2065	2065	trips {
2066	2066
..	..	@@ -2068,7 +2068,7 @@
2068	2068	temperature = <0x124f8>;
2069	2069	hysteresis = <0x7d0>;
2070	2070	type = "passive";
2071		- phandle = <0x244>;
	2071	+ phandle = <0x24c>;
2072	2072	};
2073	2073
2074	2074	trip-point-1 {
..	..	@@ -2082,7 +2082,7 @@
2082	2082	temperature = <0x1c138>;
2083	2083	hysteresis = <0x7d0>;
2084	2084	type = "critical";
2085		- phandle = <0x245>;
	2085	+ phandle = <0x24d>;
2086	2086	};
2087	2087	};
2088	2088
..	..	@@ -2118,42 +2118,42 @@
2118	2118	polling-delay-passive = <0x14>;
2119	2119	polling-delay = <0x3e8>;
2120	2120	thermal-sensors = <0x54 0x1>;
2121		- phandle = <0x246>;
	2121	+ phandle = <0x24e>;
2122	2122	};
2123	2123
2124	2124	bigcore1-thermal {
2125	2125	polling-delay-passive = <0x14>;
2126	2126	polling-delay = <0x3e8>;
2127	2127	thermal-sensors = <0x54 0x2>;
2128		- phandle = <0x247>;
	2128	+ phandle = <0x24f>;
2129	2129	};
2130	2130
2131	2131	littlecore-thermal {
2132	2132	polling-delay-passive = <0x14>;
2133	2133	polling-delay = <0x3e8>;
2134	2134	thermal-sensors = <0x54 0x3>;
2135		- phandle = <0x248>;
	2135	+ phandle = <0x250>;
2136	2136	};
2137	2137
2138	2138	center-thermal {
2139	2139	polling-delay-passive = <0x14>;
2140	2140	polling-delay = <0x3e8>;
2141	2141	thermal-sensors = <0x54 0x4>;
2142		- phandle = <0x249>;
	2142	+ phandle = <0x251>;
2143	2143	};
2144	2144
2145	2145	gpu-thermal {
2146	2146	polling-delay-passive = <0x14>;
2147	2147	polling-delay = <0x3e8>;
2148	2148	thermal-sensors = <0x54 0x5>;
2149		- phandle = <0x24a>;
	2149	+ phandle = <0x252>;
2150	2150	};
2151	2151
2152	2152	npu-thermal {
2153	2153	polling-delay-passive = <0x14>;
2154	2154	polling-delay = <0x3e8>;
2155	2155	thermal-sensors = <0x54 0x6>;
2156		- phandle = <0x24b>;
	2156	+ phandle = <0x253>;
2157	2157	};
2158	2158	};
2159	2159
..	..	@@ -2371,7 +2371,7 @@
2371	2371	#size-cells = <0x2>;
2372	2372	ranges;
2373	2373	status = "okay";
2374		- phandle = <0x24c>;
	2374	+ phandle = <0x254>;
2375	2375
2376	2376	usb@fc000000 {
2377	2377	compatible = "snps,dwc3";
..	..	@@ -2394,7 +2394,7 @@
2394	2394	snps,parkmode-disable-ss-quirk;
2395	2395	quirk-skip-phy-init;
2396	2396	status = "okay";
2397		- phandle = <0x24d>;
	2397	+ phandle = <0x255>;
2398	2398	};
2399	2399	};
2400	2400
..	..	@@ -2409,7 +2409,7 @@
2409	2409	phy-names = "usb2-phy";
2410	2410	power-domains = <0x57 0x1f>;
2411	2411	status = "okay";
2412		- phandle = <0x24e>;
	2412	+ phandle = <0x256>;
2413	2413	};
2414	2414
2415	2415	usb@fc840000 {
..	..	@@ -2436,7 +2436,7 @@
2436	2436	phy-names = "usb2-phy";
2437	2437	power-domains = <0x57 0x1f>;
2438	2438	status = "okay";
2439		- phandle = <0x24f>;
	2439	+ phandle = <0x257>;
2440	2440	};
2441	2441
2442	2442	usb@fc8c0000 {
..	..	@@ -2459,7 +2459,7 @@
2459	2459	interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
2460	2460	#iommu-cells = <0x1>;
2461	2461	status = "disabled";
2462		- phandle = <0x250>;
	2462	+ phandle = <0x258>;
2463	2463	};
2464	2464
2465	2465	iommu@fcb00000 {
..	..	@@ -2469,7 +2469,7 @@
2469	2469	interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
2470	2470	#iommu-cells = <0x1>;
2471	2471	status = "disabled";
2472		- phandle = <0x251>;
	2472	+ phandle = <0x259>;
2473	2473	};
2474	2474
2475	2475	usbhost3_0 {
..	..	@@ -2480,7 +2480,7 @@
2480	2480	#size-cells = <0x2>;
2481	2481	ranges;
2482	2482	status = "okay";
2483		- phandle = <0x252>;
	2483	+ phandle = <0x25a>;
2484	2484
2485	2485	usb@fcd00000 {
2486	2486	compatible = "snps,dwc3";
..	..	@@ -2500,14 +2500,14 @@
2500	2500	snps,parkmode-disable-hs-quirk;
2501	2501	snps,parkmode-disable-ss-quirk;
2502	2502	status = "okay";
2503		- phandle = <0x253>;
	2503	+ phandle = <0x25b>;
2504	2504	};
2505	2505	};
2506	2506
2507	2507	syscon@fd588000 {
2508	2508	compatible = "rockchip,rk3588-pmu0-grf", "syscon", "simple-mfd";
2509	2509	reg = <0x0 0xfd588000 0x0 0x2000>;
2510		- phandle = <0x254>;
	2510	+ phandle = <0x25c>;
2511	2511
2512	2512	reboot-mode {
2513	2513	compatible = "syscon-reboot-mode";
..	..	@@ -2522,7 +2522,7 @@
2522	2522	mode-panic = <0x5242c307>;
2523	2523	mode-watchdog = <0x5242c308>;
2524	2524	mode-quiescent = <0x5242c30e>;
2525		- phandle = <0x255>;
	2525	+ phandle = <0x25d>;
2526	2526	};
2527	2527	};
2528	2528
..	..	@@ -2542,7 +2542,7 @@
2542	2542	pinctrl-names = "default";
2543	2543	pinctrl-0 = <0x67>;
2544	2544	status = "disabled";
2545		- phandle = <0x256>;
	2545	+ phandle = <0x25e>;
2546	2546
2547	2547	ports {
2548	2548	#address-cells = <0x1>;
..	..	@@ -2697,7 +2697,7 @@
2697	2697	reg = <0x0 0xfd5d8000 0x0 0x4000>;
2698	2698	#address-cells = <0x1>;
2699	2699	#size-cells = <0x1>;
2700		- phandle = <0x257>;
	2700	+ phandle = <0x25f>;
2701	2701
2702	2702	usb2-phy@8000 {
2703	2703	compatible = "rockchip,rk3588-usb2phy";
..	..	@@ -2726,7 +2726,7 @@
2726	2726	reg = <0x0 0xfd5dc000 0x0 0x4000>;
2727	2727	#address-cells = <0x1>;
2728	2728	#size-cells = <0x1>;
2729		- phandle = <0x258>;
	2729	+ phandle = <0x260>;
2730	2730
2731	2731	usb2-phy@c000 {
2732	2732	compatible = "rockchip,rk3588-usb2phy";
..	..	@@ -2796,7 +2796,7 @@
2796	2796	#address-cells = <0x1>;
2797	2797	#size-cells = <0x0>;
2798	2798	status = "okay";
2799		- phandle = <0x259>;
	2799	+ phandle = <0x261>;
2800	2800
2801	2801	rk8602@42 {
2802	2802	compatible = "rockchip,rk8602";
..	..	@@ -2849,7 +2849,7 @@
2849	2849	pinctrl-names = "default";
2850	2850	pinctrl-0 = <0x70>;
2851	2851	status = "disabled";
2852		- phandle = <0x25a>;
	2852	+ phandle = <0x262>;
2853	2853	};
2854	2854
2855	2855	pwm@fd8b0000 {
..	..	@@ -2862,7 +2862,7 @@
2862	2862	clocks = <0x2 0x2a5 0x2 0x2a4>;
2863	2863	clock-names = "pwm", "pclk";
2864	2864	status = "disabled";
2865		- phandle = <0x25b>;
	2865	+ phandle = <0x263>;
2866	2866	};
2867	2867
2868	2868	pwm@fd8b0010 {
..	..	@@ -2875,7 +2875,7 @@
2875	2875	clocks = <0x2 0x2a5 0x2 0x2a4>;
2876	2876	clock-names = "pwm", "pclk";
2877	2877	status = "disabled";
2878		- phandle = <0x25c>;
	2878	+ phandle = <0x264>;
2879	2879	};
2880	2880
2881	2881	pwm@fd8b0020 {
..	..	@@ -2888,7 +2888,7 @@
2888	2888	clocks = <0x2 0x2a5 0x2 0x2a4>;
2889	2889	clock-names = "pwm", "pclk";
2890	2890	status = "disabled";
2891		- phandle = <0x25d>;
	2891	+ phandle = <0x265>;
2892	2892	};
2893	2893
2894	2894	pwm@fd8b0030 {
..	..	@@ -2901,7 +2901,7 @@
2901	2901	clocks = <0x2 0x2a5 0x2 0x2a4>;
2902	2902	clock-names = "pwm", "pclk";
2903	2903	status = "okay";
2904		- phandle = <0x1c5>;
	2904	+ phandle = <0x1ce>;
2905	2905	};
2906	2906
2907	2907	power-management@fd8d8000 {
..	..	@@ -3180,7 +3180,7 @@
3180	3180	status = "okay";
3181	3181	rknpu-supply = <0xa6>;
3182	3182	mem-supply = <0xa6>;
3183		- phandle = <0x25e>;
	3183	+ phandle = <0x266>;
3184	3184	};
3185	3185
3186	3186	npu-opp-table {
..	..	@@ -3378,7 +3378,7 @@
3378	3378	rockchip,resetgroup-node = <0x0>;
3379	3379	power-domains = <0x57 0x15>;
3380	3380	status = "okay";
3381		- phandle = <0x25f>;
	3381	+ phandle = <0x267>;
3382	3382	};
3383	3383
3384	3384	vdpu@fdb50400 {
..	..	@@ -3401,7 +3401,7 @@
3401	3401	rockchip,resetgroup-node = <0x0>;
3402	3402	power-domains = <0x57 0x15>;
3403	3403	status = "okay";
3404		- phandle = <0x260>;
	3404	+ phandle = <0x268>;
3405	3405	};
3406	3406
3407	3407	iommu@fdb50800 {
..	..	@@ -3437,7 +3437,7 @@
3437	3437	rockchip,taskqueue-node = <0x0>;
3438	3438	rockchip,resetgroup-node = <0x0>;
3439	3439	status = "okay";
3440		- phandle = <0x261>;
	3440	+ phandle = <0x269>;
3441	3441	};
3442	3442
3443	3443	rga@fdb60000 {
..	..	@@ -3450,7 +3450,7 @@
3450	3450	power-domains = <0x57 0x16>;
3451	3451	iommus = <0xac>;
3452	3452	status = "okay";
3453		- phandle = <0x262>;
	3453	+ phandle = <0x26a>;
3454	3454	};
3455	3455
3456	3456	iommu@fdb60f00 {
..	..	@@ -3476,7 +3476,7 @@
3476	3476	power-domains = <0x57 0x1e>;
3477	3477	iommus = <0xad>;
3478	3478	status = "okay";
3479		- phandle = <0x263>;
	3479	+ phandle = <0x26b>;
3480	3480	};
3481	3481
3482	3482	iommu@fdb70f00 {
..	..	@@ -3501,7 +3501,7 @@
3501	3501	clock-names = "aclk_rga2", "hclk_rga2", "clk_rga2";
3502	3502	power-domains = <0x57 0x15>;
3503	3503	status = "okay";
3504		- phandle = <0x264>;
	3504	+ phandle = <0x26c>;
3505	3505	};
3506	3506
3507	3507	jpegd@fdb90000 {
..	..	@@ -3522,7 +3522,7 @@
3522	3522	rockchip,taskqueue-node = <0x1>;
3523	3523	power-domains = <0x57 0x15>;
3524	3524	status = "okay";
3525		- phandle = <0x265>;
	3525	+ phandle = <0x26d>;
3526	3526	};
3527	3527
3528	3528	iommu@fdb90480 {
..	..	@@ -3558,7 +3558,7 @@
3558	3558	rockchip,ccu = <0xb0>;
3559	3559	power-domains = <0x57 0x15>;
3560	3560	status = "okay";
3561		- phandle = <0x266>;
	3561	+ phandle = <0x26e>;
3562	3562	};
3563	3563
3564	3564	iommu@fdba0800 {
..	..	@@ -3594,7 +3594,7 @@
3594	3594	rockchip,ccu = <0xb0>;
3595	3595	power-domains = <0x57 0x15>;
3596	3596	status = "okay";
3597		- phandle = <0x267>;
	3597	+ phandle = <0x26f>;
3598	3598	};
3599	3599
3600	3600	iommu@fdba4800 {
..	..	@@ -3630,7 +3630,7 @@
3630	3630	rockchip,ccu = <0xb0>;
3631	3631	power-domains = <0x57 0x15>;
3632	3632	status = "okay";
3633		- phandle = <0x268>;
	3633	+ phandle = <0x270>;
3634	3634	};
3635	3635
3636	3636	iommu@fdba8800 {
..	..	@@ -3666,7 +3666,7 @@
3666	3666	rockchip,ccu = <0xb0>;
3667	3667	power-domains = <0x57 0x15>;
3668	3668	status = "okay";
3669		- phandle = <0x269>;
	3669	+ phandle = <0x271>;
3670	3670	};
3671	3671
3672	3672	iommu@fdbac800 {
..	..	@@ -3701,7 +3701,7 @@
3701	3701	rockchip,taskqueue-node = <0x6>;
3702	3702	iommus = <0xb4>;
3703	3703	status = "okay";
3704		- phandle = <0x26a>;
	3704	+ phandle = <0x272>;
3705	3705	};
3706	3706
3707	3707	iommu@fdbb0800 {
..	..	@@ -3740,7 +3740,7 @@
3740	3740	status = "okay";
3741	3741	venc-supply = <0xb8>;
3742	3742	mem-supply = <0xb8>;
3743		- phandle = <0x26b>;
	3743	+ phandle = <0x273>;
3744	3744	};
3745	3745
3746	3746	iommu@fdbdf000 {
..	..	@@ -3782,7 +3782,7 @@
3782	3782	status = "okay";
3783	3783	venc-supply = <0xb8>;
3784	3784	mem-supply = <0xb8>;
3785		- phandle = <0x26c>;
	3785	+ phandle = <0x274>;
3786	3786	};
3787	3787
3788	3788	iommu@fdbef000 {
..	..	@@ -3862,7 +3862,7 @@
3862	3862	rockchip,rcb-min-width = <0x200>;
3863	3863	power-domains = <0x57 0xe>;
3864	3864	status = "okay";
3865		- phandle = <0x26d>;
	3865	+ phandle = <0x275>;
3866	3866	};
3867	3867
3868	3868	iommu@fdc38700 {
..	..	@@ -3908,7 +3908,7 @@
3908	3908	rockchip,rcb-min-width = <0x200>;
3909	3909	power-domains = <0x57 0xf>;
3910	3910	status = "okay";
3911		- phandle = <0x26e>;
	3911	+ phandle = <0x276>;
3912	3912	};
3913	3913
3914	3914	iommu@fdc48700 {
..	..	@@ -3946,7 +3946,7 @@
3946	3946	rockchip,taskqueue-node = <0xb>;
3947	3947	power-domains = <0x57 0x17>;
3948	3948	status = "disabled";
3949		- phandle = <0x26f>;
	3949	+ phandle = <0x277>;
3950	3950	};
3951	3951
3952	3952	iommu@fdca0000 {
..	..	@@ -3972,7 +3972,7 @@
3972	3972	power-domains = <0x57 0x1c>;
3973	3973	iommus = <0xc3>;
3974	3974	status = "disabled";
3975		- phandle = <0x270>;
	3975	+ phandle = <0x278>;
3976	3976	};
3977	3977
3978	3978	rkisp@fdcb0000 {
..	..	@@ -4238,7 +4238,7 @@
4238	4238	rockchip,vo1-grf = <0xcc>;
4239	4239	rockchip,pmu = <0xcd>;
4240	4240	status = "okay";
4241		- phandle = <0x271>;
	4241	+ phandle = <0x279>;
4242	4242
4243	4243	ports {
4244	4244	#address-cells = <0x1>;
..	..	@@ -4251,7 +4251,7 @@
4251	4251	reg = <0x0>;
4252	4252	rockchip,plane-mask = <0x5>;
4253	4253	rockchip,primary-plane = <0x2>;
4254		- phandle = <0x272>;
	4254	+ phandle = <0x27a>;
4255	4255
4256	4256	endpoint@0 {
4257	4257	reg = <0x0>;
..	..	@@ -4296,7 +4296,7 @@
4296	4296	reg = <0x1>;
4297	4297	rockchip,plane-mask = <0xa>;
4298	4298	rockchip,primary-plane = <0x3>;
4299		- phandle = <0x273>;
	4299	+ phandle = <0x27b>;
4300	4300
4301	4301	endpoint@0 {
4302	4302	reg = <0x0>;
..	..	@@ -4343,7 +4343,7 @@
4343	4343	assigned-clock-parents = <0x2 0x4>;
4344	4344	rockchip,plane-mask = <0x140>;
4345	4345	rockchip,primary-plane = <0x8>;
4346		- phandle = <0x274>;
	4346	+ phandle = <0x27c>;
4347	4347
4348	4348	endpoint@0 {
4349	4349	reg = <0x0>;
..	..	@@ -4400,7 +4400,7 @@
4400	4400	reg = <0x3>;
4401	4401	rockchip,plane-mask = <0x280>;
4402	4402	rockchip,primary-plane = <0x9>;
4403		- phandle = <0x275>;
	4403	+ phandle = <0x27d>;
4404	4404
4405	4405	endpoint@0 {
4406	4406	reg = <0x0>;
..	..	@@ -4450,7 +4450,7 @@
4450	4450	power-domains = <0x57 0x19>;
4451	4451	#sound-dai-cells = <0x0>;
4452	4452	status = "disabled";
4453		- phandle = <0x1cd>;
	4453	+ phandle = <0x1d6>;
4454	4454	};
4455	4455
4456	4456	i2s@fddc0000 {
..	..	@@ -4469,7 +4469,7 @@
4469	4469	rockchip,playback-only;
4470	4470	#sound-dai-cells = <0x0>;
4471	4471	status = "disabled";
4472		- phandle = <0x276>;
	4472	+ phandle = <0x27e>;
4473	4473	};
4474	4474
4475	4475	spdif-tx@fdde0000 {
..	..	@@ -4485,7 +4485,7 @@
4485	4485	power-domains = <0x57 0x1a>;
4486	4486	#sound-dai-cells = <0x0>;
4487	4487	status = "disabled";
4488		- phandle = <0x277>;
	4488	+ phandle = <0x27f>;
4489	4489	};
4490	4490
4491	4491	i2s@fddf0000 {
..	..	@@ -4506,7 +4506,7 @@
4506	4506	rockchip,playback-only;
4507	4507	#sound-dai-cells = <0x0>;
4508	4508	status = "okay";
4509		- phandle = <0x1c9>;
	4509	+ phandle = <0x1d2>;
4510	4510	};
4511	4511
4512	4512	i2s@fddfc000 {
..	..	@@ -4525,7 +4525,7 @@
4525	4525	rockchip,capture-only;
4526	4526	#sound-dai-cells = <0x0>;
4527	4527	status = "disabled";
4528		- phandle = <0x278>;
	4528	+ phandle = <0x280>;
4529	4529	};
4530	4530
4531	4531	spdif-rx@fde08000 {
..	..	@@ -4543,7 +4543,7 @@
4543	4543	reset-names = "spdifrx-m";
4544	4544	#sound-dai-cells = <0x0>;
4545	4545	status = "disabled";
4546		- phandle = <0x279>;
	4546	+ phandle = <0x281>;
4547	4547	};
4548	4548
4549	4549	dsi@fde20000 {
..	..	@@ -4561,7 +4561,7 @@
4561	4561	#address-cells = <0x1>;
4562	4562	#size-cells = <0x0>;
4563	4563	status = "disabled";
4564		- phandle = <0x27a>;
	4564	+ phandle = <0x282>;
4565	4565
4566	4566	ports {
4567	4567	#address-cells = <0x1>;
..	..	@@ -4571,7 +4571,7 @@
4571	4571	reg = <0x0>;
4572	4572	#address-cells = <0x1>;
4573	4573	#size-cells = <0x0>;
4574		- phandle = <0x27b>;
	4574	+ phandle = <0x283>;
4575	4575
4576	4576	endpoint@0 {
4577	4577	reg = <0x0>;
..	..	@@ -4583,7 +4583,7 @@
4583	4583	endpoint@1 {
4584	4584	reg = <0x1>;
4585	4585	remote-endpoint = <0x34>;
4586		- status = "okay";
	4586	+ status = "disabled";
4587	4587	phandle = <0xe2>;
4588	4588	};
4589	4589	};
..	..	@@ -4614,11 +4614,11 @@
4614	4614	dsi,lanes = <0x4>;
4615	4615	panel-init-sequence = <0x390004ff 0x98810315 0x20100 0x15000202 0x150002 0x3531500 0x204d315 0x20500 0x15000206 0xd150002 0x7081500 0x2080015 0x20900 0x1500020a 0x150002 0xb001500 0x20c0015 0x20d00 0x1500020e 0x150002 0xf281500 0x2102815 0x21100 0x15000212 0x150002 0x13001500 0x2140015 0x21500 0x15000216 0x150002 0x17001500 0x2180015 0x21900 0x1500021a 0x150002 0x1b001500 0x21c0015 0x21d00 0x1500021e 0x40150002 0x1f801500 0x2200615 0x22101 0x15000222 0x150002 0x23001500 0x2240015 0x22500 0x15000226 0x150002 0x27001500 0x2283315 0x22933 0x1500022a 0x150002 0x2b001500 0x22c0015 0x22d00 0x1500022e 0x150002 0x2f001500 0x2300015 0x23100 0x15000232 0x150002 0x33001500 0x2340315 0x23500 0x15000236 0x150002 0x37001500 0x2389615 0x23900 0x1500023a 0x150002 0x3b001500 0x23c0015 0x23d00 0x1500023e 0x150002 0x3f001500 0x2400015 0x24100 0x15000242 0x150002 0x43001500 0x2440015 0x25000 0x15000251 0x23150002 0x52451500 0x2536715 0x25489 0x15000255 0xab150002 0x56011500 0x2572315 0x25845 0x15000259 0x67150002 0x5a891500 0x25bab15 0x25ccd 0x1500025d 0xef150002 0x5e001500 0x25f0815 0x26008 0x15000261 0x6150002 0x62061500 0x2630115 0x26401 0x15000265 0x150002 0x66001500 0x2670215 0x26815 0x15000269 0x15150002 0x6a141500 0x26b1415 0x26c0d 0x1500026d 0xd150002 0x6e0c1500 0x26f0c15 0x2700f 0x15000271 0xf150002 0x720e1500 0x2730e15 0x27402 0x15000275 0x8150002 0x76081500 0x2770615 0x27806 0x15000279 0x1150002 0x7a011500 0x27b0015 0x27c00 0x1500027d 0x2150002 0x7e151500 0x27f1515 0x28014 0x15000281 0x14150002 0x820d1500 0x2830d15 0x2840c 0x15000285 0xc150002 0x860f1500 0x2870f15 0x2880e 0x15000289 0xe150002 0x8a023900 0x4ff9881 0x4150002 0xc53a1500 0x26e2b15 0x26f37 0x1500023a 0x24150002 0x8d1a1500 0x287ba15 0x2b2d1 0x15000288 0xb150002 0x38011500 0x2390015 0x2b502 0x15000231 0x25150002 0x3b983900 0x4ff9881 0x1150002 0x220a1500 0x2310015 0x2533d 0x15000255 0x3d150002 0x50851500 0x2518015 0x26006 0x15000262 0x20150002 0xa0001500 0x2a12115 0x2a235 0x150002a3 0x19150002 0xa41e1500 0x2a53315 0x2a627 0x150002a7 0x26150002 0xa8af1500 0x2a91b15 0x2aa27 0x150002ab 0x8d150002 0xac1a1500 0x2ad1b15 0x2ae50 0x150002af 0x26150002 0xb02b1500 0x2b15415 0x2b25e 0x150002b3 0x23150002 0xc0001500 0x2c12115 0x2c235 0x150002c3 0x19150002 0xc41e1500 0x2c53315 0x2c627 0x150002c7 0x26150002 0xc8af1500 0x2c91b15 0x2ca27 0x150002cb 0x8d150002 0xcc1a1500 0x2cd1b15 0x2ce50 0x150002cf 0x26150002 0xd02b1500 0x2d15415 0x2d25e 0x150002d3 0x23390004 0xff988100 0x15780111 0x15050129>;
4616	4616	panel-exit-sequence = <0x5000128 0x5000110>;
4617		- phandle = <0x27c>;
	4617	+ phandle = <0x284>;
4618	4618
4619	4619	display-timings {
4620	4620	native-mode = <0xea>;
4621		- phandle = <0x27d>;
	4621	+ phandle = <0x285>;
4622	4622
4623	4623	timing0 {
4624	4624	clock-frequency = <0x41cdb40>;
..	..	@@ -4669,7 +4669,7 @@
4669	4669	#address-cells = <0x1>;
4670	4670	#size-cells = <0x0>;
4671	4671	status = "disabled";
4672		- phandle = <0x27e>;
	4672	+ phandle = <0x286>;
4673	4673
4674	4674	ports {
4675	4675	#address-cells = <0x1>;
..	..	@@ -4679,7 +4679,7 @@
4679	4679	reg = <0x0>;
4680	4680	#address-cells = <0x1>;
4681	4681	#size-cells = <0x0>;
4682		- phandle = <0x27f>;
	4682	+ phandle = <0x287>;
4683	4683
4684	4684	endpoint@0 {
4685	4685	reg = <0x0>;
..	..	@@ -4722,11 +4722,11 @@
4722	4722	panel-init-sequence = [23 00 02 fe 21 23 00 02 04 00 23 00 02 00 64 23 00 02 2a 00 23 00 02 26 64 23 00 02 54 00 23 00 02 50 64 23 00 02 7b 00 23 00 02 77 64 23 00 02 a2 00 23 00 02 9d 64 23 00 02 c9 00 23 00 02 c5 64 23 00 02 01 71 23 00 02 27 71 23 00 02 51 71 23 00 02 78 71 23 00 02 9e 71 23 00 02 c6 71 23 00 02 02 89 23 00 02 28 89 23 00 02 52 89 23 00 02 79 89 23 00 02 9f 89 23 00 02 c7 89 23 00 02 03 9e 23 00 02 29 9e 23 00 02 53 9e 23 00 02 7a 9e 23 00 02 a0 9e 23 00 02 c8 9e 23 00 02 09 00 23 00 02 05 b0 23 00 02 31 00 23 00 02 2b b0 23 00 02 5a 00 23 00 02 55 b0 23 00 02 80 00 23 00 02 7c b0 23 00 02 a7 00 23 00 02 a3 b0 23 00 02 ce 00 23 00 02 ca b0 23 00 02 06 c0 23 00 02 2d c0 23 00 02 56 c0 23 00 02 7d c0 23 00 02 a4 c0 23 00 02 cb c0 23 00 02 07 cf 23 00 02 2f cf 23 00 02 58 cf 23 00 02 7e cf 23 00 02 a5 cf 23 00 02 cc cf 23 00 02 08 dd 23 00 02 30 dd 23 00 02 59 dd 23 00 02 7f dd 23 00 02 a6 dd 23 00 02 cd dd 23 00 02 0e 15 23 00 02 0a e9 23 00 02 36 15 23 00 02 32 e9 23 00 02 5f 15 23 00 02 5b e9 23 00 02 85 15 23 00 02 81 e9 23 00 02 ad 15 23 00 02 a9 e9 23 00 02 d3 15 23 00 02 cf e9 23 00 02 0b 14 23 00 02 33 14 23 00 02 5c 14 23 00 02 82 14 23 00 02 aa 14 23 00 02 d0 14 23 00 02 0c 36 23 00 02 34 36 23 00 02 5d 36 23 00 02 83 36 23 00 02 ab 36 23 00 02 d1 36 23 00 02 0d 6b 23 00 02 35 6b 23 00 02 5e 6b 23 00 02 84 6b 23 00 02 ac 6b 23 00 02 d2 6b 23 00 02 13 5a 23 00 02 0f 94 23 00 02 3b 5a 23 00 02 37 94 23 00 02 64 5a 23 00 02 60 94 23 00 02 8a 5a 23 00 02 86 94 23 00 02 b2 5a 23 00 02 ae 94 23 00 02 d8 5a 23 00 02 d4 94 23 00 02 10 d1 23 00 02 38 d1 23 00 02 61 d1 23 00 02 87 d1 23 00 02 af d1 23 00 02 d5 d1 23 00 02 11 04 23 00 02 39 04 23 00 02 62 04 23 00 02 88 04 23 00 02 b0 04 23 00 02 d6 04 23 00 02 12 05 23 00 02 3a 05 23 00 02 63 05 23 00 02 89 05 23 00 02 b1 05 23 00 02 d7 05 23 00 02 18 aa 23 00 02 14 36 23 00 02 42 aa 23 00 02 3d 36 23 00 02 69 aa 23 00 02 65 36 23 00 02 8f aa 23 00 02 8b 36 23 00 02 b7 aa 23 00 02 b3 36 23 00 02 dd aa 23 00 02 d9 36 23 00 02 15 74 23 00 02 3f 74 23 00 02 66 74 23 00 02 8c 74 23 00 02 b4 74 23 00 02 da 74 23 00 02 16 9f 23 00 02 40 9f 23 00 02 67 9f 23 00 02 8d 9f 23 00 02 b5 9f 23 00 02 db 9f 23 00 02 17 dc 23 00 02 41 dc 23 00 02 68 dc 23 00 02 8e dc 23 00 02 b6 dc 23 00 02 dc dc 23 00 02 1d ff 23 00 02 19 03 23 00 02 47 ff 23 00 02 43 03 23 00 02 6e ff 23 00 02 6a 03 23 00 02 94 ff 23 00 02 90 03 23 00 02 bc ff 23 00 02 b8 03 23 00 02 e2 ff 23 00 02 de 03 23 00 02 1a 35 23 00 02 44 35 23 00 02 6b 35 23 00 02 91 35 23 00 02 b9 35 23 00 02 df 35 23 00 02 1b 45 23 00 02 45 45 23 00 02 6c 45 23 00 02 92 45 23 00 02 ba 45 23 00 02 e0 45 23 00 02 1c 55 23 00 02 46 55 23 00 02 6d 55 23 00 02 93 55 23 00 02 bb 55 23 00 02 e1 55 23 00 02 22 ff 23 00 02 1e 68 23 00 02 4c ff 23 00 02 48 68 23 00 02 73 ff 23 00 02 6f 68 23 00 02 99 ff 23 00 02 95 68 23 00 02 c1 ff 23 00 02 bd 68 23 00 02 e7 ff 23 00 02 e3 68 23 00 02 1f 7e 23 00 02 49 7e 23 00 02 70 7e 23 00 02 96 7e 23 00 02 be 7e 23 00 02 e4 7e 23 00 02 20 97 23 00 02 4a 97 23 00 02 71 97 23 00 02 97 97 23 00 02 bf 97 23 00 02 e5 97 23 00 02 21 b5 23 00 02 4b b5 23 00 02 72 b5 23 00 02 98 b5 23 00 02 c0 b5 23 00 02 e6 b5 23 00 02 25 f0 23 00 02 23 e8 23 00 02 4f f0 23 00 02 4d e8 23 00 02 76 f0 23 00 02 74 e8 23 00 02 9c f0 23 00 02 9a e8 23 00 02 c4 f0 23 00 02 c2 e8 23 00 02 ea f0 23 00 02 e8 e8 23 00 02 24 ff 23 00 02 4e ff 23 00 02 75 ff 23 00 02 9b ff 23 00 02 c3 ff 23 00 02 e9 ff 23 00 02 fe 3d 23 00 02 00 04 23 00 02 fe 23 23 00 02 08 82 23 00 02 0a 00 23 00 02 0b 00 23 00 02 0c 01 23 00 02 16 00 23 00 02 18 02 23 00 02 1b 04 23 00 02 19 04 23 00 02 1c 81 23 00 02 1f 00 23 00 02 20 03 23 00 02 23 04 23 00 02 21 01 23 00 02 54 63 23 00 02 55 54 23 00 02 6e 45 23 00 02 6d 36 23 00 02 fe 3d 23 00 02 55 78 23 00 02 fe 20 23 00 02 26 30 23 00 02 fe 3d 23 00 02 20 71 23 00 02 50 8f 23 00 02 51 8f 23 00 02 fe 00 23 00 02 35 00 05 78 01 11 05 00 01 29];
4723	4723	panel-exit-sequence = <0x5000128 0x5000110>;
4724	4724	power-supply = <0xef>;
4725		- phandle = <0x280>;
	4725	+ phandle = <0x288>;
4726	4726
4727	4727	display-timings {
4728	4728	native-mode = <0xf0>;
4729		- phandle = <0x281>;
	4729	+ phandle = <0x289>;
4730	4730
4731	4731	timing0 {
4732	4732	clock-frequency = <0x7de2900>;
..	..	@@ -4773,7 +4773,7 @@
4773	4773	power-domains = <0x57 0x19>;
4774	4774	rockchip,vo-grf = <0xf2>;
4775	4775	status = "disabled";
4776		- phandle = <0x282>;
	4776	+ phandle = <0x28a>;
4777	4777	};
4778	4778
4779	4779	dp@fde50000 {
..	..	@@ -4789,7 +4789,7 @@
4789	4789	power-domains = <0x57 0x19>;
4790	4790	#sound-dai-cells = <0x1>;
4791	4791	status = "disabled";
4792		- phandle = <0x1ce>;
	4792	+ phandle = <0x1d7>;
4793	4793
4794	4794	ports {
4795	4795	#address-cells = <0x1>;
..	..	@@ -4826,7 +4826,7 @@
4826	4826	reg = <0x1>;
4827	4827
4828	4828	endpoint {
4829		- phandle = <0x283>;
	4829	+ phandle = <0x28b>;
4830	4830	};
4831	4831	};
4832	4832	};
..	..	@@ -4843,7 +4843,7 @@
4843	4843	power-domains = <0x57 0x1a>;
4844	4844	rockchip,vo-grf = <0xcc>;
4845	4845	status = "disabled";
4846		- phandle = <0x284>;
	4846	+ phandle = <0x28c>;
4847	4847	};
4848	4848
4849	4849	hdmi@fde80000 {
..	..	@@ -4865,7 +4865,7 @@
4865	4865	#sound-dai-cells = <0x0>;
4866	4866	status = "okay";
4867	4867	enable-gpios = <0xfc 0x9 0x0>;
4868		- phandle = <0x1ca>;
	4868	+ phandle = <0x1d3>;
4869	4869
4870	4870	ports {
4871	4871	#address-cells = <0x1>;
..	..	@@ -4875,7 +4875,7 @@
4875	4875	reg = <0x0>;
4876	4876	#address-cells = <0x1>;
4877	4877	#size-cells = <0x0>;
4878		- phandle = <0x285>;
	4878	+ phandle = <0x28d>;
4879	4879
4880	4880	endpoint@0 {
4881	4881	reg = <0x0>;
..	..	@@ -4914,7 +4914,7 @@
4914	4914	power-domains = <0x57 0x1a>;
4915	4915	rockchip,grf = <0xcc>;
4916	4916	status = "disabled";
4917		- phandle = <0x286>;
	4917	+ phandle = <0x28e>;
4918	4918
4919	4919	ports {
4920	4920	#address-cells = <0x1>;
..	..	@@ -4951,7 +4951,7 @@
4951	4951	reg = <0x1>;
4952	4952
4953	4953	endpoint {
4954		- phandle = <0x287>;
	4954	+ phandle = <0x28f>;
4955	4955	};
4956	4956	};
4957	4957	};
..	..	@@ -5182,7 +5182,7 @@
5182	5182	qos@fdf67200 {
5183	5183	compatible = "syscon";
5184	5184	reg = <0x0 0xfdf67200 0x0 0x20>;
5185		- phandle = <0x288>;
	5185	+ phandle = <0x290>;
5186	5186	};
5187	5187
5188	5188	qos@fdf70000 {
..	..	@@ -5284,7 +5284,7 @@
5284	5284	status = "okay";
5285	5285	reset-gpios = <0xfc 0x2 0x0>;
5286	5286	vpcie3v3-supply = <0x105>;
5287		- phandle = <0x289>;
	5287	+ phandle = <0x291>;
5288	5288
5289	5289	legacy-interrupt-controller {
5290	5290	interrupt-controller;
..	..	@@ -5324,10 +5324,10 @@
5324	5324	resets = <0x2 0x211 0x2 0x220>;
5325	5325	reset-names = "pcie", "periph";
5326	5326	rockchip,pipe-grf = <0x6c>;
5327		- status = "disabled";
5328		- reset-gpios = <0x108 0x18 0x0>;
	5327	+ status = "okay";
	5328	+ reset-gpios = <0x108 0x19 0x0>;
5329	5329	vpcie3v3-supply = <0x105>;
5330		- phandle = <0x28a>;
	5330	+ phandle = <0x292>;
5331	5331
5332	5332	legacy-interrupt-controller {
5333	5333	interrupt-controller;
..	..	@@ -5344,7 +5344,7 @@
5344	5344	reg = <0x0 0xfe1c0000 0x0 0x10000>;
5345	5345	rockchip,ethernet = <0x109>;
5346	5346	status = "disabled";
5347		- phandle = <0x28b>;
	5347	+ phandle = <0x293>;
5348	5348	};
5349	5349
5350	5350	ethernet@fe1c0000 {
..	..	@@ -5380,7 +5380,7 @@
5380	5380	compatible = "snps,dwmac-mdio";
5381	5381	#address-cells = <0x1>;
5382	5382	#size-cells = <0x0>;
5383		- phandle = <0x28c>;
	5383	+ phandle = <0x294>;
5384	5384
5385	5385	phy@1 {
5386	5386	compatible = "ethernet-phy-ieee802.3-c22";
..	..	@@ -5423,8 +5423,8 @@
5423	5423	phys = <0x107 0x1>;
5424	5424	phy-names = "sata-phy";
5425	5425	ports-implemented = <0x1>;
5426		- status = "okay";
5427		- phandle = <0x28d>;
	5426	+ status = "disabled";
	5427	+ phandle = <0x295>;
5428	5428	};
5429	5429
5430	5430	sata@fe230000 {
..	..	@@ -5438,7 +5438,7 @@
5438	5438	phy-names = "sata-phy";
5439	5439	ports-implemented = <0x1>;
5440	5440	status = "okay";
5441		- phandle = <0x28e>;
	5441	+ phandle = <0x296>;
5442	5442	};
5443	5443
5444	5444	spi@fe2b0000 {
..	..	@@ -5452,7 +5452,7 @@
5452	5452	#address-cells = <0x1>;
5453	5453	#size-cells = <0x0>;
5454	5454	status = "disabled";
5455		- phandle = <0x28f>;
	5455	+ phandle = <0x297>;
5456	5456	};
5457	5457
5458	5458	mmc@fe2c0000 {
..	..	@@ -5476,7 +5476,7 @@
5476	5476	sd-uhs-sdr104;
5477	5477	vqmmc-supply = <0x117>;
5478	5478	vmmc-supply = <0x118>;
5479		- phandle = <0x290>;
	5479	+ phandle = <0x298>;
5480	5480	};
5481	5481
5482	5482	mmc@fe2d0000 {
..	..	@@ -5490,7 +5490,7 @@
5490	5490	pinctrl-names = "default";
5491	5491	pinctrl-0 = <0x119>;
5492	5492	power-domains = <0x57 0x25>;
5493		- status = "okay";
	5493	+ status = "disabled";
5494	5494	no-sd;
5495	5495	no-mmc;
5496	5496	bus-width = <0x4>;
..	..	@@ -5501,7 +5501,7 @@
5501	5501	mmc-pwrseq = <0x11a>;
5502	5502	non-removable;
5503	5503	sd-uhs-sdr104;
5504		- phandle = <0x291>;
	5504	+ phandle = <0x299>;
5505	5505	};
5506	5506
5507	5507	mmc@fe2e0000 {
..	..	@@ -5523,7 +5523,7 @@
5523	5523	mmc-hs400-1_8v;
5524	5524	mmc-hs400-enhanced-strobe;
5525	5525	full-pwr-cycle-in-suspend;
5526		- phandle = <0x292>;
	5526	+ phandle = <0x29a>;
5527	5527	};
5528	5528
5529	5529	crypto@fe370000 {
..	..	@@ -5535,7 +5535,7 @@
5535	5535	resets = <0x11b 0xf>;
5536	5536	reset-names = "crypto-rst";
5537	5537	status = "disabled";
5538		- phandle = <0x293>;
	5538	+ phandle = <0x29b>;
5539	5539	};
5540	5540
5541	5541	rng@fe378000 {
..	..	@@ -5547,7 +5547,7 @@
5547	5547	resets = <0x11b 0x30>;
5548	5548	reset-names = "reset";
5549	5549	status = "okay";
5550		- phandle = <0x294>;
	5550	+ phandle = <0x29c>;
5551	5551	};
5552	5552
5553	5553	i2s@fe470000 {
..	..	@@ -5570,7 +5570,7 @@
5570	5570	pinctrl-2 = <0x11c 0x11d>;
5571	5571	#sound-dai-cells = <0x0>;
5572	5572	status = "okay";
5573		- phandle = <0x1d7>;
	5573	+ phandle = <0x1e0>;
5574	5574	};
5575	5575
5576	5576	i2s@fe480000 {
..	..	@@ -5588,7 +5588,7 @@
5588	5588	pinctrl-0 = <0x121 0x122 0x123 0x124 0x125 0x126 0x127 0x128 0x129 0x12a>;
5589	5589	#sound-dai-cells = <0x0>;
5590	5590	status = "disabled";
5591		- phandle = <0x295>;
	5591	+ phandle = <0x29d>;
5592	5592	};
5593	5593
5594	5594	i2s@fe490000 {
..	..	@@ -5610,7 +5610,7 @@
5610	5610	#sound-dai-cells = <0x0>;
5611	5611	status = "disabled";
5612	5612	rockchip,bclk-fs = <0x20>;
5613		- phandle = <0x1c7>;
	5613	+ phandle = <0x1d0>;
5614	5614	};
5615	5615
5616	5616	i2s@fe4a0000 {
..	..	@@ -5631,7 +5631,7 @@
5631	5631	pinctrl-2 = <0x135 0x136>;
5632	5632	#sound-dai-cells = <0x0>;
5633	5633	status = "disabled";
5634		- phandle = <0x296>;
	5634	+ phandle = <0x29e>;
5635	5635	};
5636	5636
5637	5637	pdm@fe4b0000 {
..	..	@@ -5647,7 +5647,7 @@
5647	5647	pinctrl-2 = <0x13c 0x13d>;
5648	5648	#sound-dai-cells = <0x0>;
5649	5649	status = "disabled";
5650		- phandle = <0x297>;
	5650	+ phandle = <0x29f>;
5651	5651	};
5652	5652
5653	5653	pdm@fe4c0000 {
..	..	@@ -5666,7 +5666,7 @@
5666	5666	pinctrl-2 = <0x143 0x144>;
5667	5667	#sound-dai-cells = <0x0>;
5668	5668	status = "disabled";
5669		- phandle = <0x298>;
	5669	+ phandle = <0x2a0>;
5670	5670	};
5671	5671
5672	5672	vad@fe4d0000 {
..	..	@@ -5681,7 +5681,7 @@
5681	5681	rockchip,mode = <0x0>;
5682	5682	#sound-dai-cells = <0x0>;
5683	5683	status = "disabled";
5684		- phandle = <0x299>;
	5684	+ phandle = <0x2a1>;
5685	5685	};
5686	5686
5687	5687	spdif-tx@fe4e0000 {
..	..	@@ -5699,7 +5699,7 @@
5699	5699	pinctrl-0 = <0x145>;
5700	5700	#sound-dai-cells = <0x0>;
5701	5701	status = "disabled";
5702		- phandle = <0x1d1>;
	5702	+ phandle = <0x1da>;
5703	5703	};
5704	5704
5705	5705	spdif-tx@fe4f0000 {
..	..	@@ -5717,7 +5717,7 @@
5717	5717	pinctrl-0 = <0x146>;
5718	5718	#sound-dai-cells = <0x0>;
5719	5719	status = "disabled";
5720		- phandle = <0x1d3>;
	5720	+ phandle = <0x1dc>;
5721	5721	};
5722	5722
5723	5723	codec-digital@fe500000 {
..	..	@@ -5734,14 +5734,14 @@
5734	5734	pinctrl-0 = <0x147>;
5735	5735	#sound-dai-cells = <0x0>;
5736	5736	status = "disabled";
5737		- phandle = <0x29a>;
	5737	+ phandle = <0x2a2>;
5738	5738	};
5739	5739
5740	5740	hwspinlock@fe5a0000 {
5741	5741	compatible = "rockchip,hwspinlock";
5742	5742	reg = <0x0 0xfe5a0000 0x0 0x100>;
5743	5743	#hwlock-cells = <0x1>;
5744		- phandle = <0x29b>;
	5744	+ phandle = <0x2a3>;
5745	5745	};
5746	5746
5747	5747	interrupt-controller@fe600000 {
..	..	@@ -5807,7 +5807,7 @@
5807	5807	tx-fifo-depth = <0x1>;
5808	5808	rx-fifo-depth = <0x6>;
5809	5809	status = "okay";
5810		- phandle = <0x29c>;
	5810	+ phandle = <0x2a4>;
5811	5811	};
5812	5812
5813	5813	can@fea60000 {
..	..	@@ -5823,7 +5823,7 @@
5823	5823	tx-fifo-depth = <0x1>;
5824	5824	rx-fifo-depth = <0x6>;
5825	5825	status = "okay";
5826		- phandle = <0x29d>;
	5826	+ phandle = <0x2a5>;
5827	5827	};
5828	5828
5829	5829	can@fea70000 {
..	..	@@ -5839,7 +5839,7 @@
5839	5839	tx-fifo-depth = <0x1>;
5840	5840	rx-fifo-depth = <0x6>;
5841	5841	status = "disabled";
5842		- phandle = <0x29e>;
	5842	+ phandle = <0x2a6>;
5843	5843	};
5844	5844
5845	5845	decompress@fea80000 {
..	..	@@ -5851,7 +5851,7 @@
5851	5851	resets = <0x2 0x118>;
5852	5852	reset-names = "dresetn";
5853	5853	status = "disabled";
5854		- phandle = <0x29f>;
	5854	+ phandle = <0x2a7>;
5855	5855	};
5856	5856
5857	5857	i2c@fea90000 {
..	..	@@ -5865,7 +5865,7 @@
5865	5865	#address-cells = <0x1>;
5866	5866	#size-cells = <0x0>;
5867	5867	status = "okay";
5868		- phandle = <0x2a0>;
	5868	+ phandle = <0x2a8>;
5869	5869
5870	5870	rk8602@42 {
5871	5871	compatible = "rockchip,rk8602";
..	..	@@ -5898,7 +5898,7 @@
5898	5898	#address-cells = <0x1>;
5899	5899	#size-cells = <0x0>;
5900	5900	status = "disabled";
5901		- phandle = <0x2a1>;
	5901	+ phandle = <0x2a9>;
5902	5902	};
5903	5903
5904	5904	i2c@feab0000 {
..	..	@@ -5912,7 +5912,7 @@
5912	5912	#address-cells = <0x1>;
5913	5913	#size-cells = <0x0>;
5914	5914	status = "okay";
5915		- phandle = <0x2a2>;
	5915	+ phandle = <0x2aa>;
5916	5916
5917	5917	es8316@10 {
5918	5918	compatible = "everest,es8316";
..	..	@@ -5922,7 +5922,7 @@
5922	5922	pinctrl-names = "default";
5923	5923	pinctrl-0 = <0x14f>;
5924	5924	#sound-dai-cells = <0x0>;
5925		- phandle = <0x1d8>;
	5925	+ phandle = <0x1e1>;
5926	5926	};
5927	5927	};
5928	5928
..	..	@@ -5937,7 +5937,7 @@
5937	5937	#address-cells = <0x1>;
5938	5938	#size-cells = <0x0>;
5939	5939	status = "disabled";
5940		- phandle = <0x2a3>;
	5940	+ phandle = <0x2ab>;
5941	5941
5942	5942	light@47 {
5943	5943	compatible = "ls_stk3332";
..	..	@@ -5949,7 +5949,7 @@
5949	5949	als_threshold_low = <0xa>;
5950	5950	als_ctrl_gain = <0x2>;
5951	5951	poll_delay_ms = <0x64>;
5952		- phandle = <0x2a4>;
	5952	+ phandle = <0x2ac>;
5953	5953	};
5954	5954
5955	5955	proximity@47 {
..	..	@@ -5962,7 +5962,7 @@
5962	5962	ps_ctrl_gain = <0x3>;
5963	5963	ps_led_current = <0x4>;
5964	5964	poll_delay_ms = <0x64>;
5965		- phandle = <0x2a5>;
	5965	+ phandle = <0x2ad>;
5966	5966	};
5967	5967
5968	5968	icm_acc@68 {
..	..	@@ -5974,7 +5974,7 @@
5974	5974	poll_delay_ms = <0x1e>;
5975	5975	type = <0x2>;
5976	5976	layout = <0x0>;
5977		- phandle = <0x2a6>;
	5977	+ phandle = <0x2ae>;
5978	5978	};
5979	5979
5980	5980	icm_gyro@68 {
..	..	@@ -5984,7 +5984,7 @@
5984	5984	poll_delay_ms = <0x1e>;
5985	5985	type = <0x4>;
5986	5986	layout = <0x0>;
5987		- phandle = <0x2a7>;
	5987	+ phandle = <0x2af>;
5988	5988	};
5989	5989	};
5990	5990
..	..	@@ -5999,7 +5999,7 @@
5999	5999	#address-cells = <0x1>;
6000	6000	#size-cells = <0x0>;
6001	6001	status = "disabled";
6002		- phandle = <0x2a8>;
	6002	+ phandle = <0x2b0>;
6003	6003
6004	6004	gt1x@14 {
6005	6005	compatible = "goodix,gt1x";
..	..	@@ -6009,7 +6009,7 @@
6009	6009	goodix,rst-gpio = <0x108 0x11 0x0>;
6010	6010	goodix,irq-gpio = <0x108 0x10 0x8>;
6011	6011	power-supply = <0xef>;
6012		- phandle = <0x2a9>;
	6012	+ phandle = <0x2b1>;
6013	6013	};
6014	6014	};
6015	6015
..	..	@@ -6019,7 +6019,7 @@
6019	6019	interrupts = <0x0 0x121 0x4>;
6020	6020	clocks = <0x2 0x5c 0x2 0x5f>;
6021	6021	clock-names = "pclk", "timer";
6022		- phandle = <0x2aa>;
	6022	+ phandle = <0x2b2>;
6023	6023	};
6024	6024
6025	6025	watchdog@feaf0000 {
..	..	@@ -6029,7 +6029,7 @@
6029	6029	clock-names = "tclk", "pclk";
6030	6030	interrupts = <0x0 0x13b 0x4>;
6031	6031	status = "disabled";
6032		- phandle = <0x2ab>;
	6032	+ phandle = <0x2b3>;
6033	6033	};
6034	6034
6035	6035	spi@feb00000 {
..	..	@@ -6046,7 +6046,7 @@
6046	6046	pinctrl-0 = <0x153 0x154 0x155>;
6047	6047	num-cs = <0x2>;
6048	6048	status = "disabled";
6049		- phandle = <0x2ac>;
	6049	+ phandle = <0x2b4>;
6050	6050	};
6051	6051
6052	6052	spi@feb10000 {
..	..	@@ -6063,7 +6063,7 @@
6063	6063	pinctrl-0 = <0x156 0x157 0x158>;
6064	6064	num-cs = <0x2>;
6065	6065	status = "disabled";
6066		- phandle = <0x2ad>;
	6066	+ phandle = <0x2b5>;
6067	6067	};
6068	6068
6069	6069	spi@feb20000 {
..	..	@@ -6082,7 +6082,7 @@
6082	6082	status = "okay";
6083	6083	assigned-clocks = <0x2 0xa5>;
6084	6084	assigned-clock-rates = <0xbebc200>;
6085		- phandle = <0x2ae>;
	6085	+ phandle = <0x2b6>;
6086	6086
6087	6087	rk806single@0 {
6088	6088	compatible = "rockchip,rk806";
..	..	@@ -6113,7 +6113,7 @@
6113	6113	vcc13-supply = <0x162>;
6114	6114	vcc14-supply = <0x162>;
6115	6115	vcca-supply = <0x6e>;
6116		- phandle = <0x2af>;
	6116	+ phandle = <0x2b7>;
6117	6117
6118	6118	pwrkey {
6119	6119	status = "okay";
..	..	@@ -6122,7 +6122,7 @@
6122	6122	pinctrl_rk806 {
6123	6123	gpio-controller;
6124	6124	#gpio-cells = <0x2>;
6125		- phandle = <0x2b0>;
	6125	+ phandle = <0x2b8>;
6126	6126
6127	6127	rk806_dvs1_null {
6128	6128	pins = "gpio_pwrctrl2";
..	..	@@ -6133,7 +6133,7 @@
6133	6133	rk806_dvs1_slp {
6134	6134	pins = "gpio_pwrctrl1";
6135	6135	function = "pin_fun1";
6136		- phandle = <0x2b1>;
	6136	+ phandle = <0x2b9>;
6137	6137	};
6138	6138
6139	6139	rk806_dvs1_pwrdn {
..	..	@@ -6145,7 +6145,7 @@
6145	6145	rk806_dvs1_rst {
6146	6146	pins = "gpio_pwrctrl1";
6147	6147	function = "pin_fun3";
6148		- phandle = <0x2b2>;
	6148	+ phandle = <0x2ba>;
6149	6149	};
6150	6150
6151	6151	rk806_dvs2_null {
..	..	@@ -6157,31 +6157,31 @@
6157	6157	rk806_dvs2_slp {
6158	6158	pins = "gpio_pwrctrl2";
6159	6159	function = "pin_fun1";
6160		- phandle = <0x2b3>;
	6160	+ phandle = <0x2bb>;
6161	6161	};
6162	6162
6163	6163	rk806_dvs2_pwrdn {
6164	6164	pins = "gpio_pwrctrl2";
6165	6165	function = "pin_fun2";
6166		- phandle = <0x2b4>;
	6166	+ phandle = <0x2bc>;
6167	6167	};
6168	6168
6169	6169	rk806_dvs2_rst {
6170	6170	pins = "gpio_pwrctrl2";
6171	6171	function = "pin_fun3";
6172		- phandle = <0x2b5>;
	6172	+ phandle = <0x2bd>;
6173	6173	};
6174	6174
6175	6175	rk806_dvs2_dvs {
6176	6176	pins = "gpio_pwrctrl2";
6177	6177	function = "pin_fun4";
6178		- phandle = <0x2b6>;
	6178	+ phandle = <0x2be>;
6179	6179	};
6180	6180
6181	6181	rk806_dvs2_gpio {
6182	6182	pins = "gpio_pwrctrl2";
6183	6183	function = "pin_fun5";
6184		- phandle = <0x2b7>;
	6184	+ phandle = <0x2bf>;
6185	6185	};
6186	6186
6187	6187	rk806_dvs3_null {
..	..	@@ -6193,31 +6193,31 @@
6193	6193	rk806_dvs3_slp {
6194	6194	pins = "gpio_pwrctrl3";
6195	6195	function = "pin_fun1";
6196		- phandle = <0x2b8>;
	6196	+ phandle = <0x2c0>;
6197	6197	};
6198	6198
6199	6199	rk806_dvs3_pwrdn {
6200	6200	pins = "gpio_pwrctrl3";
6201	6201	function = "pin_fun2";
6202		- phandle = <0x2b9>;
	6202	+ phandle = <0x2c1>;
6203	6203	};
6204	6204
6205	6205	rk806_dvs3_rst {
6206	6206	pins = "gpio_pwrctrl3";
6207	6207	function = "pin_fun3";
6208		- phandle = <0x2ba>;
	6208	+ phandle = <0x2c2>;
6209	6209	};
6210	6210
6211	6211	rk806_dvs3_dvs {
6212	6212	pins = "gpio_pwrctrl3";
6213	6213	function = "pin_fun4";
6214		- phandle = <0x2bb>;
	6214	+ phandle = <0x2c3>;
6215	6215	};
6216	6216
6217	6217	rk806_dvs3_gpio {
6218	6218	pins = "gpio_pwrctrl3";
6219	6219	function = "pin_fun5";
6220		- phandle = <0x2bc>;
	6220	+ phandle = <0x2c4>;
6221	6221	};
6222	6222	};
6223	6223
..	..	@@ -6300,7 +6300,7 @@
6300	6300	regulator-always-on;
6301	6301	regulator-boot-on;
6302	6302	regulator-name = "vdd2_ddr_s3";
6303		- phandle = <0x2bd>;
	6303	+ phandle = <0x2c5>;
6304	6304
6305	6305	regulator-state-mem {
6306	6306	regulator-on-in-suspend;
..	..	@@ -6327,7 +6327,7 @@
6327	6327	regulator-min-microvolt = <0x325aa0>;
6328	6328	regulator-max-microvolt = <0x325aa0>;
6329	6329	regulator-name = "vcc_3v3_s3";
6330		- phandle = <0x2be>;
	6330	+ phandle = <0x2c6>;
6331	6331
6332	6332	regulator-state-mem {
6333	6333	regulator-on-in-suspend;
..	..	@@ -6339,7 +6339,7 @@
6339	6339	regulator-always-on;
6340	6340	regulator-boot-on;
6341	6341	regulator-name = "vddq_ddr_s0";
6342		- phandle = <0x2bf>;
	6342	+ phandle = <0x2c7>;
6343	6343
6344	6344	regulator-state-mem {
6345	6345	regulator-off-in-suspend;
..	..	@@ -6352,7 +6352,7 @@
6352	6352	regulator-min-microvolt = <0x1b7740>;
6353	6353	regulator-max-microvolt = <0x1b7740>;
6354	6354	regulator-name = "vcc_1v8_s3";
6355		- phandle = <0x2c0>;
	6355	+ phandle = <0x2c8>;
6356	6356
6357	6357	regulator-state-mem {
6358	6358	regulator-on-in-suspend;
..	..	@@ -6366,7 +6366,7 @@
6366	6366	regulator-min-microvolt = <0x1b7740>;
6367	6367	regulator-max-microvolt = <0x1b7740>;
6368	6368	regulator-name = "avcc_1v8_s0";
6369		- phandle = <0x1dd>;
	6369	+ phandle = <0x1e6>;
6370	6370
6371	6371	regulator-state-mem {
6372	6372	regulator-off-in-suspend;
..	..	@@ -6393,7 +6393,7 @@
6393	6393	regulator-min-microvolt = <0x124f80>;
6394	6394	regulator-max-microvolt = <0x124f80>;
6395	6395	regulator-name = "avdd_1v2_s0";
6396		- phandle = <0x2c1>;
	6396	+ phandle = <0x2c9>;
6397	6397
6398	6398	regulator-state-mem {
6399	6399	regulator-off-in-suspend;
..	..	@@ -6406,7 +6406,7 @@
6406	6406	regulator-min-microvolt = <0x325aa0>;
6407	6407	regulator-max-microvolt = <0x325aa0>;
6408	6408	regulator-name = "vcc_3v3_s0";
6409		- phandle = <0x2c2>;
	6409	+ phandle = <0x2ca>;
6410	6410
6411	6411	regulator-state-mem {
6412	6412	regulator-off-in-suspend;
..	..	@@ -6432,7 +6432,7 @@
6432	6432	regulator-min-microvolt = <0x1b7740>;
6433	6433	regulator-max-microvolt = <0x1b7740>;
6434	6434	regulator-name = "pldo6_s3";
6435		- phandle = <0x2c3>;
	6435	+ phandle = <0x2cb>;
6436	6436
6437	6437	regulator-state-mem {
6438	6438	regulator-on-in-suspend;
..	..	@@ -6446,7 +6446,7 @@
6446	6446	regulator-min-microvolt = <0xb71b0>;
6447	6447	regulator-max-microvolt = <0xb71b0>;
6448	6448	regulator-name = "vdd_0v75_s3";
6449		- phandle = <0x2c4>;
	6449	+ phandle = <0x2cc>;
6450	6450
6451	6451	regulator-state-mem {
6452	6452	regulator-on-in-suspend;
..	..	@@ -6460,7 +6460,7 @@
6460	6460	regulator-min-microvolt = <0xcf850>;
6461	6461	regulator-max-microvolt = <0xcf850>;
6462	6462	regulator-name = "vdd_ddr_pll_s0";
6463		- phandle = <0x2c5>;
	6463	+ phandle = <0x2cd>;
6464	6464
6465	6465	regulator-state-mem {
6466	6466	regulator-off-in-suspend;
..	..	@@ -6474,7 +6474,7 @@
6474	6474	regulator-min-microvolt = <0xcc77c>;
6475	6475	regulator-max-microvolt = <0xcc77c>;
6476	6476	regulator-name = "avdd_0v75_s0";
6477		- phandle = <0x1de>;
	6477	+ phandle = <0x1e7>;
6478	6478
6479	6479	regulator-state-mem {
6480	6480	regulator-off-in-suspend;
..	..	@@ -6487,7 +6487,7 @@
6487	6487	regulator-min-microvolt = <0xcf850>;
6488	6488	regulator-max-microvolt = <0xcf850>;
6489	6489	regulator-name = "vdd_0v85_s0";
6490		- phandle = <0x1dc>;
	6490	+ phandle = <0x1e5>;
6491	6491
6492	6492	regulator-state-mem {
6493	6493	regulator-off-in-suspend;
..	..	@@ -6500,7 +6500,7 @@
6500	6500	regulator-min-microvolt = <0xb71b0>;
6501	6501	regulator-max-microvolt = <0xb71b0>;
6502	6502	regulator-name = "vdd_0v75_s0";
6503		- phandle = <0x2c6>;
	6503	+ phandle = <0x2ce>;
6504	6504
6505	6505	regulator-state-mem {
6506	6506	regulator-off-in-suspend;
..	..	@@ -6524,7 +6524,7 @@
6524	6524	pinctrl-0 = <0x163 0x164 0x165>;
6525	6525	num-cs = <0x2>;
6526	6526	status = "disabled";
6527		- phandle = <0x2c7>;
	6527	+ phandle = <0x2cf>;
6528	6528	};
6529	6529
6530	6530	serial@feb40000 {
..	..	@@ -6538,8 +6538,8 @@
6538	6538	dmas = <0x6f 0x8 0x6f 0x9>;
6539	6539	pinctrl-names = "default";
6540	6540	pinctrl-0 = <0x166>;
6541		- status = "okay";
6542		- phandle = <0x2c8>;
	6541	+ status = "disabled";
	6542	+ phandle = <0x2d0>;
6543	6543	};
6544	6544
6545	6545	serial@feb50000 {
..	..	@@ -6554,7 +6554,7 @@
6554	6554	pinctrl-names = "default";
6555	6555	pinctrl-0 = <0x167>;
6556	6556	status = "disabled";
6557		- phandle = <0x2c9>;
	6557	+ phandle = <0x2d1>;
6558	6558	};
6559	6559
6560	6560	serial@feb60000 {
..	..	@@ -6569,7 +6569,7 @@
6569	6569	pinctrl-names = "default";
6570	6570	pinctrl-0 = <0x168>;
6571	6571	status = "disabled";
6572		- phandle = <0x2ca>;
	6572	+ phandle = <0x2d2>;
6573	6573	};
6574	6574
6575	6575	serial@feb70000 {
..	..	@@ -6583,8 +6583,8 @@
6583	6583	dmas = <0xe5 0x9 0xe5 0xa>;
6584	6584	pinctrl-names = "default";
6585	6585	pinctrl-0 = <0x169>;
6586		- status = "okay";
6587		- phandle = <0x2cb>;
	6586	+ status = "disabled";
	6587	+ phandle = <0x2d3>;
6588	6588	};
6589	6589
6590	6590	serial@feb80000 {
..	..	@@ -6599,7 +6599,7 @@
6599	6599	pinctrl-names = "default";
6600	6600	pinctrl-0 = <0x16a>;
6601	6601	status = "okay";
6602		- phandle = <0x2cc>;
	6602	+ phandle = <0x2d4>;
6603	6603	};
6604	6604
6605	6605	serial@feb90000 {
..	..	@@ -6614,7 +6614,7 @@
6614	6614	pinctrl-names = "default";
6615	6615	pinctrl-0 = <0x16b>;
6616	6616	status = "okay";
6617		- phandle = <0x2cd>;
	6617	+ phandle = <0x2d5>;
6618	6618	};
6619	6619
6620	6620	serial@feba0000 {
..	..	@@ -6628,8 +6628,8 @@
6628	6628	dmas = <0xe6 0x7 0xe6 0x8>;
6629	6629	pinctrl-names = "default";
6630	6630	pinctrl-0 = <0x16c>;
6631		- status = "okay";
6632		- phandle = <0x2ce>;
	6631	+ status = "disabled";
	6632	+ phandle = <0x2d6>;
6633	6633	};
6634	6634
6635	6635	serial@febb0000 {
..	..	@@ -6644,7 +6644,7 @@
6644	6644	pinctrl-names = "default";
6645	6645	pinctrl-0 = <0x16d>;
6646	6646	status = "disabled";
6647		- phandle = <0x2cf>;
	6647	+ phandle = <0x2d7>;
6648	6648	};
6649	6649
6650	6650	serial@febc0000 {
..	..	@@ -6658,8 +6658,8 @@
6658	6658	dmas = <0xe6 0xb 0xe6 0xc>;
6659	6659	pinctrl-names = "default";
6660	6660	pinctrl-0 = <0x16e 0x16f>;
6661		- status = "okay";
6662		- phandle = <0x2d0>;
	6661	+ status = "disabled";
	6662	+ phandle = <0x2d8>;
6663	6663	};
6664	6664
6665	6665	pwm@febd0000 {
..	..	@@ -6672,7 +6672,7 @@
6672	6672	clocks = <0x2 0x54 0x2 0x53>;
6673	6673	clock-names = "pwm", "pclk";
6674	6674	status = "disabled";
6675		- phandle = <0x2d1>;
	6675	+ phandle = <0x2d9>;
6676	6676	};
6677	6677
6678	6678	pwm@febd0010 {
..	..	@@ -6685,7 +6685,7 @@
6685	6685	clocks = <0x2 0x54 0x2 0x53>;
6686	6686	clock-names = "pwm", "pclk";
6687	6687	status = "disabled";
6688		- phandle = <0x2d2>;
	6688	+ phandle = <0x2da>;
6689	6689	};
6690	6690
6691	6691	pwm@febd0020 {
..	..	@@ -6698,7 +6698,7 @@
6698	6698	clocks = <0x2 0x54 0x2 0x53>;
6699	6699	clock-names = "pwm", "pclk";
6700	6700	status = "disabled";
6701		- phandle = <0x2d3>;
	6701	+ phandle = <0x2db>;
6702	6702	};
6703	6703
6704	6704	pwm@febd0030 {
..	..	@@ -6711,7 +6711,7 @@
6711	6711	clocks = <0x2 0x54 0x2 0x53>;
6712	6712	clock-names = "pwm", "pclk";
6713	6713	status = "disabled";
6714		- phandle = <0x2d4>;
	6714	+ phandle = <0x2dc>;
6715	6715	};
6716	6716
6717	6717	pwm@febe0000 {
..	..	@@ -6724,7 +6724,7 @@
6724	6724	clocks = <0x2 0x57 0x2 0x56>;
6725	6725	clock-names = "pwm", "pclk";
6726	6726	status = "disabled";
6727		- phandle = <0x2d5>;
	6727	+ phandle = <0x2dd>;
6728	6728	};
6729	6729
6730	6730	pwm@febe0010 {
..	..	@@ -6737,7 +6737,7 @@
6737	6737	clocks = <0x2 0x57 0x2 0x56>;
6738	6738	clock-names = "pwm", "pclk";
6739	6739	status = "disabled";
6740		- phandle = <0x2d6>;
	6740	+ phandle = <0x2de>;
6741	6741	};
6742	6742
6743	6743	pwm@febe0020 {
..	..	@@ -6750,7 +6750,7 @@
6750	6750	clocks = <0x2 0x57 0x2 0x56>;
6751	6751	clock-names = "pwm", "pclk";
6752	6752	status = "disabled";
6753		- phandle = <0x2d7>;
	6753	+ phandle = <0x2df>;
6754	6754	};
6755	6755
6756	6756	pwm@febe0030 {
..	..	@@ -6763,7 +6763,7 @@
6763	6763	clocks = <0x2 0x57 0x2 0x56>;
6764	6764	clock-names = "pwm", "pclk";
6765	6765	status = "disabled";
6766		- phandle = <0x1c6>;
	6766	+ phandle = <0x1cf>;
6767	6767	};
6768	6768
6769	6769	pwm@febf0000 {
..	..	@@ -6776,7 +6776,7 @@
6776	6776	clocks = <0x2 0x5a 0x2 0x59>;
6777	6777	clock-names = "pwm", "pclk";
6778	6778	status = "disabled";
6779		- phandle = <0x2d8>;
	6779	+ phandle = <0x2e0>;
6780	6780	};
6781	6781
6782	6782	pwm@febf0010 {
..	..	@@ -6789,7 +6789,7 @@
6789	6789	clocks = <0x2 0x5a 0x2 0x59>;
6790	6790	clock-names = "pwm", "pclk";
6791	6791	status = "disabled";
6792		- phandle = <0x2d9>;
	6792	+ phandle = <0x2e1>;
6793	6793	};
6794	6794
6795	6795	pwm@febf0020 {
..	..	@@ -6802,7 +6802,7 @@
6802	6802	clocks = <0x2 0x5a 0x2 0x59>;
6803	6803	clock-names = "pwm", "pclk";
6804	6804	status = "disabled";
6805		- phandle = <0x2da>;
	6805	+ phandle = <0x2e2>;
6806	6806	};
6807	6807
6808	6808	pwm@febf0030 {
..	..	@@ -6815,7 +6815,7 @@
6815	6815	clocks = <0x2 0x5a 0x2 0x59>;
6816	6816	clock-names = "pwm", "pclk";
6817	6817	status = "disabled";
6818		- phandle = <0x2db>;
	6818	+ phandle = <0x2e3>;
6819	6819	};
6820	6820
6821	6821	tsadc@fec00000 {
..	..	@@ -6850,7 +6850,7 @@
6850	6850	reset-names = "saradc-apb";
6851	6851	status = "okay";
6852	6852	vref-supply = <0x17e>;
6853		- phandle = <0x1c4>;
	6853	+ phandle = <0x1cd>;
6854	6854	};
6855	6855
6856	6856	mailbox@fec60000 {
..	..	@@ -6861,7 +6861,7 @@
6861	6861	clock-names = "pclk_mailbox";
6862	6862	#mbox-cells = <0x1>;
6863	6863	status = "disabled";
6864		- phandle = <0x2dc>;
	6864	+ phandle = <0x2e4>;
6865	6865	};
6866	6866
6867	6867	mailbox@fec70000 {
..	..	@@ -6872,7 +6872,7 @@
6872	6872	clock-names = "pclk_mailbox";
6873	6873	#mbox-cells = <0x1>;
6874	6874	status = "disabled";
6875		- phandle = <0x2dd>;
	6875	+ phandle = <0x2e5>;
6876	6876	};
6877	6877
6878	6878	i2c@fec80000 {
..	..	@@ -6886,7 +6886,7 @@
6886	6886	#address-cells = <0x1>;
6887	6887	#size-cells = <0x0>;
6888	6888	status = "okay";
6889		- phandle = <0x2de>;
	6889	+ phandle = <0x2e6>;
6890	6890
6891	6891	nkmcu@15 {
6892	6892	compatible = "nk_mcu";
..	..	@@ -6904,7 +6904,7 @@
6904	6904	interrupt-parent = <0x15b>;
6905	6905	interrupts = <0x8 0x8>;
6906	6906	wakeup-source;
6907		- phandle = <0x1df>;
	6907	+ phandle = <0x1e8>;
6908	6908	};
6909	6909
6910	6910	eeprom@50 {
..	..	@@ -6929,7 +6929,7 @@
6929	6929	#address-cells = <0x1>;
6930	6930	#size-cells = <0x0>;
6931	6931	status = "disabled";
6932		- phandle = <0x2df>;
	6932	+ phandle = <0x2e7>;
6933	6933	};
6934	6934
6935	6935	i2c@feca0000 {
..	..	@@ -6943,7 +6943,7 @@
6943	6943	#address-cells = <0x1>;
6944	6944	#size-cells = <0x0>;
6945	6945	status = "disabled";
6946		- phandle = <0x2e0>;
	6946	+ phandle = <0x2e8>;
6947	6947	};
6948	6948
6949	6949	spi@fecb0000 {
..	..	@@ -6960,7 +6960,7 @@
6960	6960	pinctrl-0 = <0x183 0x184 0x185>;
6961	6961	num-cs = <0x2>;
6962	6962	status = "disabled";
6963		- phandle = <0x2e1>;
	6963	+ phandle = <0x2e9>;
6964	6964	};
6965	6965
6966	6966	otp@fecc0000 {
..	..	@@ -6972,7 +6972,7 @@
6972	6972	clock-names = "otpc", "apb", "arb", "phy";
6973	6973	resets = <0x2 0x12a 0x2 0x129 0x2 0x12b>;
6974	6974	reset-names = "otpc", "apb", "arb";
6975		- phandle = <0x2e2>;
	6975	+ phandle = <0x2ea>;
6976	6976
6977	6977	cpu-code@2 {
6978	6978	reg = <0x2 0x2>;
..	..	@@ -7075,7 +7075,7 @@
7075	7075
7076	7076	vop-opp-info@61 {
7077	7077	reg = <0x61 0x6>;
7078		- phandle = <0x2e3>;
	7078	+ phandle = <0x2eb>;
7079	7079	};
7080	7080
7081	7081	venc-opp-info@67 {
..	..	@@ -7092,7 +7092,7 @@
7092	7092	clock-names = "pclk_mailbox";
7093	7093	#mbox-cells = <0x1>;
7094	7094	status = "disabled";
7095		- phandle = <0x2e4>;
	7095	+ phandle = <0x2ec>;
7096	7096	};
7097	7097
7098	7098	dma-controller@fed10000 {
..	..	@@ -7150,7 +7150,7 @@
7150	7150	resets = <0x2 0x28 0x2 0x29 0x2 0x2a 0x2 0x2b 0x2 0x482>;
7151	7151	reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
7152	7152	status = "okay";
7153		- phandle = <0x2e5>;
	7153	+ phandle = <0x2ed>;
7154	7154
7155	7155	dp-port {
7156	7156	#phy-cells = <0x0>;
..	..	@@ -7256,7 +7256,7 @@
7256	7256	#address-cells = <0x1>;
7257	7257	#size-cells = <0x1>;
7258	7258	ranges = <0x0 0x0 0xff001000 0xef000>;
7259		- phandle = <0x2e6>;
	7259	+ phandle = <0x2ee>;
7260	7260
7261	7261	rkvdec-sram@0 {
7262	7262	reg = <0x0 0x78000>;
..	..	@@ -7313,7 +7313,7 @@
7313	7313	gpio-ranges = <0x191 0x0 0x40 0x20>;
7314	7314	interrupt-controller;
7315	7315	#interrupt-cells = <0x2>;
7316		- phandle = <0x1e8>;
	7316	+ phandle = <0x1be>;
7317	7317	};
7318	7318
7319	7319	gpio@fec40000 {
..	..	@@ -7360,13 +7360,13 @@
7360	7360	pcfg-pull-none-drv-level-0 {
7361	7361	bias-disable;
7362	7362	drive-strength = <0x0>;
7363		- phandle = <0x2e7>;
	7363	+ phandle = <0x2ef>;
7364	7364	};
7365	7365
7366	7366	pcfg-pull-none-drv-level-1 {
7367	7367	bias-disable;
7368	7368	drive-strength = <0x1>;
7369		- phandle = <0x2e8>;
	7369	+ phandle = <0x2f0>;
7370	7370	};
7371	7371
7372	7372	pcfg-pull-none-drv-level-2 {
..	..	@@ -7378,31 +7378,31 @@
7378	7378	pcfg-pull-none-drv-level-3 {
7379	7379	bias-disable;
7380	7380	drive-strength = <0x3>;
7381		- phandle = <0x2e9>;
	7381	+ phandle = <0x2f1>;
7382	7382	};
7383	7383
7384	7384	pcfg-pull-none-drv-level-4 {
7385	7385	bias-disable;
7386	7386	drive-strength = <0x4>;
7387		- phandle = <0x2ea>;
	7387	+ phandle = <0x2f2>;
7388	7388	};
7389	7389
7390	7390	pcfg-pull-none-drv-level-5 {
7391	7391	bias-disable;
7392	7392	drive-strength = <0x5>;
7393		- phandle = <0x2eb>;
	7393	+ phandle = <0x2f3>;
7394	7394	};
7395	7395
7396	7396	pcfg-pull-none-drv-level-6 {
7397	7397	bias-disable;
7398	7398	drive-strength = <0x6>;
7399		- phandle = <0x2ec>;
	7399	+ phandle = <0x2f4>;
7400	7400	};
7401	7401
7402	7402	pcfg-pull-up-drv-level-0 {
7403	7403	bias-pull-up;
7404	7404	drive-strength = <0x0>;
7405		- phandle = <0x2ed>;
	7405	+ phandle = <0x2f5>;
7406	7406	};
7407	7407
7408	7408	pcfg-pull-up-drv-level-1 {
..	..	@@ -7420,19 +7420,19 @@
7420	7420	pcfg-pull-up-drv-level-3 {
7421	7421	bias-pull-up;
7422	7422	drive-strength = <0x3>;
7423		- phandle = <0x2ee>;
	7423	+ phandle = <0x2f6>;
7424	7424	};
7425	7425
7426	7426	pcfg-pull-up-drv-level-4 {
7427	7427	bias-pull-up;
7428	7428	drive-strength = <0x4>;
7429		- phandle = <0x2ef>;
	7429	+ phandle = <0x2f7>;
7430	7430	};
7431	7431
7432	7432	pcfg-pull-up-drv-level-5 {
7433	7433	bias-pull-up;
7434	7434	drive-strength = <0x5>;
7435		- phandle = <0x2f0>;
	7435	+ phandle = <0x2f8>;
7436	7436	};
7437	7437
7438	7438	pcfg-pull-up-drv-level-6 {
..	..	@@ -7444,55 +7444,55 @@
7444	7444	pcfg-pull-down-drv-level-0 {
7445	7445	bias-pull-down;
7446	7446	drive-strength = <0x0>;
7447		- phandle = <0x2f1>;
	7447	+ phandle = <0x2f9>;
7448	7448	};
7449	7449
7450	7450	pcfg-pull-down-drv-level-1 {
7451	7451	bias-pull-down;
7452	7452	drive-strength = <0x1>;
7453		- phandle = <0x2f2>;
	7453	+ phandle = <0x2fa>;
7454	7454	};
7455	7455
7456	7456	pcfg-pull-down-drv-level-2 {
7457	7457	bias-pull-down;
7458	7458	drive-strength = <0x2>;
7459		- phandle = <0x2f3>;
	7459	+ phandle = <0x2fb>;
7460	7460	};
7461	7461
7462	7462	pcfg-pull-down-drv-level-3 {
7463	7463	bias-pull-down;
7464	7464	drive-strength = <0x3>;
7465		- phandle = <0x2f4>;
	7465	+ phandle = <0x2fc>;
7466	7466	};
7467	7467
7468	7468	pcfg-pull-down-drv-level-4 {
7469	7469	bias-pull-down;
7470	7470	drive-strength = <0x4>;
7471		- phandle = <0x2f5>;
	7471	+ phandle = <0x2fd>;
7472	7472	};
7473	7473
7474	7474	pcfg-pull-down-drv-level-5 {
7475	7475	bias-pull-down;
7476	7476	drive-strength = <0x5>;
7477		- phandle = <0x2f6>;
	7477	+ phandle = <0x2fe>;
7478	7478	};
7479	7479
7480	7480	pcfg-pull-down-drv-level-6 {
7481	7481	bias-pull-down;
7482	7482	drive-strength = <0x6>;
7483		- phandle = <0x2f7>;
	7483	+ phandle = <0x2ff>;
7484	7484	};
7485	7485
7486	7486	pcfg-pull-up-smt {
7487	7487	bias-pull-up;
7488	7488	input-schmitt-enable;
7489		- phandle = <0x2f8>;
	7489	+ phandle = <0x300>;
7490	7490	};
7491	7491
7492	7492	pcfg-pull-down-smt {
7493	7493	bias-pull-down;
7494	7494	input-schmitt-enable;
7495		- phandle = <0x2f9>;
	7495	+ phandle = <0x301>;
7496	7496	};
7497	7497
7498	7498	pcfg-pull-none-smt {
..	..	@@ -7505,7 +7505,7 @@
7505	7505	bias-disable;
7506	7506	drive-strength = <0x0>;
7507	7507	input-schmitt-enable;
7508		- phandle = <0x2fa>;
	7508	+ phandle = <0x302>;
7509	7509	};
7510	7510
7511	7511	pcfg-pull-none-drv-level-1-smt {
..	..	@@ -7519,21 +7519,21 @@
7519	7519	bias-disable;
7520	7520	drive-strength = <0x2>;
7521	7521	input-schmitt-enable;
7522		- phandle = <0x2fb>;
	7522	+ phandle = <0x303>;
7523	7523	};
7524	7524
7525	7525	pcfg-pull-none-drv-level-3-smt {
7526	7526	bias-disable;
7527	7527	drive-strength = <0x3>;
7528	7528	input-schmitt-enable;
7529		- phandle = <0x2fc>;
	7529	+ phandle = <0x304>;
7530	7530	};
7531	7531
7532	7532	pcfg-pull-none-drv-level-4-smt {
7533	7533	bias-disable;
7534	7534	drive-strength = <0x4>;
7535	7535	input-schmitt-enable;
7536		- phandle = <0x2fd>;
	7536	+ phandle = <0x305>;
7537	7537	};
7538	7538
7539	7539	pcfg-pull-none-drv-level-5-smt {
..	..	@@ -7547,53 +7547,53 @@
7547	7547	bias-disable;
7548	7548	drive-strength = <0x6>;
7549	7549	input-schmitt-enable;
7550		- phandle = <0x2fe>;
	7550	+ phandle = <0x306>;
7551	7551	};
7552	7552
7553	7553	pcfg-output-high {
7554	7554	output-high;
7555		- phandle = <0x2ff>;
	7555	+ phandle = <0x307>;
7556	7556	};
7557	7557
7558	7558	pcfg-output-high-pull-up {
7559	7559	output-high;
7560	7560	bias-pull-up;
7561		- phandle = <0x300>;
	7561	+ phandle = <0x308>;
7562	7562	};
7563	7563
7564	7564	pcfg-output-high-pull-down {
7565	7565	output-high;
7566	7566	bias-pull-down;
7567		- phandle = <0x301>;
	7567	+ phandle = <0x309>;
7568	7568	};
7569	7569
7570	7570	pcfg-output-high-pull-none {
7571	7571	output-high;
7572	7572	bias-disable;
7573		- phandle = <0x302>;
	7573	+ phandle = <0x30a>;
7574	7574	};
7575	7575
7576	7576	pcfg-output-low {
7577	7577	output-low;
7578		- phandle = <0x303>;
	7578	+ phandle = <0x30b>;
7579	7579	};
7580	7580
7581	7581	pcfg-output-low-pull-up {
7582	7582	output-low;
7583	7583	bias-pull-up;
7584		- phandle = <0x304>;
	7584	+ phandle = <0x30c>;
7585	7585	};
7586	7586
7587	7587	pcfg-output-low-pull-down {
7588	7588	output-low;
7589	7589	bias-pull-down;
7590		- phandle = <0x305>;
	7590	+ phandle = <0x30d>;
7591	7591	};
7592	7592
7593	7593	pcfg-output-low-pull-none {
7594	7594	output-low;
7595	7595	bias-disable;
7596		- phandle = <0x306>;
	7596	+ phandle = <0x30e>;
7597	7597	};
7598	7598
7599	7599	auddsm {
..	..	@@ -7621,7 +7621,7 @@
7621	7621
7622	7622	can0m1-pins {
7623	7623	rockchip,pins = <0x4 0x1d 0x9 0x192 0x4 0x1c 0x9 0x192>;
7624		- phandle = <0x307>;
	7624	+ phandle = <0x30f>;
7625	7625	};
7626	7626	};
7627	7627
..	..	@@ -7629,7 +7629,7 @@
7629	7629
7630	7630	can1m0-pins {
7631	7631	rockchip,pins = <0x3 0xd 0x9 0x192 0x3 0xe 0x9 0x192>;
7632		- phandle = <0x308>;
	7632	+ phandle = <0x310>;
7633	7633	};
7634	7634
7635	7635	can1m1-pins {
..	..	@@ -7647,7 +7647,7 @@
7647	7647
7648	7648	can2m1-pins {
7649	7649	rockchip,pins = <0x0 0x1c 0xa 0x192 0x0 0x1d 0xa 0x192>;
7650		- phandle = <0x309>;
	7650	+ phandle = <0x311>;
7651	7651	};
7652	7652	};
7653	7653
..	..	@@ -7655,22 +7655,22 @@
7655	7655
7656	7656	cif-clk {
7657	7657	rockchip,pins = <0x4 0xc 0x1 0x192>;
7658		- phandle = <0x30a>;
	7658	+ phandle = <0x312>;
7659	7659	};
7660	7660
7661	7661	cif-dvp-clk {
7662	7662	rockchip,pins = <0x4 0x8 0x1 0x192 0x4 0xa 0x1 0x192 0x4 0xb 0x1 0x192>;
7663		- phandle = <0x30b>;
	7663	+ phandle = <0x313>;
7664	7664	};
7665	7665
7666	7666	cif-dvp-bus16 {
7667	7667	rockchip,pins = <0x3 0x14 0x1 0x192 0x3 0x15 0x1 0x192 0x3 0x16 0x1 0x192 0x3 0x17 0x1 0x192 0x3 0x18 0x1 0x192 0x3 0x19 0x1 0x192 0x3 0x1a 0x1 0x192 0x3 0x1b 0x1 0x192>;
7668		- phandle = <0x30c>;
	7668	+ phandle = <0x314>;
7669	7669	};
7670	7670
7671	7671	cif-dvp-bus8 {
7672	7672	rockchip,pins = <0x4 0x0 0x1 0x192 0x4 0x1 0x1 0x192 0x4 0x2 0x1 0x192 0x4 0x3 0x1 0x192 0x4 0x4 0x1 0x192 0x4 0x5 0x1 0x192 0x4 0x6 0x1 0x192 0x4 0x7 0x1 0x192>;
7673		- phandle = <0x30d>;
	7673	+ phandle = <0x315>;
7674	7674	};
7675	7675	};
7676	7676
..	..	@@ -7678,17 +7678,17 @@
7678	7678
7679	7679	clk32k-in {
7680	7680	rockchip,pins = <0x0 0xa 0x1 0x192>;
7681		- phandle = <0x30e>;
	7681	+ phandle = <0x316>;
7682	7682	};
7683	7683
7684	7684	clk32k-out0 {
7685	7685	rockchip,pins = <0x0 0xa 0x2 0x192>;
7686		- phandle = <0x30f>;
	7686	+ phandle = <0x317>;
7687	7687	};
7688	7688
7689	7689	clk32k-out1 {
7690	7690	rockchip,pins = <0x2 0x15 0x1 0x192>;
7691		- phandle = <0x310>;
	7691	+ phandle = <0x318>;
7692	7692	};
7693	7693	};
7694	7694
..	..	@@ -7696,7 +7696,7 @@
7696	7696
7697	7697	cpu-pins {
7698	7698	rockchip,pins = <0x0 0x19 0x2 0x192 0x0 0x1d 0x2 0x192>;
7699		- phandle = <0x311>;
	7699	+ phandle = <0x319>;
7700	7700	};
7701	7701	};
7702	7702
..	..	@@ -7704,7 +7704,7 @@
7704	7704
7705	7705	ddrphych0-pins {
7706	7706	rockchip,pins = <0x4 0x0 0x7 0x192 0x4 0x1 0x7 0x192 0x4 0x2 0x7 0x192 0x4 0x3 0x7 0x192>;
7707		- phandle = <0x312>;
	7707	+ phandle = <0x31a>;
7708	7708	};
7709	7709	};
7710	7710
..	..	@@ -7712,7 +7712,7 @@
7712	7712
7713	7713	ddrphych1-pins {
7714	7714	rockchip,pins = <0x4 0x4 0x7 0x192 0x4 0x5 0x7 0x192 0x4 0x6 0x7 0x192 0x4 0x7 0x7 0x192>;
7715		- phandle = <0x313>;
	7715	+ phandle = <0x31b>;
7716	7716	};
7717	7717	};
7718	7718
..	..	@@ -7720,7 +7720,7 @@
7720	7720
7721	7721	ddrphych2-pins {
7722	7722	rockchip,pins = <0x4 0x8 0x7 0x192 0x4 0x9 0x7 0x192 0x4 0xa 0x7 0x192 0x4 0xb 0x7 0x192>;
7723		- phandle = <0x314>;
	7723	+ phandle = <0x31c>;
7724	7724	};
7725	7725	};
7726	7726
..	..	@@ -7728,7 +7728,7 @@
7728	7728
7729	7729	ddrphych3-pins {
7730	7730	rockchip,pins = <0x4 0xc 0x7 0x192 0x4 0xd 0x7 0x192 0x4 0xe 0x7 0x192 0x4 0xf 0x7 0x192>;
7731		- phandle = <0x315>;
	7731	+ phandle = <0x31d>;
7732	7732	};
7733	7733	};
7734	7734
..	..	@@ -7736,17 +7736,17 @@
7736	7736
7737	7737	dp0m0-pins {
7738	7738	rockchip,pins = <0x4 0xc 0x5 0x192>;
7739		- phandle = <0x316>;
	7739	+ phandle = <0x31e>;
7740	7740	};
7741	7741
7742	7742	dp0m1-pins {
7743	7743	rockchip,pins = <0x0 0x14 0xa 0x192>;
7744		- phandle = <0x317>;
	7744	+ phandle = <0x31f>;
7745	7745	};
7746	7746
7747	7747	dp0m2-pins {
7748	7748	rockchip,pins = <0x1 0x0 0x5 0x192>;
7749		- phandle = <0x318>;
	7749	+ phandle = <0x320>;
7750	7750	};
7751	7751	};
7752	7752
..	..	@@ -7759,12 +7759,12 @@
7759	7759
7760	7760	dp1m1-pins {
7761	7761	rockchip,pins = <0x0 0x15 0xa 0x192>;
7762		- phandle = <0x319>;
	7762	+ phandle = <0x321>;
7763	7763	};
7764	7764
7765	7765	dp1m2-pins {
7766	7766	rockchip,pins = <0x1 0x1 0x5 0x192>;
7767		- phandle = <0x31a>;
	7767	+ phandle = <0x322>;
7768	7768	};
7769	7769	};
7770	7770
..	..	@@ -7772,27 +7772,27 @@
7772	7772
7773	7773	emmc-rstnout {
7774	7774	rockchip,pins = <0x2 0x3 0x1 0x192>;
7775		- phandle = <0x31b>;
	7775	+ phandle = <0x323>;
7776	7776	};
7777	7777
7778	7778	emmc-bus8 {
7779	7779	rockchip,pins = <0x2 0x18 0x1 0x193 0x2 0x19 0x1 0x193 0x2 0x1a 0x1 0x193 0x2 0x1b 0x1 0x193 0x2 0x1c 0x1 0x193 0x2 0x1d 0x1 0x193 0x2 0x1e 0x1 0x193 0x2 0x1f 0x1 0x193>;
7780		- phandle = <0x31c>;
	7780	+ phandle = <0x324>;
7781	7781	};
7782	7782
7783	7783	emmc-clk {
7784	7784	rockchip,pins = <0x2 0x1 0x1 0x193>;
7785		- phandle = <0x31d>;
	7785	+ phandle = <0x325>;
7786	7786	};
7787	7787
7788	7788	emmc-cmd {
7789	7789	rockchip,pins = <0x2 0x0 0x1 0x193>;
7790		- phandle = <0x31e>;
	7790	+ phandle = <0x326>;
7791	7791	};
7792	7792
7793	7793	emmc-data-strobe {
7794	7794	rockchip,pins = <0x2 0x2 0x1 0x192>;
7795		- phandle = <0x31f>;
	7795	+ phandle = <0x327>;
7796	7796	};
7797	7797	};
7798	7798
..	..	@@ -7800,7 +7800,7 @@
7800	7800
7801	7801	eth1-pins {
7802	7802	rockchip,pins = <0x3 0x6 0x1 0x192>;
7803		- phandle = <0x320>;
	7803	+ phandle = <0x328>;
7804	7804	};
7805	7805	};
7806	7806
..	..	@@ -7808,32 +7808,32 @@
7808	7808
7809	7809	fspim0-pins {
7810	7810	rockchip,pins = <0x2 0x0 0x2 0x193 0x2 0x1e 0x2 0x193 0x2 0x18 0x2 0x193 0x2 0x19 0x2 0x193 0x2 0x1a 0x2 0x193 0x2 0x1b 0x2 0x193>;
7811		- phandle = <0x321>;
	7811	+ phandle = <0x329>;
7812	7812	};
7813	7813
7814	7814	fspim0-cs1 {
7815	7815	rockchip,pins = <0x2 0x1f 0x2 0x193>;
7816		- phandle = <0x322>;
	7816	+ phandle = <0x32a>;
7817	7817	};
7818	7818
7819	7819	fspim2-pins {
7820	7820	rockchip,pins = <0x3 0x5 0x5 0x193 0x3 0x14 0x2 0x193 0x3 0x0 0x5 0x193 0x3 0x1 0x5 0x193 0x3 0x2 0x5 0x193 0x3 0x3 0x5 0x193>;
7821		- phandle = <0x323>;
	7821	+ phandle = <0x32b>;
7822	7822	};
7823	7823
7824	7824	fspim2-cs1 {
7825	7825	rockchip,pins = <0x3 0x15 0x2 0x193>;
7826		- phandle = <0x324>;
	7826	+ phandle = <0x32c>;
7827	7827	};
7828	7828
7829	7829	fspim1-pins {
7830	7830	rockchip,pins = <0x2 0xb 0x3 0x193 0x2 0xc 0x3 0x193 0x2 0x6 0x3 0x193 0x2 0x7 0x3 0x193 0x2 0x8 0x3 0x193 0x2 0x9 0x3 0x193>;
7831		- phandle = <0x325>;
	7831	+ phandle = <0x32d>;
7832	7832	};
7833	7833
7834	7834	fspim1-cs1 {
7835	7835	rockchip,pins = <0x2 0xd 0x3 0x193>;
7836		- phandle = <0x326>;
	7836	+ phandle = <0x32e>;
7837	7837	};
7838	7838	};
7839	7839
..	..	@@ -7846,7 +7846,7 @@
7846	7846
7847	7847	gmac1-clkinout {
7848	7848	rockchip,pins = <0x3 0xe 0x1 0x192>;
7849		- phandle = <0x327>;
	7849	+ phandle = <0x32f>;
7850	7850	};
7851	7851
7852	7852	gmac1-rx-bus2 {
..	..	@@ -7871,22 +7871,22 @@
7871	7871
7872	7872	gmac1-ppsclk {
7873	7873	rockchip,pins = <0x3 0x11 0x1 0x192>;
7874		- phandle = <0x328>;
	7874	+ phandle = <0x330>;
7875	7875	};
7876	7876
7877	7877	gmac1-ppstrig {
7878	7878	rockchip,pins = <0x3 0x10 0x1 0x192>;
7879		- phandle = <0x329>;
	7879	+ phandle = <0x331>;
7880	7880	};
7881	7881
7882	7882	gmac1-ptp-ref-clk {
7883	7883	rockchip,pins = <0x3 0xf 0x1 0x192>;
7884		- phandle = <0x32a>;
	7884	+ phandle = <0x332>;
7885	7885	};
7886	7886
7887	7887	gmac1-txer {
7888	7888	rockchip,pins = <0x3 0xa 0x1 0x192>;
7889		- phandle = <0x32b>;
	7889	+ phandle = <0x333>;
7890	7890	};
7891	7891	};
7892	7892
..	..	@@ -7894,7 +7894,7 @@
7894	7894
7895	7895	gpu-pins {
7896	7896	rockchip,pins = <0x0 0x15 0x2 0x192>;
7897		- phandle = <0x32c>;
	7897	+ phandle = <0x334>;
7898	7898	};
7899	7899	};
7900	7900
..	..	@@ -7902,22 +7902,22 @@
7902	7902
7903	7903	hdmim0-rx-cec {
7904	7904	rockchip,pins = <0x4 0xd 0x5 0x192>;
7905		- phandle = <0x32d>;
	7905	+ phandle = <0x335>;
7906	7906	};
7907	7907
7908	7908	hdmim0-rx-hpdin {
7909	7909	rockchip,pins = <0x4 0xe 0x5 0x192>;
7910		- phandle = <0x32e>;
	7910	+ phandle = <0x336>;
7911	7911	};
7912	7912
7913	7913	hdmim0-rx-scl {
7914	7914	rockchip,pins = <0x0 0x1a 0xb 0x192>;
7915		- phandle = <0x32f>;
	7915	+ phandle = <0x337>;
7916	7916	};
7917	7917
7918	7918	hdmim0-rx-sda {
7919	7919	rockchip,pins = <0x0 0x19 0xb 0x192>;
7920		- phandle = <0x330>;
	7920	+ phandle = <0x338>;
7921	7921	};
7922	7922
7923	7923	hdmim0-tx0-cec {
..	..	@@ -7952,52 +7952,52 @@
7952	7952
7953	7953	hdmim1-rx-cec {
7954	7954	rockchip,pins = <0x3 0x19 0x5 0x192>;
7955		- phandle = <0x331>;
	7955	+ phandle = <0x339>;
7956	7956	};
7957	7957
7958	7958	hdmim1-rx-hpdin {
7959	7959	rockchip,pins = <0x3 0x1c 0x5 0x192>;
7960		- phandle = <0x332>;
	7960	+ phandle = <0x33a>;
7961	7961	};
7962	7962
7963	7963	hdmim1-rx-scl {
7964	7964	rockchip,pins = <0x3 0x1a 0x5 0x196>;
7965		- phandle = <0x333>;
	7965	+ phandle = <0x33b>;
7966	7966	};
7967	7967
7968	7968	hdmim1-rx-sda {
7969	7969	rockchip,pins = <0x3 0x1b 0x5 0x196>;
7970		- phandle = <0x334>;
	7970	+ phandle = <0x33c>;
7971	7971	};
7972	7972
7973	7973	hdmim1-tx0-cec {
7974	7974	rockchip,pins = <0x0 0x19 0xd 0x192>;
7975		- phandle = <0x335>;
	7975	+ phandle = <0x33d>;
7976	7976	};
7977	7977
7978	7978	hdmim1-tx0-hpd {
7979	7979	rockchip,pins = <0x3 0x1c 0x3 0x192>;
7980		- phandle = <0x336>;
	7980	+ phandle = <0x33e>;
7981	7981	};
7982	7982
7983	7983	hdmim1-tx0-scl {
7984	7984	rockchip,pins = <0x0 0x1d 0xb 0x194>;
7985		- phandle = <0x337>;
	7985	+ phandle = <0x33f>;
7986	7986	};
7987	7987
7988	7988	hdmim1-tx0-sda {
7989	7989	rockchip,pins = <0x0 0x1c 0xb 0x195>;
7990		- phandle = <0x338>;
	7990	+ phandle = <0x340>;
7991	7991	};
7992	7992
7993	7993	hdmim1-tx1-cec {
7994	7994	rockchip,pins = <0x0 0x1a 0xd 0x192>;
7995		- phandle = <0x339>;
	7995	+ phandle = <0x341>;
7996	7996	};
7997	7997
7998	7998	hdmim1-tx1-hpd {
7999	7999	rockchip,pins = <0x3 0xf 0x5 0x192>;
8000		- phandle = <0x33a>;
	8000	+ phandle = <0x342>;
8001	8001	};
8002	8002
8003	8003	hdmim1-tx1-scl {
..	..	@@ -8012,32 +8012,32 @@
8012	8012
8013	8013	hdmim2-rx-cec {
8014	8014	rockchip,pins = <0x1 0xf 0x5 0x192>;
8015		- phandle = <0x33b>;
	8015	+ phandle = <0x343>;
8016	8016	};
8017	8017
8018	8018	hdmim2-rx-hpdin {
8019	8019	rockchip,pins = <0x1 0xe 0x5 0x192>;
8020		- phandle = <0x33c>;
	8020	+ phandle = <0x344>;
8021	8021	};
8022	8022
8023	8023	hdmim2-rx-scl {
8024	8024	rockchip,pins = <0x1 0x1e 0x5 0x192>;
8025		- phandle = <0x33d>;
	8025	+ phandle = <0x345>;
8026	8026	};
8027	8027
8028	8028	hdmim2-rx-sda {
8029	8029	rockchip,pins = <0x1 0x1f 0x5 0x192>;
8030		- phandle = <0x33e>;
	8030	+ phandle = <0x346>;
8031	8031	};
8032	8032
8033	8033	hdmim2-tx0-scl {
8034	8034	rockchip,pins = <0x3 0x17 0x5 0x194>;
8035		- phandle = <0x33f>;
	8035	+ phandle = <0x347>;
8036	8036	};
8037	8037
8038	8038	hdmim2-tx0-sda {
8039	8039	rockchip,pins = <0x3 0x18 0x5 0x195>;
8040		- phandle = <0x340>;
	8040	+ phandle = <0x348>;
8041	8041	};
8042	8042
8043	8043	hdmim2-tx1-cec {
..	..	@@ -8047,62 +8047,62 @@
8047	8047
8048	8048	hdmim2-tx1-scl {
8049	8049	rockchip,pins = <0x1 0x4 0x5 0x194>;
8050		- phandle = <0x341>;
	8050	+ phandle = <0x349>;
8051	8051	};
8052	8052
8053	8053	hdmim2-tx1-sda {
8054	8054	rockchip,pins = <0x1 0x3 0x5 0x195>;
8055		- phandle = <0x342>;
	8055	+ phandle = <0x34a>;
8056	8056	};
8057	8057
8058	8058	hdmi-debug0 {
8059	8059	rockchip,pins = <0x1 0x7 0x7 0x192>;
8060		- phandle = <0x343>;
	8060	+ phandle = <0x34b>;
8061	8061	};
8062	8062
8063	8063	hdmi-debug1 {
8064	8064	rockchip,pins = <0x1 0x8 0x7 0x192>;
8065		- phandle = <0x344>;
	8065	+ phandle = <0x34c>;
8066	8066	};
8067	8067
8068	8068	hdmi-debug2 {
8069	8069	rockchip,pins = <0x1 0x9 0x7 0x192>;
8070		- phandle = <0x345>;
	8070	+ phandle = <0x34d>;
8071	8071	};
8072	8072
8073	8073	hdmi-debug3 {
8074	8074	rockchip,pins = <0x1 0xa 0x7 0x192>;
8075		- phandle = <0x346>;
	8075	+ phandle = <0x34e>;
8076	8076	};
8077	8077
8078	8078	hdmi-debug4 {
8079	8079	rockchip,pins = <0x1 0xb 0x7 0x192>;
8080		- phandle = <0x347>;
	8080	+ phandle = <0x34f>;
8081	8081	};
8082	8082
8083	8083	hdmi-debug5 {
8084	8084	rockchip,pins = <0x1 0xc 0x7 0x192>;
8085		- phandle = <0x348>;
	8085	+ phandle = <0x350>;
8086	8086	};
8087	8087
8088	8088	hdmi-debug6 {
8089	8089	rockchip,pins = <0x1 0x0 0x7 0x192>;
8090		- phandle = <0x349>;
	8090	+ phandle = <0x351>;
8091	8091	};
8092	8092
8093	8093	hdmim0-tx1-cec {
8094	8094	rockchip,pins = <0x2 0x14 0x4 0x192>;
8095		- phandle = <0x34a>;
	8095	+ phandle = <0x352>;
8096	8096	};
8097	8097
8098	8098	hdmim0-tx1-scl {
8099	8099	rockchip,pins = <0x2 0xd 0x4 0x192>;
8100		- phandle = <0x34b>;
	8100	+ phandle = <0x353>;
8101	8101	};
8102	8102
8103	8103	hdmim0-tx1-sda {
8104	8104	rockchip,pins = <0x2 0xc 0x4 0x192>;
8105		- phandle = <0x34c>;
	8105	+ phandle = <0x354>;
8106	8106	};
8107	8107
8108	8108	hdmirx-det {
..	..	@@ -8115,7 +8115,7 @@
8115	8115
8116	8116	i2c0m0-xfer {
8117	8117	rockchip,pins = <0x0 0xb 0x2 0x196 0x0 0x6 0x2 0x196>;
8118		- phandle = <0x34d>;
	8118	+ phandle = <0x355>;
8119	8119	};
8120	8120
8121	8121	i2c0m2-xfer {
..	..	@@ -8125,7 +8125,7 @@
8125	8125
8126	8126	i2c0m1-xfer {
8127	8127	rockchip,pins = <0x4 0x15 0x9 0x196 0x4 0x16 0x9 0x196>;
8128		- phandle = <0x34e>;
	8128	+ phandle = <0x356>;
8129	8129	};
8130	8130	};
8131	8131
..	..	@@ -8133,12 +8133,12 @@
8133	8133
8134	8134	i2c1m0-xfer {
8135	8135	rockchip,pins = <0x0 0xd 0x9 0x196 0x0 0xe 0x9 0x196>;
8136		- phandle = <0x34f>;
	8136	+ phandle = <0x357>;
8137	8137	};
8138	8138
8139	8139	i2c1m1-xfer {
8140	8140	rockchip,pins = <0x0 0x8 0x2 0x196 0x0 0x9 0x2 0x196>;
8141		- phandle = <0x350>;
	8141	+ phandle = <0x358>;
8142	8142	};
8143	8143
8144	8144	i2c1m2-xfer {
..	..	@@ -8148,12 +8148,12 @@
8148	8148
8149	8149	i2c1m3-xfer {
8150	8150	rockchip,pins = <0x2 0x1c 0x9 0x196 0x2 0x1d 0x9 0x196>;
8151		- phandle = <0x351>;
	8151	+ phandle = <0x359>;
8152	8152	};
8153	8153
8154	8154	i2c1m4-xfer {
8155	8155	rockchip,pins = <0x1 0x1a 0x9 0x196 0x1 0x1b 0x9 0x196>;
8156		- phandle = <0x352>;
	8156	+ phandle = <0x35a>;
8157	8157	};
8158	8158	};
8159	8159
..	..	@@ -8166,22 +8166,22 @@
8166	8166
8167	8167	i2c2m2-xfer {
8168	8168	rockchip,pins = <0x2 0x3 0x9 0x196 0x2 0x2 0x9 0x196>;
8169		- phandle = <0x353>;
	8169	+ phandle = <0x35b>;
8170	8170	};
8171	8171
8172	8172	i2c2m3-xfer {
8173	8173	rockchip,pins = <0x1 0x15 0x9 0x196 0x1 0x14 0x9 0x196>;
8174		- phandle = <0x354>;
	8174	+ phandle = <0x35c>;
8175	8175	};
8176	8176
8177	8177	i2c2m4-xfer {
8178	8178	rockchip,pins = <0x1 0x1 0x9 0x196 0x1 0x0 0x9 0x196>;
8179		- phandle = <0x355>;
	8179	+ phandle = <0x35d>;
8180	8180	};
8181	8181
8182	8182	i2c2m1-xfer {
8183	8183	rockchip,pins = <0x2 0x11 0x9 0x196 0x2 0x10 0x9 0x196>;
8184		- phandle = <0x356>;
	8184	+ phandle = <0x35e>;
8185	8185	};
8186	8186	};
8187	8187
..	..	@@ -8194,22 +8194,22 @@
8194	8194
8195	8195	i2c3m1-xfer {
8196	8196	rockchip,pins = <0x3 0xf 0x9 0x196 0x3 0x10 0x9 0x196>;
8197		- phandle = <0x357>;
	8197	+ phandle = <0x35f>;
8198	8198	};
8199	8199
8200	8200	i2c3m2-xfer {
8201	8201	rockchip,pins = <0x4 0x4 0x9 0x196 0x4 0x5 0x9 0x196>;
8202		- phandle = <0x358>;
	8202	+ phandle = <0x360>;
8203	8203	};
8204	8204
8205	8205	i2c3m4-xfer {
8206	8206	rockchip,pins = <0x4 0x18 0x9 0x196 0x4 0x19 0x9 0x196>;
8207		- phandle = <0x359>;
	8207	+ phandle = <0x361>;
8208	8208	};
8209	8209
8210	8210	i2c3m3-xfer {
8211	8211	rockchip,pins = <0x2 0xa 0x9 0x196 0x2 0xb 0x9 0x196>;
8212		- phandle = <0x35a>;
	8212	+ phandle = <0x362>;
8213	8213	};
8214	8214	};
8215	8215
..	..	@@ -8217,22 +8217,22 @@
8217	8217
8218	8218	i2c4m0-xfer {
8219	8219	rockchip,pins = <0x3 0x6 0x9 0x196 0x3 0x5 0x9 0x196>;
8220		- phandle = <0x35b>;
	8220	+ phandle = <0x363>;
8221	8221	};
8222	8222
8223	8223	i2c4m2-xfer {
8224	8224	rockchip,pins = <0x0 0x15 0x9 0x196 0x0 0x14 0x9 0x196>;
8225		- phandle = <0x35c>;
	8225	+ phandle = <0x364>;
8226	8226	};
8227	8227
8228	8228	i2c4m3-xfer {
8229	8229	rockchip,pins = <0x1 0x3 0x9 0x196 0x1 0x2 0x9 0x196>;
8230		- phandle = <0x35d>;
	8230	+ phandle = <0x365>;
8231	8231	};
8232	8232
8233	8233	i2c4m4-xfer {
8234	8234	rockchip,pins = <0x1 0x17 0x9 0x196 0x1 0x16 0x9 0x196>;
8235		- phandle = <0x35e>;
	8235	+ phandle = <0x366>;
8236	8236	};
8237	8237
8238	8238	i2c4m1-xfer {
..	..	@@ -8250,22 +8250,22 @@
8250	8250
8251	8251	i2c5m1-xfer {
8252	8252	rockchip,pins = <0x4 0xe 0x9 0x196 0x4 0xf 0x9 0x196>;
8253		- phandle = <0x35f>;
	8253	+ phandle = <0x367>;
8254	8254	};
8255	8255
8256	8256	i2c5m2-xfer {
8257	8257	rockchip,pins = <0x4 0x6 0x9 0x196 0x4 0x7 0x9 0x196>;
8258		- phandle = <0x360>;
	8258	+ phandle = <0x368>;
8259	8259	};
8260	8260
8261	8261	i2c5m3-xfer {
8262	8262	rockchip,pins = <0x1 0xe 0x9 0x196 0x1 0xf 0x9 0x196>;
8263		- phandle = <0x361>;
	8263	+ phandle = <0x369>;
8264	8264	};
8265	8265
8266	8266	i2c5m4-xfer {
8267	8267	rockchip,pins = <0x2 0xe 0x9 0x196 0x2 0xf 0x9 0x196>;
8268		- phandle = <0x362>;
	8268	+ phandle = <0x36a>;
8269	8269	};
8270	8270	};
8271	8271
..	..	@@ -8278,22 +8278,22 @@
8278	8278
8279	8279	i2c6m1-xfer {
8280	8280	rockchip,pins = <0x1 0x13 0x9 0x196 0x1 0x12 0x9 0x196>;
8281		- phandle = <0x363>;
	8281	+ phandle = <0x36b>;
8282	8282	};
8283	8283
8284	8284	i2c6m3-xfer {
8285	8285	rockchip,pins = <0x4 0x9 0x9 0x196 0x4 0x8 0x9 0x196>;
8286		- phandle = <0x364>;
	8286	+ phandle = <0x36c>;
8287	8287	};
8288	8288
8289	8289	i2c6m4-xfer {
8290	8290	rockchip,pins = <0x3 0x1 0x9 0x196 0x3 0x0 0x9 0x196>;
8291		- phandle = <0x365>;
	8291	+ phandle = <0x36d>;
8292	8292	};
8293	8293
8294	8294	i2c6m2-xfer {
8295	8295	rockchip,pins = <0x2 0x13 0x9 0x196 0x2 0x12 0x9 0x196>;
8296		- phandle = <0x366>;
	8296	+ phandle = <0x36e>;
8297	8297	};
8298	8298	};
8299	8299
..	..	@@ -8306,17 +8306,17 @@
8306	8306
8307	8307	i2c7m2-xfer {
8308	8308	rockchip,pins = <0x3 0x1a 0x9 0x196 0x3 0x1b 0x9 0x196>;
8309		- phandle = <0x367>;
	8309	+ phandle = <0x36f>;
8310	8310	};
8311	8311
8312	8312	i2c7m3-xfer {
8313	8313	rockchip,pins = <0x4 0xa 0x9 0x196 0x4 0xb 0x9 0x196>;
8314		- phandle = <0x368>;
	8314	+ phandle = <0x370>;
8315	8315	};
8316	8316
8317	8317	i2c7m1-xfer {
8318	8318	rockchip,pins = <0x4 0x13 0x9 0x196 0x4 0x14 0x9 0x196>;
8319		- phandle = <0x369>;
	8319	+ phandle = <0x371>;
8320	8320	};
8321	8321	};
8322	8322
..	..	@@ -8329,22 +8329,22 @@
8329	8329
8330	8330	i2c8m2-xfer {
8331	8331	rockchip,pins = <0x1 0x1e 0x9 0x196 0x1 0x1f 0x9 0x196>;
8332		- phandle = <0x36a>;
	8332	+ phandle = <0x372>;
8333	8333	};
8334	8334
8335	8335	i2c8m3-xfer {
8336	8336	rockchip,pins = <0x4 0x10 0x9 0x196 0x4 0x11 0x9 0x196>;
8337		- phandle = <0x36b>;
	8337	+ phandle = <0x373>;
8338	8338	};
8339	8339
8340	8340	i2c8m4-xfer {
8341	8341	rockchip,pins = <0x3 0x12 0x9 0x196 0x3 0x13 0x9 0x196>;
8342		- phandle = <0x36c>;
	8342	+ phandle = <0x374>;
8343	8343	};
8344	8344
8345	8345	i2c8m1-xfer {
8346	8346	rockchip,pins = <0x2 0x8 0x9 0x196 0x2 0x9 0x9 0x196>;
8347		- phandle = <0x36d>;
	8347	+ phandle = <0x375>;
8348	8348	};
8349	8349	};
8350	8350
..	..	@@ -8377,17 +8377,17 @@
8377	8377
8378	8378	i2s0-sdi1 {
8379	8379	rockchip,pins = <0x1 0x1b 0x2 0x192>;
8380		- phandle = <0x36e>;
	8380	+ phandle = <0x376>;
8381	8381	};
8382	8382
8383	8383	i2s0-sdi2 {
8384	8384	rockchip,pins = <0x1 0x1a 0x2 0x192>;
8385		- phandle = <0x36f>;
	8385	+ phandle = <0x377>;
8386	8386	};
8387	8387
8388	8388	i2s0-sdi3 {
8389	8389	rockchip,pins = <0x1 0x19 0x2 0x192>;
8390		- phandle = <0x370>;
	8390	+ phandle = <0x378>;
8391	8391	};
8392	8392
8393	8393	i2s0-sdo0 {
..	..	@@ -8397,17 +8397,17 @@
8397	8397
8398	8398	i2s0-sdo1 {
8399	8399	rockchip,pins = <0x1 0x18 0x1 0x192>;
8400		- phandle = <0x371>;
	8400	+ phandle = <0x379>;
8401	8401	};
8402	8402
8403	8403	i2s0-sdo2 {
8404	8404	rockchip,pins = <0x1 0x19 0x1 0x192>;
8405		- phandle = <0x372>;
	8405	+ phandle = <0x37a>;
8406	8406	};
8407	8407
8408	8408	i2s0-sdo3 {
8409	8409	rockchip,pins = <0x1 0x1a 0x1 0x192>;
8410		- phandle = <0x373>;
	8410	+ phandle = <0x37b>;
8411	8411	};
8412	8412	};
8413	8413
..	..	@@ -8420,7 +8420,7 @@
8420	8420
8421	8421	i2s1m0-mclk {
8422	8422	rockchip,pins = <0x4 0x0 0x3 0x196>;
8423		- phandle = <0x374>;
	8423	+ phandle = <0x37c>;
8424	8424	};
8425	8425
8426	8426	i2s1m0-sclk {
..	..	@@ -8470,57 +8470,57 @@
8470	8470
8471	8471	i2s1m1-lrck {
8472	8472	rockchip,pins = <0x0 0xf 0x1 0x196>;
8473		- phandle = <0x375>;
	8473	+ phandle = <0x37d>;
8474	8474	};
8475	8475
8476	8476	i2s1m1-mclk {
8477	8477	rockchip,pins = <0x0 0xd 0x1 0x196>;
8478		- phandle = <0x376>;
	8478	+ phandle = <0x37e>;
8479	8479	};
8480	8480
8481	8481	i2s1m1-sclk {
8482	8482	rockchip,pins = <0x0 0xe 0x1 0x196>;
8483		- phandle = <0x377>;
	8483	+ phandle = <0x37f>;
8484	8484	};
8485	8485
8486	8486	i2s1m1-sdi0 {
8487	8487	rockchip,pins = <0x0 0x15 0x1 0x192>;
8488		- phandle = <0x378>;
	8488	+ phandle = <0x380>;
8489	8489	};
8490	8490
8491	8491	i2s1m1-sdi1 {
8492	8492	rockchip,pins = <0x0 0x16 0x1 0x192>;
8493		- phandle = <0x379>;
	8493	+ phandle = <0x381>;
8494	8494	};
8495	8495
8496	8496	i2s1m1-sdi2 {
8497	8497	rockchip,pins = <0x0 0x17 0x1 0x192>;
8498		- phandle = <0x37a>;
	8498	+ phandle = <0x382>;
8499	8499	};
8500	8500
8501	8501	i2s1m1-sdi3 {
8502	8502	rockchip,pins = <0x0 0x18 0x1 0x192>;
8503		- phandle = <0x37b>;
	8503	+ phandle = <0x383>;
8504	8504	};
8505	8505
8506	8506	i2s1m1-sdo0 {
8507	8507	rockchip,pins = <0x0 0x19 0x1 0x192>;
8508		- phandle = <0x37c>;
	8508	+ phandle = <0x384>;
8509	8509	};
8510	8510
8511	8511	i2s1m1-sdo1 {
8512	8512	rockchip,pins = <0x0 0x1a 0x1 0x192>;
8513		- phandle = <0x37d>;
	8513	+ phandle = <0x385>;
8514	8514	};
8515	8515
8516	8516	i2s1m1-sdo2 {
8517	8517	rockchip,pins = <0x0 0x1c 0x1 0x192>;
8518		- phandle = <0x37e>;
	8518	+ phandle = <0x386>;
8519	8519	};
8520	8520
8521	8521	i2s1m1-sdo3 {
8522	8522	rockchip,pins = <0x0 0x1d 0x1 0x192>;
8523		- phandle = <0x37f>;
	8523	+ phandle = <0x387>;
8524	8524	};
8525	8525	};
8526	8526
..	..	@@ -8538,7 +8538,7 @@
8538	8538
8539	8539	i2s2m1-mclk {
8540	8540	rockchip,pins = <0x3 0xc 0x3 0x196>;
8541		- phandle = <0x380>;
	8541	+ phandle = <0x388>;
8542	8542	};
8543	8543
8544	8544	i2s2m1-sclk {
..	..	@@ -8548,17 +8548,17 @@
8548	8548
8549	8549	i2s2m1-sdi {
8550	8550	rockchip,pins = <0x3 0xa 0x3 0x192>;
8551		- phandle = <0x381>;
	8551	+ phandle = <0x389>;
8552	8552	};
8553	8553
8554	8554	i2s2m1-sdo {
8555	8555	rockchip,pins = <0x3 0xb 0x3 0x192>;
8556		- phandle = <0x382>;
	8556	+ phandle = <0x38a>;
8557	8557	};
8558	8558
8559	8559	i2s2m0-idle {
8560	8560	rockchip,pins = <0x2 0x10 0x0 0x192 0x2 0xf 0x0 0x192>;
8561		- phandle = <0x383>;
	8561	+ phandle = <0x38b>;
8562	8562	};
8563	8563
8564	8564	i2s2m0-lrck {
..	..	@@ -8568,7 +8568,7 @@
8568	8568
8569	8569	i2s2m0-mclk {
8570	8570	rockchip,pins = <0x2 0xe 0x2 0x196>;
8571		- phandle = <0x384>;
	8571	+ phandle = <0x38c>;
8572	8572	};
8573	8573
8574	8574	i2s2m0-sclk {
..	..	@@ -8601,7 +8601,7 @@
8601	8601
8602	8602	i2s3-mclk {
8603	8603	rockchip,pins = <0x3 0x0 0x3 0x196>;
8604		- phandle = <0x385>;
	8604	+ phandle = <0x38d>;
8605	8605	};
8606	8606
8607	8607	i2s3-sclk {
..	..	@@ -8624,17 +8624,17 @@
8624	8624
8625	8625	jtagm0-pins {
8626	8626	rockchip,pins = <0x4 0x1a 0x5 0x192 0x4 0x1b 0x5 0x192>;
8627		- phandle = <0x386>;
	8627	+ phandle = <0x38e>;
8628	8628	};
8629	8629
8630	8630	jtagm1-pins {
8631	8631	rockchip,pins = <0x4 0x18 0x5 0x192 0x4 0x19 0x5 0x192>;
8632		- phandle = <0x387>;
	8632	+ phandle = <0x38f>;
8633	8633	};
8634	8634
8635	8635	jtagm2-pins {
8636	8636	rockchip,pins = <0x0 0xd 0x2 0x192 0x0 0xe 0x2 0x192>;
8637		- phandle = <0x388>;
	8637	+ phandle = <0x390>;
8638	8638	};
8639	8639	};
8640	8640
..	..	@@ -8642,7 +8642,7 @@
8642	8642
8643	8643	litcpu-pins {
8644	8644	rockchip,pins = <0x0 0x1b 0x1 0x192>;
8645		- phandle = <0x389>;
	8645	+ phandle = <0x391>;
8646	8646	};
8647	8647	};
8648	8648
..	..	@@ -8650,12 +8650,12 @@
8650	8650
8651	8651	mcum0-pins {
8652	8652	rockchip,pins = <0x4 0x1c 0x5 0x192 0x4 0x1d 0x5 0x192>;
8653		- phandle = <0x38a>;
	8653	+ phandle = <0x392>;
8654	8654	};
8655	8655
8656	8656	mcum1-pins {
8657	8657	rockchip,pins = <0x3 0x1c 0x6 0x192 0x3 0x1d 0x6 0x192>;
8658		- phandle = <0x38b>;
	8658	+ phandle = <0x393>;
8659	8659	};
8660	8660	};
8661	8661
..	..	@@ -8663,62 +8663,62 @@
8663	8663
8664	8664	mipim0-camera0-clk {
8665	8665	rockchip,pins = <0x4 0x9 0x1 0x192>;
8666		- phandle = <0x38c>;
	8666	+ phandle = <0x394>;
8667	8667	};
8668	8668
8669	8669	mipim0-camera1-clk {
8670	8670	rockchip,pins = <0x1 0xe 0x2 0x192>;
8671		- phandle = <0x38d>;
	8671	+ phandle = <0x395>;
8672	8672	};
8673	8673
8674	8674	mipim0-camera2-clk {
8675	8675	rockchip,pins = <0x1 0xf 0x2 0x192>;
8676		- phandle = <0x38e>;
	8676	+ phandle = <0x396>;
8677	8677	};
8678	8678
8679	8679	mipim0-camera3-clk {
8680	8680	rockchip,pins = <0x1 0x1e 0x2 0x192>;
8681		- phandle = <0x38f>;
	8681	+ phandle = <0x397>;
8682	8682	};
8683	8683
8684	8684	mipim0-camera4-clk {
8685	8685	rockchip,pins = <0x1 0x1f 0x2 0x192>;
8686		- phandle = <0x390>;
	8686	+ phandle = <0x398>;
8687	8687	};
8688	8688
8689	8689	mipim1-camera0-clk {
8690	8690	rockchip,pins = <0x3 0x5 0x4 0x192>;
8691		- phandle = <0x391>;
	8691	+ phandle = <0x399>;
8692	8692	};
8693	8693
8694	8694	mipim1-camera1-clk {
8695	8695	rockchip,pins = <0x3 0x6 0x4 0x192>;
8696		- phandle = <0x392>;
	8696	+ phandle = <0x39a>;
8697	8697	};
8698	8698
8699	8699	mipim1-camera2-clk {
8700	8700	rockchip,pins = <0x3 0x7 0x4 0x192>;
8701		- phandle = <0x393>;
	8701	+ phandle = <0x39b>;
8702	8702	};
8703	8703
8704	8704	mipim1-camera3-clk {
8705	8705	rockchip,pins = <0x3 0x8 0x4 0x192>;
8706		- phandle = <0x394>;
	8706	+ phandle = <0x39c>;
8707	8707	};
8708	8708
8709	8709	mipim1-camera4-clk {
8710	8710	rockchip,pins = <0x3 0x9 0x4 0x192>;
8711		- phandle = <0x395>;
	8711	+ phandle = <0x39d>;
8712	8712	};
8713	8713
8714	8714	mipi-te0 {
8715	8715	rockchip,pins = <0x3 0x12 0x2 0x192>;
8716		- phandle = <0x396>;
	8716	+ phandle = <0x39e>;
8717	8717	};
8718	8718
8719	8719	mipi-te1 {
8720	8720	rockchip,pins = <0x3 0x13 0x2 0x192>;
8721		- phandle = <0x397>;
	8721	+ phandle = <0x39f>;
8722	8722	};
8723	8723	};
8724	8724
..	..	@@ -8726,7 +8726,7 @@
8726	8726
8727	8727	npu-pins {
8728	8728	rockchip,pins = <0x0 0x16 0x2 0x192>;
8729		- phandle = <0x398>;
	8729	+ phandle = <0x3a0>;
8730	8730	};
8731	8731	};
8732	8732
..	..	@@ -8734,17 +8734,17 @@
8734	8734
8735	8735	pcie20x1m0-pins {
8736	8736	rockchip,pins = <0x3 0x17 0x4 0x192 0x3 0x19 0x4 0x192 0x3 0x18 0x4 0x192>;
8737		- phandle = <0x399>;
	8737	+ phandle = <0x3a1>;
8738	8738	};
8739	8739
8740	8740	pcie20x1m1-pins {
8741	8741	rockchip,pins = <0x4 0xf 0x4 0x192 0x4 0x11 0x4 0x192 0x4 0x10 0x4 0x192>;
8742		- phandle = <0x39a>;
	8742	+ phandle = <0x3a2>;
8743	8743	};
8744	8744
8745	8745	pcie20x1-2-button-rstn {
8746	8746	rockchip,pins = <0x4 0xb 0x4 0x192>;
8747		- phandle = <0x39b>;
	8747	+ phandle = <0x3a3>;
8748	8748	};
8749	8749	};
8750	8750
..	..	@@ -8752,7 +8752,7 @@
8752	8752
8753	8753	pcie30phy-pins {
8754	8754	rockchip,pins = <0x1 0x14 0x4 0x192 0x1 0x19 0x4 0x192>;
8755		- phandle = <0x39c>;
	8755	+ phandle = <0x3a4>;
8756	8756	};
8757	8757	};
8758	8758
..	..	@@ -8760,27 +8760,27 @@
8760	8760
8761	8761	pcie30x1m0-pins {
8762	8762	rockchip,pins = <0x0 0x10 0xc 0x192 0x0 0x15 0xc 0x192 0x0 0x14 0xc 0x192 0x0 0xd 0xc 0x192 0x0 0xf 0xc 0x192 0x0 0xe 0xc 0x192>;
8763		- phandle = <0x39d>;
	8763	+ phandle = <0x3a5>;
8764	8764	};
8765	8765
8766	8766	pcie30x1m1-pins {
8767	8767	rockchip,pins = <0x4 0x3 0x4 0x192 0x4 0x5 0x4 0x192 0x4 0x4 0x4 0x192 0x4 0x0 0x4 0x192 0x4 0x2 0x4 0x192 0x4 0x1 0x4 0x192>;
8768		- phandle = <0x39e>;
	8768	+ phandle = <0x3a6>;
8769	8769	};
8770	8770
8771	8771	pcie30x1m2-pins {
8772	8772	rockchip,pins = <0x1 0xd 0x4 0x192 0x1 0xc 0x4 0x192 0x1 0xb 0x4 0x192 0x1 0x0 0x4 0x192 0x1 0x7 0x4 0x192 0x1 0x1 0x4 0x192>;
8773		- phandle = <0x39f>;
	8773	+ phandle = <0x3a7>;
8774	8774	};
8775	8775
8776	8776	pcie30x1-0-button-rstn {
8777	8777	rockchip,pins = <0x4 0x9 0x4 0x192>;
8778		- phandle = <0x3a0>;
	8778	+ phandle = <0x3a8>;
8779	8779	};
8780	8780
8781	8781	pcie30x1-1-button-rstn {
8782	8782	rockchip,pins = <0x4 0xa 0x4 0x192>;
8783		- phandle = <0x3a1>;
	8783	+ phandle = <0x3a9>;
8784	8784	};
8785	8785	};
8786	8786
..	..	@@ -8788,27 +8788,27 @@
8788	8788
8789	8789	pcie30x2m0-pins {
8790	8790	rockchip,pins = <0x0 0x19 0xc 0x192 0x0 0x1c 0xc 0x192 0x0 0x1a 0xc 0x192>;
8791		- phandle = <0x3a2>;
	8791	+ phandle = <0x3aa>;
8792	8792	};
8793	8793
8794	8794	pcie30x2m1-pins {
8795	8795	rockchip,pins = <0x4 0x6 0x4 0x192 0x4 0x8 0x4 0x192 0x4 0x7 0x4 0x192>;
8796		- phandle = <0x3a3>;
	8796	+ phandle = <0x3ab>;
8797	8797	};
8798	8798
8799	8799	pcie30x2m2-pins {
8800	8800	rockchip,pins = <0x3 0x1a 0x4 0x192 0x3 0x1c 0x4 0x192 0x3 0x1b 0x4 0x192>;
8801		- phandle = <0x3a4>;
	8801	+ phandle = <0x3ac>;
8802	8802	};
8803	8803
8804	8804	pcie30x2m3-pins {
8805	8805	rockchip,pins = <0x1 0x1f 0x4 0x192 0x1 0xf 0x4 0x192 0x1 0xe 0x4 0x192>;
8806		- phandle = <0x3a5>;
	8806	+ phandle = <0x3ad>;
8807	8807	};
8808	8808
8809	8809	pcie30x2-button-rstn {
8810	8810	rockchip,pins = <0x3 0x11 0x4 0x192>;
8811		- phandle = <0x3a6>;
	8811	+ phandle = <0x3ae>;
8812	8812	};
8813	8813	};
8814	8814
..	..	@@ -8816,27 +8816,27 @@
8816	8816
8817	8817	pcie30x4m0-pins {
8818	8818	rockchip,pins = <0x0 0x16 0xc 0x192 0x0 0x18 0xc 0x192 0x0 0x17 0xc 0x192>;
8819		- phandle = <0x3a7>;
	8819	+ phandle = <0x3af>;
8820	8820	};
8821	8821
8822	8822	pcie30x4m1-pins {
8823	8823	rockchip,pins = <0x4 0xc 0x4 0x192 0x4 0xe 0x4 0x192 0x4 0xd 0x4 0x192>;
8824		- phandle = <0x3a8>;
	8824	+ phandle = <0x3b0>;
8825	8825	};
8826	8826
8827	8827	pcie30x4m2-pins {
8828	8828	rockchip,pins = <0x3 0x14 0x4 0x192 0x3 0x16 0x4 0x192 0x3 0x15 0x4 0x192>;
8829		- phandle = <0x3a9>;
	8829	+ phandle = <0x3b1>;
8830	8830	};
8831	8831
8832	8832	pcie30x4m3-pins {
8833	8833	rockchip,pins = <0x1 0x8 0x4 0x192 0x1 0xa 0x4 0x192 0x1 0x9 0x4 0x192>;
8834		- phandle = <0x3aa>;
	8834	+ phandle = <0x3b2>;
8835	8835	};
8836	8836
8837	8837	pcie30x4-button-rstn {
8838	8838	rockchip,pins = <0x3 0x1d 0x4 0x192>;
8839		- phandle = <0x3ab>;
	8839	+ phandle = <0x3b3>;
8840	8840	};
8841	8841
8842	8842	pcie30x4-clkreqn-m1 {
..	..	@@ -8884,37 +8884,37 @@
8884	8884
8885	8885	pdm0m1-clk {
8886	8886	rockchip,pins = <0x0 0x10 0x2 0x192>;
8887		- phandle = <0x3ac>;
	8887	+ phandle = <0x3b4>;
8888	8888	};
8889	8889
8890	8890	pdm0m1-clk1 {
8891	8891	rockchip,pins = <0x0 0x14 0x2 0x192>;
8892		- phandle = <0x3ad>;
	8892	+ phandle = <0x3b5>;
8893	8893	};
8894	8894
8895	8895	pdm0m1-idle {
8896	8896	rockchip,pins = <0x0 0x10 0x0 0x192 0x0 0x14 0x0 0x192>;
8897		- phandle = <0x3ae>;
	8897	+ phandle = <0x3b6>;
8898	8898	};
8899	8899
8900	8900	pdm0m1-sdi0 {
8901	8901	rockchip,pins = <0x0 0x17 0x2 0x192>;
8902		- phandle = <0x3af>;
	8902	+ phandle = <0x3b7>;
8903	8903	};
8904	8904
8905	8905	pdm0m1-sdi1 {
8906	8906	rockchip,pins = <0x0 0x18 0x2 0x192>;
8907		- phandle = <0x3b0>;
	8907	+ phandle = <0x3b8>;
8908	8908	};
8909	8909
8910	8910	pdm0m1-sdi2 {
8911	8911	rockchip,pins = <0x0 0x1c 0x2 0x192>;
8912		- phandle = <0x3b1>;
	8912	+ phandle = <0x3b9>;
8913	8913	};
8914	8914
8915	8915	pdm0m1-sdi3 {
8916	8916	rockchip,pins = <0x0 0x1e 0x2 0x192>;
8917		- phandle = <0x3b2>;
	8917	+ phandle = <0x3ba>;
8918	8918	};
8919	8919	};
8920	8920
..	..	@@ -8957,37 +8957,37 @@
8957	8957
8958	8958	pdm1m1-clk {
8959	8959	rockchip,pins = <0x1 0xc 0x2 0x192>;
8960		- phandle = <0x3b3>;
	8960	+ phandle = <0x3bb>;
8961	8961	};
8962	8962
8963	8963	pdm1m1-clk1 {
8964	8964	rockchip,pins = <0x1 0xb 0x2 0x192>;
8965		- phandle = <0x3b4>;
	8965	+ phandle = <0x3bc>;
8966	8966	};
8967	8967
8968	8968	pdm1m1-idle {
8969	8969	rockchip,pins = <0x1 0xc 0x0 0x192 0x1 0xb 0x0 0x192>;
8970		- phandle = <0x3b5>;
	8970	+ phandle = <0x3bd>;
8971	8971	};
8972	8972
8973	8973	pdm1m1-sdi0 {
8974	8974	rockchip,pins = <0x1 0x7 0x2 0x192>;
8975		- phandle = <0x3b6>;
	8975	+ phandle = <0x3be>;
8976	8976	};
8977	8977
8978	8978	pdm1m1-sdi1 {
8979	8979	rockchip,pins = <0x1 0x8 0x2 0x192>;
8980		- phandle = <0x3b7>;
	8980	+ phandle = <0x3bf>;
8981	8981	};
8982	8982
8983	8983	pdm1m1-sdi2 {
8984	8984	rockchip,pins = <0x1 0x9 0x2 0x192>;
8985		- phandle = <0x3b8>;
	8985	+ phandle = <0x3c0>;
8986	8986	};
8987	8987
8988	8988	pdm1m1-sdi3 {
8989	8989	rockchip,pins = <0x1 0xa 0x2 0x192>;
8990		- phandle = <0x3b9>;
	8990	+ phandle = <0x3c1>;
8991	8991	};
8992	8992	};
8993	8993
..	..	@@ -9003,7 +9003,7 @@
9003	9003
9004	9004	pmu-pins {
9005	9005	rockchip,pins = <0x0 0x5 0x3 0x192>;
9006		- phandle = <0x3ba>;
	9006	+ phandle = <0x3c2>;
9007	9007	};
9008	9008	};
9009	9009
..	..	@@ -9016,12 +9016,12 @@
9016	9016
9017	9017	pwm0m1-pins {
9018	9018	rockchip,pins = <0x1 0x1a 0xb 0x192>;
9019		- phandle = <0x3bb>;
	9019	+ phandle = <0x3c3>;
9020	9020	};
9021	9021
9022	9022	pwm0m2-pins {
9023	9023	rockchip,pins = <0x1 0x2 0xb 0x192>;
9024		- phandle = <0x3bc>;
	9024	+ phandle = <0x3c4>;
9025	9025	};
9026	9026	};
9027	9027
..	..	@@ -9034,12 +9034,12 @@
9034	9034
9035	9035	pwm1m1-pins {
9036	9036	rockchip,pins = <0x1 0x1b 0xb 0x192>;
9037		- phandle = <0x3bd>;
	9037	+ phandle = <0x3c5>;
9038	9038	};
9039	9039
9040	9040	pwm1m2-pins {
9041	9041	rockchip,pins = <0x1 0x3 0xb 0x192>;
9042		- phandle = <0x3be>;
	9042	+ phandle = <0x3c6>;
9043	9043	};
9044	9044	};
9045	9045
..	..	@@ -9052,12 +9052,12 @@
9052	9052
9053	9053	pwm2m1-pins {
9054	9054	rockchip,pins = <0x3 0x9 0xb 0x192>;
9055		- phandle = <0x3bf>;
	9055	+ phandle = <0x3c7>;
9056	9056	};
9057	9057
9058	9058	pwm2m2-pins {
9059	9059	rockchip,pins = <0x4 0x12 0xb 0x192>;
9060		- phandle = <0x3c0>;
	9060	+ phandle = <0x3c8>;
9061	9061	};
9062	9062	};
9063	9063
..	..	@@ -9065,7 +9065,7 @@
9065	9065
9066	9066	pwm3m0-pins {
9067	9067	rockchip,pins = <0x0 0x1c 0x3 0x192>;
9068		- phandle = <0x3c1>;
	9068	+ phandle = <0x3c9>;
9069	9069	};
9070	9070
9071	9071	pwm3m1-pins {
..	..	@@ -9075,12 +9075,12 @@
9075	9075
9076	9076	pwm3m2-pins {
9077	9077	rockchip,pins = <0x1 0x12 0xb 0x192>;
9078		- phandle = <0x3c2>;
	9078	+ phandle = <0x3ca>;
9079	9079	};
9080	9080
9081	9081	pwm3m3-pins {
9082	9082	rockchip,pins = <0x1 0x7 0xb 0x192>;
9083		- phandle = <0x3c3>;
	9083	+ phandle = <0x3cb>;
9084	9084	};
9085	9085	};
9086	9086
..	..	@@ -9093,7 +9093,7 @@
9093	9093
9094	9094	pwm4m1-pins {
9095	9095	rockchip,pins = <0x4 0x13 0xb 0x192>;
9096		- phandle = <0x3c4>;
	9096	+ phandle = <0x3cc>;
9097	9097	};
9098	9098	};
9099	9099
..	..	@@ -9106,12 +9106,12 @@
9106	9106
9107	9107	pwm5m1-pins {
9108	9108	rockchip,pins = <0x0 0x16 0xb 0x192>;
9109		- phandle = <0x3c5>;
	9109	+ phandle = <0x3cd>;
9110	9110	};
9111	9111
9112	9112	pwm5m2-pins {
9113	9113	rockchip,pins = <0x4 0x14 0xb 0x192>;
9114		- phandle = <0x3c6>;
	9114	+ phandle = <0x3ce>;
9115	9115	};
9116	9116	};
9117	9117
..	..	@@ -9124,12 +9124,12 @@
9124	9124
9125	9125	pwm6m1-pins {
9126	9126	rockchip,pins = <0x4 0x11 0xb 0x192>;
9127		- phandle = <0x3c7>;
	9127	+ phandle = <0x3cf>;
9128	9128	};
9129	9129
9130	9130	pwm6m2-pins {
9131	9131	rockchip,pins = <0x4 0x15 0xb 0x192>;
9132		- phandle = <0x3c8>;
	9132	+ phandle = <0x3d0>;
9133	9133	};
9134	9134	};
9135	9135
..	..	@@ -9142,17 +9142,17 @@
9142	9142
9143	9143	pwm7m1-pins {
9144	9144	rockchip,pins = <0x4 0x1c 0xb 0x192>;
9145		- phandle = <0x3c9>;
	9145	+ phandle = <0x3d1>;
9146	9146	};
9147	9147
9148	9148	pwm7m2-pins {
9149	9149	rockchip,pins = <0x1 0x13 0xb 0x192>;
9150		- phandle = <0x3ca>;
	9150	+ phandle = <0x3d2>;
9151	9151	};
9152	9152
9153	9153	pwm7m3-pins {
9154	9154	rockchip,pins = <0x4 0x16 0xb 0x192>;
9155		- phandle = <0x3cb>;
	9155	+ phandle = <0x3d3>;
9156	9156	};
9157	9157	};
9158	9158
..	..	@@ -9165,12 +9165,12 @@
9165	9165
9166	9166	pwm8m1-pins {
9167	9167	rockchip,pins = <0x4 0x18 0xb 0x192>;
9168		- phandle = <0x3cc>;
	9168	+ phandle = <0x3d4>;
9169	9169	};
9170	9170
9171	9171	pwm8m2-pins {
9172	9172	rockchip,pins = <0x3 0x18 0xb 0x192>;
9173		- phandle = <0x3cd>;
	9173	+ phandle = <0x3d5>;
9174	9174	};
9175	9175	};
9176	9176
..	..	@@ -9183,12 +9183,12 @@
9183	9183
9184	9184	pwm9m1-pins {
9185	9185	rockchip,pins = <0x4 0x19 0xb 0x192>;
9186		- phandle = <0x3ce>;
	9186	+ phandle = <0x3d6>;
9187	9187	};
9188	9188
9189	9189	pwm9m2-pins {
9190	9190	rockchip,pins = <0x3 0x19 0xb 0x192>;
9191		- phandle = <0x3cf>;
	9191	+ phandle = <0x3d7>;
9192	9192	};
9193	9193	};
9194	9194
..	..	@@ -9196,12 +9196,12 @@
9196	9196
9197	9197	pwm10m0-pins {
9198	9198	rockchip,pins = <0x3 0x0 0xb 0x192>;
9199		- phandle = <0x3d0>;
	9199	+ phandle = <0x3d8>;
9200	9200	};
9201	9201
9202	9202	pwm10m1-pins {
9203	9203	rockchip,pins = <0x4 0x1b 0xb 0x192>;
9204		- phandle = <0x3d1>;
	9204	+ phandle = <0x3d9>;
9205	9205	};
9206	9206
9207	9207	pwm10m2-pins {
..	..	@@ -9214,17 +9214,17 @@
9214	9214
9215	9215	pwm11m0-pins {
9216	9216	rockchip,pins = <0x3 0x1 0xb 0x192>;
9217		- phandle = <0x3d2>;
	9217	+ phandle = <0x3da>;
9218	9218	};
9219	9219
9220	9220	pwm11m1-pins {
9221	9221	rockchip,pins = <0x4 0xc 0xb 0x192>;
9222		- phandle = <0x3d3>;
	9222	+ phandle = <0x3db>;
9223	9223	};
9224	9224
9225	9225	pwm11m2-pins {
9226	9226	rockchip,pins = <0x1 0x14 0xb 0x192>;
9227		- phandle = <0x3d4>;
	9227	+ phandle = <0x3dc>;
9228	9228	};
9229	9229
9230	9230	pwm11m3-pins {
..	..	@@ -9242,7 +9242,7 @@
9242	9242
9243	9243	pwm12m1-pins {
9244	9244	rockchip,pins = <0x4 0xd 0xb 0x192>;
9245		- phandle = <0x3d5>;
	9245	+ phandle = <0x3dd>;
9246	9246	};
9247	9247	};
9248	9248
..	..	@@ -9255,12 +9255,12 @@
9255	9255
9256	9256	pwm13m1-pins {
9257	9257	rockchip,pins = <0x4 0xe 0xb 0x192>;
9258		- phandle = <0x3d6>;
	9258	+ phandle = <0x3de>;
9259	9259	};
9260	9260
9261	9261	pwm13m2-pins {
9262	9262	rockchip,pins = <0x1 0xf 0xb 0x192>;
9263		- phandle = <0x3d7>;
	9263	+ phandle = <0x3df>;
9264	9264	};
9265	9265	};
9266	9266
..	..	@@ -9273,12 +9273,12 @@
9273	9273
9274	9274	pwm14m1-pins {
9275	9275	rockchip,pins = <0x4 0xa 0xb 0x192>;
9276		- phandle = <0x3d8>;
	9276	+ phandle = <0x3e0>;
9277	9277	};
9278	9278
9279	9279	pwm14m2-pins {
9280	9280	rockchip,pins = <0x1 0x1e 0xb 0x192>;
9281		- phandle = <0x3d9>;
	9281	+ phandle = <0x3e1>;
9282	9282	};
9283	9283	};
9284	9284
..	..	@@ -9291,17 +9291,17 @@
9291	9291
9292	9292	pwm15m1-pins {
9293	9293	rockchip,pins = <0x4 0xb 0xb 0x192>;
9294		- phandle = <0x3da>;
	9294	+ phandle = <0x3e2>;
9295	9295	};
9296	9296
9297	9297	pwm15m2-pins {
9298	9298	rockchip,pins = <0x1 0x16 0xb 0x192>;
9299		- phandle = <0x3db>;
	9299	+ phandle = <0x3e3>;
9300	9300	};
9301	9301
9302	9302	pwm15m3-pins {
9303	9303	rockchip,pins = <0x1 0x1f 0xb 0x192>;
9304		- phandle = <0x3dc>;
	9304	+ phandle = <0x3e4>;
9305	9305	};
9306	9306	};
9307	9307
..	..	@@ -9309,7 +9309,7 @@
9309	9309
9310	9310	refclk-pins {
9311	9311	rockchip,pins = <0x0 0x0 0x1 0x192>;
9312		- phandle = <0x3dd>;
	9312	+ phandle = <0x3e5>;
9313	9313	};
9314	9314	};
9315	9315
..	..	@@ -9317,7 +9317,7 @@
9317	9317
9318	9318	sata-pins {
9319	9319	rockchip,pins = <0x0 0x16 0xd 0x192 0x0 0x1c 0xd 0x192 0x0 0x1d 0xd 0x192>;
9320		- phandle = <0x3de>;
	9320	+ phandle = <0x3e6>;
9321	9321	};
9322	9322	};
9323	9323
..	..	@@ -9325,12 +9325,12 @@
9325	9325
9326	9326	sata0m0-pins {
9327	9327	rockchip,pins = <0x4 0xe 0x6 0x192>;
9328		- phandle = <0x3df>;
	9328	+ phandle = <0x3e7>;
9329	9329	};
9330	9330
9331	9331	sata0m1-pins {
9332	9332	rockchip,pins = <0x1 0xb 0x6 0x192>;
9333		- phandle = <0x3e0>;
	9333	+ phandle = <0x3e8>;
9334	9334	};
9335	9335	};
9336	9336
..	..	@@ -9338,12 +9338,12 @@
9338	9338
9339	9339	sata1m0-pins {
9340	9340	rockchip,pins = <0x4 0xd 0x6 0x192>;
9341		- phandle = <0x3e1>;
	9341	+ phandle = <0x3e9>;
9342	9342	};
9343	9343
9344	9344	sata1m1-pins {
9345	9345	rockchip,pins = <0x1 0x1 0x6 0x192>;
9346		- phandle = <0x3e2>;
	9346	+ phandle = <0x3ea>;
9347	9347	};
9348	9348	};
9349	9349
..	..	@@ -9351,12 +9351,12 @@
9351	9351
9352	9352	sata2m0-pins {
9353	9353	rockchip,pins = <0x4 0x9 0x6 0x192>;
9354		- phandle = <0x3e3>;
	9354	+ phandle = <0x3eb>;
9355	9355	};
9356	9356
9357	9357	sata2m1-pins {
9358	9358	rockchip,pins = <0x1 0xf 0x6 0x192>;
9359		- phandle = <0x3e4>;
	9359	+ phandle = <0x3ec>;
9360	9360	};
9361	9361	};
9362	9362
..	..	@@ -9364,7 +9364,7 @@
9364	9364
9365	9365	sdiom1-pins {
9366	9366	rockchip,pins = <0x3 0x5 0x2 0x192 0x3 0x4 0x2 0x197 0x3 0x0 0x2 0x197 0x3 0x1 0x2 0x197 0x3 0x2 0x2 0x197 0x3 0x3 0x2 0x197>;
9367		- phandle = <0x3e5>;
	9367	+ phandle = <0x3ed>;
9368	9368	};
9369	9369
9370	9370	sdiom0-pins {
..	..	@@ -9397,7 +9397,7 @@
9397	9397
9398	9398	sdmmc-pwren {
9399	9399	rockchip,pins = <0x0 0x5 0x2 0x192>;
9400		- phandle = <0x3e6>;
	9400	+ phandle = <0x3ee>;
9401	9401	};
9402	9402	};
9403	9403
..	..	@@ -9410,7 +9410,7 @@
9410	9410
9411	9411	spdif0m1-tx {
9412	9412	rockchip,pins = <0x4 0xc 0x6 0x192>;
9413		- phandle = <0x3e7>;
	9413	+ phandle = <0x3ef>;
9414	9414	};
9415	9415	};
9416	9416
..	..	@@ -9423,12 +9423,12 @@
9423	9423
9424	9424	spdif1m1-tx {
9425	9425	rockchip,pins = <0x4 0x9 0x2 0x192>;
9426		- phandle = <0x3e8>;
	9426	+ phandle = <0x3f0>;
9427	9427	};
9428	9428
9429	9429	spdif1m2-tx {
9430	9430	rockchip,pins = <0x4 0x11 0x3 0x192>;
9431		- phandle = <0x3e9>;
	9431	+ phandle = <0x3f1>;
9432	9432	};
9433	9433	};
9434	9434
..	..	@@ -9451,47 +9451,47 @@
9451	9451
9452	9452	spi0m1-pins {
9453	9453	rockchip,pins = <0x4 0x2 0x8 0x199 0x4 0x0 0x8 0x199 0x4 0x1 0x8 0x199>;
9454		- phandle = <0x3ea>;
	9454	+ phandle = <0x3f2>;
9455	9455	};
9456	9456
9457	9457	spi0m1-cs0 {
9458	9458	rockchip,pins = <0x4 0xa 0x8 0x199>;
9459		- phandle = <0x3eb>;
	9459	+ phandle = <0x3f3>;
9460	9460	};
9461	9461
9462	9462	spi0m1-cs1 {
9463	9463	rockchip,pins = <0x4 0x9 0x8 0x199>;
9464		- phandle = <0x3ec>;
	9464	+ phandle = <0x3f4>;
9465	9465	};
9466	9466
9467	9467	spi0m2-pins {
9468	9468	rockchip,pins = <0x1 0xb 0x8 0x199 0x1 0x9 0x8 0x199 0x1 0xa 0x8 0x199>;
9469		- phandle = <0x3ed>;
	9469	+ phandle = <0x3f5>;
9470	9470	};
9471	9471
9472	9472	spi0m2-cs0 {
9473	9473	rockchip,pins = <0x1 0xc 0x8 0x199>;
9474		- phandle = <0x3ee>;
	9474	+ phandle = <0x3f6>;
9475	9475	};
9476	9476
9477	9477	spi0m2-cs1 {
9478	9478	rockchip,pins = <0x1 0xd 0x8 0x199>;
9479		- phandle = <0x3ef>;
	9479	+ phandle = <0x3f7>;
9480	9480	};
9481	9481
9482	9482	spi0m3-pins {
9483	9483	rockchip,pins = <0x3 0x1b 0x8 0x199 0x3 0x19 0x8 0x199 0x3 0x1a 0x8 0x199>;
9484		- phandle = <0x3f0>;
	9484	+ phandle = <0x3f8>;
9485	9485	};
9486	9486
9487	9487	spi0m3-cs0 {
9488	9488	rockchip,pins = <0x3 0x1c 0x8 0x199>;
9489		- phandle = <0x3f1>;
	9489	+ phandle = <0x3f9>;
9490	9490	};
9491	9491
9492	9492	spi0m3-cs1 {
9493	9493	rockchip,pins = <0x3 0x1d 0x8 0x199>;
9494		- phandle = <0x3f2>;
	9494	+ phandle = <0x3fa>;
9495	9495	};
9496	9496	};
9497	9497
..	..	@@ -9514,32 +9514,32 @@
9514	9514
9515	9515	spi1m2-pins {
9516	9516	rockchip,pins = <0x1 0x1a 0x8 0x199 0x1 0x18 0x8 0x199 0x1 0x19 0x8 0x199>;
9517		- phandle = <0x3f3>;
	9517	+ phandle = <0x3fb>;
9518	9518	};
9519	9519
9520	9520	spi1m2-cs0 {
9521	9521	rockchip,pins = <0x1 0x1b 0x8 0x199>;
9522		- phandle = <0x3f4>;
	9522	+ phandle = <0x3fc>;
9523	9523	};
9524	9524
9525	9525	spi1m2-cs1 {
9526	9526	rockchip,pins = <0x1 0x1d 0x8 0x199>;
9527		- phandle = <0x3f5>;
	9527	+ phandle = <0x3fd>;
9528	9528	};
9529	9529
9530	9530	spi1m0-pins {
9531	9531	rockchip,pins = <0x2 0x10 0x8 0x19a 0x2 0x11 0x8 0x19a 0x2 0x12 0x8 0x19a>;
9532		- phandle = <0x3f6>;
	9532	+ phandle = <0x3fe>;
9533	9533	};
9534	9534
9535	9535	spi1m0-cs0 {
9536	9536	rockchip,pins = <0x2 0x13 0x8 0x19a>;
9537		- phandle = <0x3f7>;
	9537	+ phandle = <0x3ff>;
9538	9538	};
9539	9539
9540	9540	spi1m0-cs1 {
9541	9541	rockchip,pins = <0x2 0x14 0x8 0x19a>;
9542		- phandle = <0x3f8>;
	9542	+ phandle = <0x400>;
9543	9543	};
9544	9544	};
9545	9545
..	..	@@ -9547,32 +9547,32 @@
9547	9547
9548	9548	spi2m0-pins {
9549	9549	rockchip,pins = <0x1 0x6 0x8 0x199 0x1 0x4 0x8 0x199 0x1 0x5 0x8 0x199>;
9550		- phandle = <0x3f9>;
	9550	+ phandle = <0x401>;
9551	9551	};
9552	9552
9553	9553	spi2m0-cs0 {
9554	9554	rockchip,pins = <0x1 0x7 0x8 0x199>;
9555		- phandle = <0x3fa>;
	9555	+ phandle = <0x402>;
9556	9556	};
9557	9557
9558	9558	spi2m0-cs1 {
9559	9559	rockchip,pins = <0x1 0x8 0x8 0x199>;
9560		- phandle = <0x3fb>;
	9560	+ phandle = <0x403>;
9561	9561	};
9562	9562
9563	9563	spi2m1-pins {
9564	9564	rockchip,pins = <0x4 0x6 0x8 0x199 0x4 0x4 0x8 0x199 0x4 0x5 0x8 0x199>;
9565		- phandle = <0x3fc>;
	9565	+ phandle = <0x404>;
9566	9566	};
9567	9567
9568	9568	spi2m1-cs0 {
9569	9569	rockchip,pins = <0x4 0x7 0x8 0x199>;
9570		- phandle = <0x3fd>;
	9570	+ phandle = <0x405>;
9571	9571	};
9572	9572
9573	9573	spi2m1-cs1 {
9574	9574	rockchip,pins = <0x4 0x8 0x8 0x199>;
9575		- phandle = <0x3fe>;
	9575	+ phandle = <0x406>;
9576	9576	};
9577	9577
9578	9578	spi2m2-pins {
..	..	@@ -9587,7 +9587,7 @@
9587	9587
9588	9588	spi2m2-cs1 {
9589	9589	rockchip,pins = <0x0 0x8 0x1 0x19a>;
9590		- phandle = <0x3ff>;
	9590	+ phandle = <0x407>;
9591	9591	};
9592	9592	};
9593	9593
..	..	@@ -9610,47 +9610,47 @@
9610	9610
9611	9611	spi3m2-pins {
9612	9612	rockchip,pins = <0x0 0x1b 0x8 0x199 0x0 0x18 0x8 0x199 0x0 0x1a 0x8 0x199>;
9613		- phandle = <0x400>;
	9613	+ phandle = <0x408>;
9614	9614	};
9615	9615
9616	9616	spi3m2-cs0 {
9617	9617	rockchip,pins = <0x0 0x1c 0x8 0x199>;
9618		- phandle = <0x401>;
	9618	+ phandle = <0x409>;
9619	9619	};
9620	9620
9621	9621	spi3m2-cs1 {
9622	9622	rockchip,pins = <0x0 0x1d 0x8 0x199>;
9623		- phandle = <0x402>;
	9623	+ phandle = <0x40a>;
9624	9624	};
9625	9625
9626	9626	spi3m3-pins {
9627	9627	rockchip,pins = <0x3 0x18 0x8 0x199 0x3 0x16 0x8 0x199 0x3 0x17 0x8 0x199>;
9628		- phandle = <0x403>;
	9628	+ phandle = <0x40b>;
9629	9629	};
9630	9630
9631	9631	spi3m3-cs0 {
9632	9632	rockchip,pins = <0x3 0x14 0x8 0x199>;
9633		- phandle = <0x404>;
	9633	+ phandle = <0x40c>;
9634	9634	};
9635	9635
9636	9636	spi3m3-cs1 {
9637	9637	rockchip,pins = <0x3 0x15 0x8 0x199>;
9638		- phandle = <0x405>;
	9638	+ phandle = <0x40d>;
9639	9639	};
9640	9640
9641	9641	spi3m0-pins {
9642	9642	rockchip,pins = <0x4 0x16 0x8 0x19a 0x4 0x14 0x8 0x19a 0x4 0x15 0x8 0x19a>;
9643		- phandle = <0x406>;
	9643	+ phandle = <0x40e>;
9644	9644	};
9645	9645
9646	9646	spi3m0-cs0 {
9647	9647	rockchip,pins = <0x4 0x12 0x8 0x19a>;
9648		- phandle = <0x407>;
	9648	+ phandle = <0x40f>;
9649	9649	};
9650	9650
9651	9651	spi3m0-cs1 {
9652	9652	rockchip,pins = <0x4 0x13 0x8 0x19a>;
9653		- phandle = <0x408>;
	9653	+ phandle = <0x410>;
9654	9654	};
9655	9655	};
9656	9656
..	..	@@ -9673,27 +9673,27 @@
9673	9673
9674	9674	spi4m1-pins {
9675	9675	rockchip,pins = <0x3 0x2 0x8 0x199 0x3 0x0 0x8 0x199 0x3 0x1 0x8 0x199>;
9676		- phandle = <0x409>;
	9676	+ phandle = <0x411>;
9677	9677	};
9678	9678
9679	9679	spi4m1-cs0 {
9680	9680	rockchip,pins = <0x3 0x3 0x8 0x199>;
9681		- phandle = <0x40a>;
	9681	+ phandle = <0x412>;
9682	9682	};
9683	9683
9684	9684	spi4m1-cs1 {
9685	9685	rockchip,pins = <0x3 0x4 0x8 0x199>;
9686		- phandle = <0x40b>;
	9686	+ phandle = <0x413>;
9687	9687	};
9688	9688
9689	9689	spi4m2-pins {
9690	9690	rockchip,pins = <0x1 0x2 0x8 0x199 0x1 0x0 0x8 0x199 0x1 0x1 0x8 0x199>;
9691		- phandle = <0x40c>;
	9691	+ phandle = <0x414>;
9692	9692	};
9693	9693
9694	9694	spi4m2-cs0 {
9695	9695	rockchip,pins = <0x1 0x3 0x8 0x199>;
9696		- phandle = <0x40d>;
	9696	+ phandle = <0x415>;
9697	9697	};
9698	9698	};
9699	9699
..	..	@@ -9701,7 +9701,7 @@
9701	9701
9702	9702	tsadcm1-shut {
9703	9703	rockchip,pins = <0x0 0x2 0x2 0x192>;
9704		- phandle = <0x40e>;
	9704	+ phandle = <0x416>;
9705	9705	};
9706	9706
9707	9707	tsadc-shut {
..	..	@@ -9711,7 +9711,7 @@
9711	9711
9712	9712	tsadc-shut-org {
9713	9713	rockchip,pins = <0x0 0x1 0x1 0x192>;
9714		- phandle = <0x40f>;
	9714	+ phandle = <0x417>;
9715	9715	};
9716	9716	};
9717	9717
..	..	@@ -9719,7 +9719,7 @@
9719	9719
9720	9720	uart0m0-xfer {
9721	9721	rockchip,pins = <0x0 0x14 0x4 0x197 0x0 0x15 0x4 0x197>;
9722		- phandle = <0x410>;
	9722	+ phandle = <0x418>;
9723	9723	};
9724	9724
9725	9725	uart0m1-xfer {
..	..	@@ -9729,17 +9729,17 @@
9729	9729
9730	9730	uart0m2-xfer {
9731	9731	rockchip,pins = <0x4 0x4 0xa 0x197 0x4 0x3 0xa 0x197>;
9732		- phandle = <0x411>;
	9732	+ phandle = <0x419>;
9733	9733	};
9734	9734
9735	9735	uart0-ctsn {
9736	9736	rockchip,pins = <0x0 0x19 0x4 0x192>;
9737		- phandle = <0x412>;
	9737	+ phandle = <0x41a>;
9738	9738	};
9739	9739
9740	9740	uart0-rtsn {
9741	9741	rockchip,pins = <0x0 0x16 0x4 0x192>;
9742		- phandle = <0x413>;
	9742	+ phandle = <0x41b>;
9743	9743	};
9744	9744	};
9745	9745
..	..	@@ -9747,32 +9747,32 @@
9747	9747
9748	9748	uart1m1-xfer {
9749	9749	rockchip,pins = <0x1 0xf 0xa 0x197 0x1 0xe 0xa 0x197>;
9750		- phandle = <0x414>;
	9750	+ phandle = <0x41c>;
9751	9751	};
9752	9752
9753	9753	uart1m1-ctsn {
9754	9754	rockchip,pins = <0x1 0x1f 0xa 0x192>;
9755		- phandle = <0x415>;
	9755	+ phandle = <0x41d>;
9756	9756	};
9757	9757
9758	9758	uart1m1-rtsn {
9759	9759	rockchip,pins = <0x1 0x1e 0xa 0x192>;
9760		- phandle = <0x416>;
	9760	+ phandle = <0x41e>;
9761	9761	};
9762	9762
9763	9763	uart1m2-xfer {
9764	9764	rockchip,pins = <0x0 0x1a 0xa 0x197 0x0 0x19 0xa 0x197>;
9765		- phandle = <0x417>;
	9765	+ phandle = <0x41f>;
9766	9766	};
9767	9767
9768	9768	uart1m2-ctsn {
9769	9769	rockchip,pins = <0x0 0x18 0xa 0x192>;
9770		- phandle = <0x418>;
	9770	+ phandle = <0x420>;
9771	9771	};
9772	9772
9773	9773	uart1m2-rtsn {
9774	9774	rockchip,pins = <0x0 0x17 0xa 0x192>;
9775		- phandle = <0x419>;
	9775	+ phandle = <0x421>;
9776	9776	};
9777	9777
9778	9778	uart1m0-xfer {
..	..	@@ -9782,12 +9782,12 @@
9782	9782
9783	9783	uart1m0-ctsn {
9784	9784	rockchip,pins = <0x2 0x11 0xa 0x192>;
9785		- phandle = <0x41a>;
	9785	+ phandle = <0x422>;
9786	9786	};
9787	9787
9788	9788	uart1m0-rtsn {
9789	9789	rockchip,pins = <0x2 0x10 0xa 0x192>;
9790		- phandle = <0x41b>;
	9790	+ phandle = <0x423>;
9791	9791	};
9792	9792	};
9793	9793
..	..	@@ -9795,7 +9795,7 @@
9795	9795
9796	9796	uart2m0-xfer {
9797	9797	rockchip,pins = <0x0 0xe 0xa 0x197 0x0 0xd 0xa 0x197>;
9798		- phandle = <0x1eb>;
	9798	+ phandle = <0x1f3>;
9799	9799	};
9800	9800
9801	9801	uart2m1-xfer {
..	..	@@ -9805,17 +9805,17 @@
9805	9805
9806	9806	uart2m2-xfer {
9807	9807	rockchip,pins = <0x3 0xa 0xa 0x197 0x3 0x9 0xa 0x197>;
9808		- phandle = <0x41c>;
	9808	+ phandle = <0x424>;
9809	9809	};
9810	9810
9811	9811	uart2-ctsn {
9812	9812	rockchip,pins = <0x3 0xc 0xa 0x192>;
9813		- phandle = <0x41d>;
	9813	+ phandle = <0x425>;
9814	9814	};
9815	9815
9816	9816	uart2-rtsn {
9817	9817	rockchip,pins = <0x3 0xb 0xa 0x192>;
9818		- phandle = <0x41e>;
	9818	+ phandle = <0x426>;
9819	9819	};
9820	9820	};
9821	9821
..	..	@@ -9823,7 +9823,7 @@
9823	9823
9824	9824	uart3m0-xfer {
9825	9825	rockchip,pins = <0x1 0x10 0xa 0x197 0x1 0x11 0xa 0x197>;
9826		- phandle = <0x41f>;
	9826	+ phandle = <0x427>;
9827	9827	};
9828	9828
9829	9829	uart3m1-xfer {
..	..	@@ -9833,17 +9833,17 @@
9833	9833
9834	9834	uart3m2-xfer {
9835	9835	rockchip,pins = <0x4 0x6 0xa 0x197 0x4 0x5 0xa 0x197>;
9836		- phandle = <0x420>;
	9836	+ phandle = <0x428>;
9837	9837	};
9838	9838
9839	9839	uart3-ctsn {
9840	9840	rockchip,pins = <0x1 0x13 0xa 0x192>;
9841		- phandle = <0x421>;
	9841	+ phandle = <0x429>;
9842	9842	};
9843	9843
9844	9844	uart3-rtsn {
9845	9845	rockchip,pins = <0x1 0x12 0xa 0x192>;
9846		- phandle = <0x422>;
	9846	+ phandle = <0x42a>;
9847	9847	};
9848	9848	};
9849	9849
..	..	@@ -9856,22 +9856,22 @@
9856	9856
9857	9857	uart4m1-xfer {
9858	9858	rockchip,pins = <0x3 0x18 0xa 0x197 0x3 0x19 0xa 0x197>;
9859		- phandle = <0x423>;
	9859	+ phandle = <0x42b>;
9860	9860	};
9861	9861
9862	9862	uart4m2-xfer {
9863	9863	rockchip,pins = <0x1 0xa 0xa 0x197 0x1 0xb 0xa 0x197>;
9864		- phandle = <0x424>;
	9864	+ phandle = <0x42c>;
9865	9865	};
9866	9866
9867	9867	uart4-ctsn {
9868	9868	rockchip,pins = <0x1 0x17 0xa 0x192>;
9869		- phandle = <0x425>;
	9869	+ phandle = <0x42d>;
9870	9870	};
9871	9871
9872	9872	uart4-rtsn {
9873	9873	rockchip,pins = <0x1 0x15 0xa 0x192>;
9874		- phandle = <0x426>;
	9874	+ phandle = <0x42e>;
9875	9875	};
9876	9876	};
9877	9877
..	..	@@ -9879,17 +9879,17 @@
9879	9879
9880	9880	uart5m0-xfer {
9881	9881	rockchip,pins = <0x4 0x1c 0xa 0x197 0x4 0x1d 0xa 0x197>;
9882		- phandle = <0x427>;
	9882	+ phandle = <0x42f>;
9883	9883	};
9884	9884
9885	9885	uart5m0-ctsn {
9886	9886	rockchip,pins = <0x4 0x1a 0xa 0x192>;
9887		- phandle = <0x428>;
	9887	+ phandle = <0x430>;
9888	9888	};
9889	9889
9890	9890	uart5m0-rtsn {
9891	9891	rockchip,pins = <0x4 0x1b 0xa 0x192>;
9892		- phandle = <0x429>;
	9892	+ phandle = <0x431>;
9893	9893	};
9894	9894
9895	9895	uart5m1-xfer {
..	..	@@ -9899,17 +9899,17 @@
9899	9899
9900	9900	uart5m1-ctsn {
9901	9901	rockchip,pins = <0x2 0x2 0xa 0x192>;
9902		- phandle = <0x42a>;
	9902	+ phandle = <0x432>;
9903	9903	};
9904	9904
9905	9905	uart5m1-rtsn {
9906	9906	rockchip,pins = <0x2 0x3 0xa 0x192>;
9907		- phandle = <0x42b>;
	9907	+ phandle = <0x433>;
9908	9908	};
9909	9909
9910	9910	uart5m2-xfer {
9911	9911	rockchip,pins = <0x2 0x1c 0xa 0x197 0x2 0x1d 0xa 0x197>;
9912		- phandle = <0x42c>;
	9912	+ phandle = <0x434>;
9913	9913	};
9914	9914	};
9915	9915
..	..	@@ -9917,17 +9917,17 @@
9917	9917
9918	9918	uart6m1-xfer {
9919	9919	rockchip,pins = <0x1 0x0 0xa 0x197 0x1 0x1 0xa 0x197>;
9920		- phandle = <0x42d>;
	9920	+ phandle = <0x435>;
9921	9921	};
9922	9922
9923	9923	uart6m1-ctsn {
9924	9924	rockchip,pins = <0x1 0x3 0xa 0x192>;
9925		- phandle = <0x42e>;
	9925	+ phandle = <0x436>;
9926	9926	};
9927	9927
9928	9928	uart6m1-rtsn {
9929	9929	rockchip,pins = <0x1 0x2 0xa 0x192>;
9930		- phandle = <0x42f>;
	9930	+ phandle = <0x437>;
9931	9931	};
9932	9932
9933	9933	uart6m2-xfer {
..	..	@@ -9937,17 +9937,17 @@
9937	9937
9938	9938	uart6m0-xfer {
9939	9939	rockchip,pins = <0x2 0x6 0xa 0x197 0x2 0x7 0xa 0x197>;
9940		- phandle = <0x430>;
	9940	+ phandle = <0x438>;
9941	9941	};
9942	9942
9943	9943	uart6m0-ctsn {
9944	9944	rockchip,pins = <0x2 0x9 0xa 0x192>;
9945		- phandle = <0x431>;
	9945	+ phandle = <0x439>;
9946	9946	};
9947	9947
9948	9948	uart6m0-rtsn {
9949	9949	rockchip,pins = <0x2 0x8 0xa 0x192>;
9950		- phandle = <0x432>;
	9950	+ phandle = <0x43a>;
9951	9951	};
9952	9952	};
9953	9953
..	..	@@ -9960,32 +9960,32 @@
9960	9960
9961	9961	uart7m1-ctsn {
9962	9962	rockchip,pins = <0x3 0x13 0xa 0x192>;
9963		- phandle = <0x433>;
	9963	+ phandle = <0x43b>;
9964	9964	};
9965	9965
9966	9966	uart7m1-rtsn {
9967	9967	rockchip,pins = <0x3 0x12 0xa 0x192>;
9968		- phandle = <0x434>;
	9968	+ phandle = <0x43c>;
9969	9969	};
9970	9970
9971	9971	uart7m2-xfer {
9972	9972	rockchip,pins = <0x1 0xc 0xa 0x197 0x1 0xd 0xa 0x197>;
9973		- phandle = <0x435>;
	9973	+ phandle = <0x43d>;
9974	9974	};
9975	9975
9976	9976	uart7m0-xfer {
9977	9977	rockchip,pins = <0x2 0xc 0xa 0x197 0x2 0xd 0xa 0x197>;
9978		- phandle = <0x436>;
	9978	+ phandle = <0x43e>;
9979	9979	};
9980	9980
9981	9981	uart7m0-ctsn {
9982	9982	rockchip,pins = <0x4 0x16 0xa 0x192>;
9983		- phandle = <0x437>;
	9983	+ phandle = <0x43f>;
9984	9984	};
9985	9985
9986	9986	uart7m0-rtsn {
9987	9987	rockchip,pins = <0x4 0x12 0xa 0x192>;
9988		- phandle = <0x438>;
	9988	+ phandle = <0x440>;
9989	9989	};
9990	9990	};
9991	9991
..	..	@@ -9993,17 +9993,17 @@
9993	9993
9994	9994	uart8m0-xfer {
9995	9995	rockchip,pins = <0x4 0x9 0xa 0x197 0x4 0x8 0xa 0x197>;
9996		- phandle = <0x439>;
	9996	+ phandle = <0x441>;
9997	9997	};
9998	9998
9999	9999	uart8m0-ctsn {
10000	10000	rockchip,pins = <0x4 0xb 0xa 0x192>;
10001		- phandle = <0x43a>;
	10001	+ phandle = <0x442>;
10002	10002	};
10003	10003
10004	10004	uart8m0-rtsn {
10005	10005	rockchip,pins = <0x4 0xa 0xa 0x192>;
10006		- phandle = <0x43b>;
	10006	+ phandle = <0x443>;
10007	10007	};
10008	10008
10009	10009	uart8m1-xfer {
..	..	@@ -10013,17 +10013,17 @@
10013	10013
10014	10014	uart8m1-ctsn {
10015	10015	rockchip,pins = <0x3 0x5 0xa 0x192>;
10016		- phandle = <0x43c>;
	10016	+ phandle = <0x444>;
10017	10017	};
10018	10018
10019	10019	uart8m1-rtsn {
10020	10020	rockchip,pins = <0x3 0x4 0xa 0x192>;
10021		- phandle = <0x43d>;
	10021	+ phandle = <0x445>;
10022	10022	};
10023	10023
10024	10024	uart8-xfer {
10025	10025	rockchip,pins = <0x4 0x9 0xa 0x197>;
10026		- phandle = <0x43e>;
	10026	+ phandle = <0x446>;
10027	10027	};
10028	10028	};
10029	10029
..	..	@@ -10031,32 +10031,32 @@
10031	10031
10032	10032	uart9m1-xfer {
10033	10033	rockchip,pins = <0x4 0xd 0xa 0x197 0x4 0xc 0xa 0x197>;
10034		- phandle = <0x43f>;
	10034	+ phandle = <0x447>;
10035	10035	};
10036	10036
10037	10037	uart9m1-ctsn {
10038	10038	rockchip,pins = <0x4 0x1 0xa 0x192>;
10039		- phandle = <0x440>;
	10039	+ phandle = <0x448>;
10040	10040	};
10041	10041
10042	10042	uart9m1-rtsn {
10043	10043	rockchip,pins = <0x4 0x0 0xa 0x192>;
10044		- phandle = <0x441>;
	10044	+ phandle = <0x449>;
10045	10045	};
10046	10046
10047	10047	uart9m2-xfer {
10048	10048	rockchip,pins = <0x3 0x1c 0xa 0x197 0x3 0x1d 0xa 0x197>;
10049		- phandle = <0x442>;
	10049	+ phandle = <0x44a>;
10050	10050	};
10051	10051
10052	10052	uart9m2-ctsn {
10053	10053	rockchip,pins = <0x3 0x1b 0xa 0x192>;
10054		- phandle = <0x443>;
	10054	+ phandle = <0x44b>;
10055	10055	};
10056	10056
10057	10057	uart9m2-rtsn {
10058	10058	rockchip,pins = <0x3 0x1a 0xa 0x192>;
10059		- phandle = <0x444>;
	10059	+ phandle = <0x44c>;
10060	10060	};
10061	10061
10062	10062	uart9m0-xfer {
..	..	@@ -10071,7 +10071,7 @@
10071	10071
10072	10072	uart9m0-rtsn {
10073	10073	rockchip,pins = <0x4 0x14 0xa 0x192>;
10074		- phandle = <0x1e4>;
	10074	+ phandle = <0x1ed>;
10075	10075	};
10076	10076	};
10077	10077
..	..	@@ -10079,7 +10079,7 @@
10079	10079
10080	10080	vop-pins {
10081	10081	rockchip,pins = <0x1 0x2 0x1 0x192>;
10082		- phandle = <0x445>;
	10082	+ phandle = <0x44d>;
10083	10083	};
10084	10084	};
10085	10085
..	..	@@ -10087,7 +10087,7 @@
10087	10087
10088	10088	bt656-pins {
10089	10089	rockchip,pins = <0x4 0x8 0x2 0x19b 0x4 0x0 0x2 0x19b 0x4 0x1 0x2 0x19b 0x4 0x2 0x2 0x19b 0x4 0x3 0x2 0x19b 0x4 0x4 0x2 0x19b 0x4 0x5 0x2 0x19b 0x4 0x6 0x2 0x19b 0x4 0x7 0x2 0x19b>;
10090		- phandle = <0x446>;
	10090	+ phandle = <0x44e>;
10091	10091	};
10092	10092	};
10093	10093
..	..	@@ -10102,170 +10102,170 @@
10102	10102	pcfg-pull-none-drv-level-7 {
10103	10103	bias-disable;
10104	10104	drive-strength = <0x7>;
10105		- phandle = <0x447>;
	10105	+ phandle = <0x44f>;
10106	10106	};
10107	10107
10108	10108	pcfg-pull-none-drv-level-8 {
10109	10109	bias-disable;
10110	10110	drive-strength = <0x8>;
10111		- phandle = <0x448>;
	10111	+ phandle = <0x450>;
10112	10112	};
10113	10113
10114	10114	pcfg-pull-none-drv-level-9 {
10115	10115	bias-disable;
10116	10116	drive-strength = <0x9>;
10117		- phandle = <0x449>;
	10117	+ phandle = <0x451>;
10118	10118	};
10119	10119
10120	10120	pcfg-pull-none-drv-level-10 {
10121	10121	bias-disable;
10122	10122	drive-strength = <0xa>;
10123		- phandle = <0x44a>;
	10123	+ phandle = <0x452>;
10124	10124	};
10125	10125
10126	10126	pcfg-pull-none-drv-level-11 {
10127	10127	bias-disable;
10128	10128	drive-strength = <0xb>;
10129		- phandle = <0x44b>;
	10129	+ phandle = <0x453>;
10130	10130	};
10131	10131
10132	10132	pcfg-pull-none-drv-level-12 {
10133	10133	bias-disable;
10134	10134	drive-strength = <0xc>;
10135		- phandle = <0x44c>;
	10135	+ phandle = <0x454>;
10136	10136	};
10137	10137
10138	10138	pcfg-pull-none-drv-level-13 {
10139	10139	bias-disable;
10140	10140	drive-strength = <0xd>;
10141		- phandle = <0x44d>;
	10141	+ phandle = <0x455>;
10142	10142	};
10143	10143
10144	10144	pcfg-pull-none-drv-level-14 {
10145	10145	bias-disable;
10146	10146	drive-strength = <0xe>;
10147		- phandle = <0x44e>;
	10147	+ phandle = <0x456>;
10148	10148	};
10149	10149
10150	10150	pcfg-pull-none-drv-level-15 {
10151	10151	bias-disable;
10152	10152	drive-strength = <0xf>;
10153		- phandle = <0x44f>;
	10153	+ phandle = <0x457>;
10154	10154	};
10155	10155
10156	10156	pcfg-pull-up-drv-level-7 {
10157	10157	bias-pull-up;
10158	10158	drive-strength = <0x7>;
10159		- phandle = <0x450>;
	10159	+ phandle = <0x458>;
10160	10160	};
10161	10161
10162	10162	pcfg-pull-up-drv-level-8 {
10163	10163	bias-pull-up;
10164	10164	drive-strength = <0x8>;
10165		- phandle = <0x451>;
	10165	+ phandle = <0x459>;
10166	10166	};
10167	10167
10168	10168	pcfg-pull-up-drv-level-9 {
10169	10169	bias-pull-up;
10170	10170	drive-strength = <0x9>;
10171		- phandle = <0x452>;
	10171	+ phandle = <0x45a>;
10172	10172	};
10173	10173
10174	10174	pcfg-pull-up-drv-level-10 {
10175	10175	bias-pull-up;
10176	10176	drive-strength = <0xa>;
10177		- phandle = <0x453>;
	10177	+ phandle = <0x45b>;
10178	10178	};
10179	10179
10180	10180	pcfg-pull-up-drv-level-11 {
10181	10181	bias-pull-up;
10182	10182	drive-strength = <0xb>;
10183		- phandle = <0x454>;
	10183	+ phandle = <0x45c>;
10184	10184	};
10185	10185
10186	10186	pcfg-pull-up-drv-level-12 {
10187	10187	bias-pull-up;
10188	10188	drive-strength = <0xc>;
10189		- phandle = <0x455>;
	10189	+ phandle = <0x45d>;
10190	10190	};
10191	10191
10192	10192	pcfg-pull-up-drv-level-13 {
10193	10193	bias-pull-up;
10194	10194	drive-strength = <0xd>;
10195		- phandle = <0x456>;
	10195	+ phandle = <0x45e>;
10196	10196	};
10197	10197
10198	10198	pcfg-pull-up-drv-level-14 {
10199	10199	bias-pull-up;
10200	10200	drive-strength = <0xe>;
10201		- phandle = <0x457>;
	10201	+ phandle = <0x45f>;
10202	10202	};
10203	10203
10204	10204	pcfg-pull-up-drv-level-15 {
10205	10205	bias-pull-up;
10206	10206	drive-strength = <0xf>;
10207		- phandle = <0x458>;
	10207	+ phandle = <0x460>;
10208	10208	};
10209	10209
10210	10210	pcfg-pull-down-drv-level-7 {
10211	10211	bias-pull-down;
10212	10212	drive-strength = <0x7>;
10213		- phandle = <0x459>;
	10213	+ phandle = <0x461>;
10214	10214	};
10215	10215
10216	10216	pcfg-pull-down-drv-level-8 {
10217	10217	bias-pull-down;
10218	10218	drive-strength = <0x8>;
10219		- phandle = <0x45a>;
	10219	+ phandle = <0x462>;
10220	10220	};
10221	10221
10222	10222	pcfg-pull-down-drv-level-9 {
10223	10223	bias-pull-down;
10224	10224	drive-strength = <0x9>;
10225		- phandle = <0x45b>;
	10225	+ phandle = <0x463>;
10226	10226	};
10227	10227
10228	10228	pcfg-pull-down-drv-level-10 {
10229	10229	bias-pull-down;
10230	10230	drive-strength = <0xa>;
10231		- phandle = <0x45c>;
	10231	+ phandle = <0x464>;
10232	10232	};
10233	10233
10234	10234	pcfg-pull-down-drv-level-11 {
10235	10235	bias-pull-down;
10236	10236	drive-strength = <0xb>;
10237		- phandle = <0x45d>;
	10237	+ phandle = <0x465>;
10238	10238	};
10239	10239
10240	10240	pcfg-pull-down-drv-level-12 {
10241	10241	bias-pull-down;
10242	10242	drive-strength = <0xc>;
10243		- phandle = <0x45e>;
	10243	+ phandle = <0x466>;
10244	10244	};
10245	10245
10246	10246	pcfg-pull-down-drv-level-13 {
10247	10247	bias-pull-down;
10248	10248	drive-strength = <0xd>;
10249		- phandle = <0x45f>;
	10249	+ phandle = <0x467>;
10250	10250	};
10251	10251
10252	10252	pcfg-pull-down-drv-level-14 {
10253	10253	bias-pull-down;
10254	10254	drive-strength = <0xe>;
10255		- phandle = <0x460>;
	10255	+ phandle = <0x468>;
10256	10256	};
10257	10257
10258	10258	pcfg-pull-down-drv-level-15 {
10259	10259	bias-pull-down;
10260	10260	drive-strength = <0xf>;
10261		- phandle = <0x461>;
	10261	+ phandle = <0x469>;
10262	10262	};
10263	10263
10264	10264	eth0 {
10265	10265
10266	10266	eth0-pins {
10267	10267	rockchip,pins = <0x2 0x13 0x1 0x192>;
10268		- phandle = <0x462>;
	10268	+ phandle = <0x1c4>;
10269	10269	};
10270	10270	};
10271	10271
..	..	@@ -10273,52 +10273,52 @@
10273	10273
10274	10274	gmac0-miim {
10275	10275	rockchip,pins = <0x4 0x14 0x1 0x192 0x4 0x15 0x1 0x192>;
10276		- phandle = <0x463>;
	10276	+ phandle = <0x1bf>;
10277	10277	};
10278	10278
10279	10279	gmac0-clkinout {
10280	10280	rockchip,pins = <0x4 0x13 0x1 0x192>;
10281		- phandle = <0x464>;
	10281	+ phandle = <0x1c5>;
10282	10282	};
10283	10283
10284	10284	gmac0-rx-bus2 {
10285	10285	rockchip,pins = <0x2 0x11 0x1 0x192 0x2 0x12 0x1 0x192 0x4 0x12 0x1 0x192>;
10286		- phandle = <0x465>;
	10286	+ phandle = <0x1c1>;
10287	10287	};
10288	10288
10289	10289	gmac0-tx-bus2 {
10290	10290	rockchip,pins = <0x2 0xe 0x1 0x192 0x2 0xf 0x1 0x192 0x2 0x10 0x1 0x192>;
10291		- phandle = <0x466>;
	10291	+ phandle = <0x1c0>;
10292	10292	};
10293	10293
10294	10294	gmac0-rgmii-clk {
10295	10295	rockchip,pins = <0x2 0x8 0x1 0x192 0x2 0xb 0x1 0x192>;
10296		- phandle = <0x467>;
	10296	+ phandle = <0x1c2>;
10297	10297	};
10298	10298
10299	10299	gmac0-rgmii-bus {
10300	10300	rockchip,pins = <0x2 0x6 0x1 0x192 0x2 0x7 0x1 0x192 0x2 0x9 0x1 0x192 0x2 0xa 0x1 0x192>;
10301		- phandle = <0x468>;
	10301	+ phandle = <0x1c3>;
10302	10302	};
10303	10303
10304	10304	gmac0-ppsclk {
10305	10305	rockchip,pins = <0x2 0x14 0x1 0x192>;
10306		- phandle = <0x469>;
	10306	+ phandle = <0x46a>;
10307	10307	};
10308	10308
10309	10309	gmac0-ppstring {
10310	10310	rockchip,pins = <0x2 0xd 0x1 0x192>;
10311		- phandle = <0x46a>;
	10311	+ phandle = <0x46b>;
10312	10312	};
10313	10313
10314	10314	gmac0-ptp-refclk {
10315	10315	rockchip,pins = <0x2 0xc 0x1 0x192>;
10316		- phandle = <0x46b>;
	10316	+ phandle = <0x46c>;
10317	10317	};
10318	10318
10319	10319	gmac0-txer {
10320	10320	rockchip,pins = <0x4 0x16 0x1 0x192>;
10321		- phandle = <0x46c>;
	10321	+ phandle = <0x46d>;
10322	10322	};
10323	10323	};
10324	10324
..	..	@@ -10326,17 +10326,17 @@
10326	10326
10327	10327	mipicsi0-pwr {
10328	10328	rockchip,pins = <0x1 0x1a 0x0 0x192>;
10329		- phandle = <0x46d>;
	10329	+ phandle = <0x46e>;
10330	10330	};
10331	10331
10332	10332	mipicsi1-pwr {
10333	10333	rockchip,pins = <0x1 0x1b 0x0 0x192>;
10334		- phandle = <0x46e>;
	10334	+ phandle = <0x46f>;
10335	10335	};
10336	10336
10337	10337	mipidcphy0-pwr {
10338	10338	rockchip,pins = <0x2 0x14 0x0 0x192>;
10339		- phandle = <0x46f>;
	10339	+ phandle = <0x470>;
10340	10340	};
10341	10341	};
10342	10342
..	..	@@ -10344,7 +10344,7 @@
10344	10344
10345	10345	vga-hpdin-l {
10346	10346	rockchip,pins = <0x3 0x6 0x0 0x192>;
10347		- phandle = <0x470>;
	10347	+ phandle = <0x471>;
10348	10348	};
10349	10349	};
10350	10350
..	..	@@ -10352,12 +10352,12 @@
10352	10352
10353	10353	hp-det {
10354	10354	rockchip,pins = <0x3 0x1d 0x0 0x192>;
10355		- phandle = <0x1e1>;
	10355	+ phandle = <0x1ea>;
10356	10356	};
10357	10357
10358	10358	spk-con {
10359	10359	rockchip,pins = <0x4 0xc 0x0 0x192>;
10360		- phandle = <0x1d9>;
	10360	+ phandle = <0x1e2>;
10361	10361	};
10362	10362	};
10363	10363
..	..	@@ -10373,7 +10373,7 @@
10373	10373
10374	10374	lcd-rst-gpio {
10375	10375	rockchip,pins = <0x1 0x0 0x0 0x192>;
10376		- phandle = <0x471>;
	10376	+ phandle = <0x472>;
10377	10377	};
10378	10378	};
10379	10379
..	..	@@ -10381,7 +10381,7 @@
10381	10381
10382	10382	wifi-enable-h {
10383	10383	rockchip,pins = <0x1 0x16 0x0 0x197>;
10384		- phandle = <0x1e0>;
	10384	+ phandle = <0x1e9>;
10385	10385	};
10386	10386	};
10387	10387
..	..	@@ -10397,7 +10397,7 @@
10397	10397
10398	10398	vcc5v0-host-en {
10399	10399	rockchip,pins = <0x4 0x8 0x0 0x192>;
10400		- phandle = <0x1e3>;
	10400	+ phandle = <0x1ec>;
10401	10401	};
10402	10402	};
10403	10403
..	..	@@ -10405,20 +10405,20 @@
10405	10405
10406	10406	uart9-gpios {
10407	10407	rockchip,pins = <0x4 0x14 0x0 0x192>;
10408		- phandle = <0x1e6>;
	10408	+ phandle = <0x1ef>;
10409	10409	};
10410	10410
10411	10411	bt-reset-gpio {
10412	10412	rockchip,pins = <0x0 0xa 0x0 0x192>;
10413		- phandle = <0x1e5>;
	10413	+ phandle = <0x1ee>;
10414	10414	};
10415	10415	};
10416	10416
10417	10417	ndj_io_init {
10418	10418
10419	10419	ndj_io_gpio_col {
10420		- rockchip,pins = <0x0 0x1b 0x0 0x192 0x4 0x1 0x0 0x192 0x4 0xe 0x0 0x192 0x0 0x16 0x0 0x192 0x2 0xc 0x0 0x192 0x2 0x13 0x0 0x192 0x4 0xd 0x0 0x192 0x1 0x9 0x0 0x192 0x1 0x0 0x0 0x192 0x1 0xa 0x0 0x192 0x1 0x1 0x0 0x192 0x1 0xb 0x0 0x192 0x1 0x2 0x0 0x192 0x1 0xc 0x0 0x192 0x1 0x3 0x0 0x192>;
10421		- phandle = <0x1e7>;
	10420	+ rockchip,pins = <0x1 0x3 0x0 0x192>;
	10421	+ phandle = <0x1f0>;
10422	10422	};
10423	10423	};
10424	10424	};
..	..	@@ -10435,28 +10435,28 @@
10435	10435	compatible = "rockchip,rkcif-sditf";
10436	10436	rockchip,cif = <0x19c>;
10437	10437	status = "disabled";
10438		- phandle = <0x472>;
	10438	+ phandle = <0x473>;
10439	10439	};
10440	10440
10441	10441	rkcif-mipi-lvds4-sditf-vir1 {
10442	10442	compatible = "rockchip,rkcif-sditf";
10443	10443	rockchip,cif = <0x19c>;
10444	10444	status = "disabled";
10445		- phandle = <0x473>;
	10445	+ phandle = <0x474>;
10446	10446	};
10447	10447
10448	10448	rkcif-mipi-lvds4-sditf-vir2 {
10449	10449	compatible = "rockchip,rkcif-sditf";
10450	10450	rockchip,cif = <0x19c>;
10451	10451	status = "disabled";
10452		- phandle = <0x474>;
	10452	+ phandle = <0x475>;
10453	10453	};
10454	10454
10455	10455	rkcif-mipi-lvds4-sditf-vir3 {
10456	10456	compatible = "rockchip,rkcif-sditf";
10457	10457	rockchip,cif = <0x19c>;
10458	10458	status = "disabled";
10459		- phandle = <0x475>;
	10459	+ phandle = <0x476>;
10460	10460	};
10461	10461
10462	10462	rkcif-mipi-lvds5 {
..	..	@@ -10471,28 +10471,28 @@
10471	10471	compatible = "rockchip,rkcif-sditf";
10472	10472	rockchip,cif = <0x19d>;
10473	10473	status = "disabled";
10474		- phandle = <0x476>;
	10474	+ phandle = <0x477>;
10475	10475	};
10476	10476
10477	10477	rkcif-mipi-lvds5-sditf-vir1 {
10478	10478	compatible = "rockchip,rkcif-sditf";
10479	10479	rockchip,cif = <0x19d>;
10480	10480	status = "disabled";
10481		- phandle = <0x477>;
	10481	+ phandle = <0x478>;
10482	10482	};
10483	10483
10484	10484	rkcif-mipi-lvds5-sditf-vir2 {
10485	10485	compatible = "rockchip,rkcif-sditf";
10486	10486	rockchip,cif = <0x19d>;
10487	10487	status = "disabled";
10488		- phandle = <0x478>;
	10488	+ phandle = <0x479>;
10489	10489	};
10490	10490
10491	10491	rkcif-mipi-lvds5-sditf-vir3 {
10492	10492	compatible = "rockchip,rkcif-sditf";
10493	10493	rockchip,cif = <0x19d>;
10494	10494	status = "disabled";
10495		- phandle = <0x479>;
	10495	+ phandle = <0x47a>;
10496	10496	};
10497	10497
10498	10498	usbdrd3_1 {
..	..	@@ -10503,7 +10503,7 @@
10503	10503	#size-cells = <0x2>;
10504	10504	ranges;
10505	10505	status = "okay";
10506		- phandle = <0x47a>;
	10506	+ phandle = <0x47b>;
10507	10507
10508	10508	usb@fc400000 {
10509	10509	compatible = "snps,dwc3";
..	..	@@ -10521,26 +10521,26 @@
10521	10521	snps,dis-del-phy-power-chg-quirk;
10522	10522	snps,dis-tx-ipgap-linecheck-quirk;
10523	10523	status = "okay";
10524		- phandle = <0x47b>;
	10524	+ phandle = <0x47c>;
10525	10525	};
10526	10526	};
10527	10527
10528	10528	syscon@fd5b8000 {
10529	10529	compatible = "rockchip,pcie30-phy-grf", "syscon";
10530	10530	reg = <0x0 0xfd5b8000 0x0 0x10000>;
10531		- phandle = <0x1c3>;
	10531	+ phandle = <0x1cc>;
10532	10532	};
10533	10533
10534	10534	syscon@fd5c0000 {
10535	10535	compatible = "rockchip,pipe-phy-grf", "syscon";
10536	10536	reg = <0x0 0xfd5c0000 0x0 0x100>;
10537		- phandle = <0x1c2>;
	10537	+ phandle = <0x1cb>;
10538	10538	};
10539	10539
10540	10540	syscon@fd5cc000 {
10541	10541	compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
10542	10542	reg = <0x0 0xfd5cc000 0x0 0x4000>;
10543		- phandle = <0x1c0>;
	10543	+ phandle = <0x1c9>;
10544	10544	};
10545	10545
10546	10546	syscon@fd5d4000 {
..	..	@@ -10548,7 +10548,7 @@
10548	10548	reg = <0x0 0xfd5d4000 0x0 0x4000>;
10549	10549	#address-cells = <0x1>;
10550	10550	#size-cells = <0x1>;
10551		- phandle = <0x1bf>;
	10551	+ phandle = <0x1c8>;
10552	10552
10553	10553	usb2-phy@4000 {
10554	10554	compatible = "rockchip,rk3588-usb2phy";
..	..	@@ -10562,7 +10562,7 @@
10562	10562	#clock-cells = <0x0>;
10563	10563	rockchip,usbctrl-grf = <0x6a>;
10564	10564	status = "okay";
10565		- phandle = <0x1c1>;
	10565	+ phandle = <0x1ca>;
10566	10566
10567	10567	otg-port {
10568	10568	#phy-cells = <0x0>;
..	..	@@ -10576,7 +10576,7 @@
10576	10576	syscon@fd5e4000 {
10577	10577	compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";
10578	10578	reg = <0x0 0xfd5e4000 0x0 0x100>;
10579		- phandle = <0x1be>;
	10579	+ phandle = <0x1c7>;
10580	10580	};
10581	10581
10582	10582	spdif-tx@fddb8000 {
..	..	@@ -10592,7 +10592,7 @@
10592	10592	power-domains = <0x57 0x19>;
10593	10593	#sound-dai-cells = <0x0>;
10594	10594	status = "disabled";
10595		- phandle = <0x1cf>;
	10595	+ phandle = <0x1d8>;
10596	10596	};
10597	10597
10598	10598	i2s@fddc8000 {
..	..	@@ -10611,7 +10611,7 @@
10611	10611	rockchip,playback-only;
10612	10612	#sound-dai-cells = <0x0>;
10613	10613	status = "disabled";
10614		- phandle = <0x47c>;
	10614	+ phandle = <0x47d>;
10615	10615	};
10616	10616
10617	10617	spdif-tx@fdde8000 {
..	..	@@ -10627,7 +10627,7 @@
10627	10627	power-domains = <0x57 0x1a>;
10628	10628	#sound-dai-cells = <0x0>;
10629	10629	status = "disabled";
10630		- phandle = <0x47d>;
	10630	+ phandle = <0x47e>;
10631	10631	};
10632	10632
10633	10633	i2s@fddf4000 {
..	..	@@ -10648,7 +10648,7 @@
10648	10648	rockchip,playback-only;
10649	10649	#sound-dai-cells = <0x0>;
10650	10650	status = "okay";
10651		- phandle = <0x1cb>;
	10651	+ phandle = <0x1d4>;
10652	10652	};
10653	10653
10654	10654	i2s@fddf8000 {
..	..	@@ -10667,7 +10667,7 @@
10667	10667	rockchip,capture-only;
10668	10668	#sound-dai-cells = <0x0>;
10669	10669	status = "okay";
10670		- phandle = <0x1db>;
	10670	+ phandle = <0x1e4>;
10671	10671	};
10672	10672
10673	10673	i2s@fde00000 {
..	..	@@ -10686,7 +10686,7 @@
10686	10686	rockchip,capture-only;
10687	10687	#sound-dai-cells = <0x0>;
10688	10688	status = "disabled";
10689		- phandle = <0x47e>;
	10689	+ phandle = <0x47f>;
10690	10690	};
10691	10691
10692	10692	spdif-rx@fde10000 {
..	..	@@ -10704,7 +10704,7 @@
10704	10704	reset-names = "spdifrx-m";
10705	10705	#sound-dai-cells = <0x0>;
10706	10706	status = "disabled";
10707		- phandle = <0x47f>;
	10707	+ phandle = <0x480>;
10708	10708	};
10709	10709
10710	10710	spdif-rx@fde18000 {
..	..	@@ -10722,7 +10722,7 @@
10722	10722	reset-names = "spdifrx-m";
10723	10723	#sound-dai-cells = <0x0>;
10724	10724	status = "disabled";
10725		- phandle = <0x480>;
	10725	+ phandle = <0x481>;
10726	10726	};
10727	10727
10728	10728	dp@fde60000 {
..	..	@@ -10740,7 +10740,7 @@
10740	10740	status = "disabled";
10741	10741	pinctrl-names = "default";
10742	10742	pinctrl-0 = <0x1a1>;
10743		- phandle = <0x1d0>;
	10743	+ phandle = <0x1d9>;
10744	10744
10745	10745	ports {
10746	10746	#address-cells = <0x1>;
..	..	@@ -10777,7 +10777,7 @@
10777	10777	reg = <0x1>;
10778	10778
10779	10779	endpoint {
10780		- phandle = <0x481>;
	10780	+ phandle = <0x482>;
10781	10781	};
10782	10782	};
10783	10783	};
..	..	@@ -10802,7 +10802,7 @@
10802	10802	#sound-dai-cells = <0x0>;
10803	10803	status = "disabled";
10804	10804	enable-gpios = <0xfc 0xa 0x0>;
10805		- phandle = <0x1cc>;
	10805	+ phandle = <0x1d5>;
10806	10806
10807	10807	ports {
10808	10808	#address-cells = <0x1>;
..	..	@@ -10812,7 +10812,7 @@
10812	10812	reg = <0x0>;
10813	10813	#address-cells = <0x1>;
10814	10814	#size-cells = <0x0>;
10815		- phandle = <0x482>;
	10815	+ phandle = <0x483>;
10816	10816
10817	10817	endpoint@0 {
10818	10818	reg = <0x0>;
..	..	@@ -10852,7 +10852,7 @@
10852	10852	rockchip,grf = <0xcc>;
10853	10853	status = "okay";
10854	10854	force-hpd;
10855		- phandle = <0x483>;
	10855	+ phandle = <0x484>;
10856	10856
10857	10857	ports {
10858	10858	#address-cells = <0x1>;
..	..	@@ -10890,7 +10890,7 @@
10890	10890
10891	10891	endpoint {
10892	10892	remote-endpoint = <0x1af>;
10893		- phandle = <0x1ea>;
	10893	+ phandle = <0x1f2>;
10894	10894	};
10895	10895	};
10896	10896	};
..	..	@@ -10911,11 +10911,11 @@
10911	10911	reset-names = "rst_a", "rst_p", "rst_ref", "rst_biu";
10912	10912	pinctrl-0 = <0x1b0 0x1b1>;
10913	10913	pinctrl-names = "default";
10914		- status = "okay";
	10914	+ status = "disabled";
10915	10915	#sound-dai-cells = <0x1>;
10916	10916	hpd-trigger-level = <0x1>;
10917	10917	hdmirx-det-gpios = <0x1b2 0xe 0x1>;
10918		- phandle = <0x1da>;
	10918	+ phandle = <0x1e3>;
10919	10919	};
10920	10920
10921	10921	pcie@fe150000 {
..	..	@@ -10952,7 +10952,7 @@
10952	10952	vpcie3v3-supply = <0x105>;
10953	10953	pinctrl-names = "default";
10954	10954	pinctrl-0 = <0x1b6>;
10955		- phandle = <0x484>;
	10955	+ phandle = <0x485>;
10956	10956
10957	10957	legacy-interrupt-controller {
10958	10958	interrupt-controller;
..	..	@@ -10994,7 +10994,7 @@
10994	10994	reset-names = "pcie", "periph";
10995	10995	rockchip,pipe-grf = <0x6c>;
10996	10996	status = "disabled";
10997		- phandle = <0x485>;
	10997	+ phandle = <0x486>;
10998	10998
10999	10999	legacy-interrupt-controller {
11000	11000	interrupt-controller;
..	..	@@ -11037,7 +11037,7 @@
11037	11037	status = "okay";
11038	11038	reset-gpios = <0xfc 0x5 0x0>;
11039	11039	vpcie3v3-supply = <0x105>;
11040		- phandle = <0x486>;
	11040	+ phandle = <0x487>;
11041	11041
11042	11042	legacy-interrupt-controller {
11043	11043	interrupt-controller;
..	..	@@ -11054,11 +11054,11 @@
11054	11054	reg = <0x0 0xfe1b0000 0x0 0x10000>;
11055	11055	rockchip,ethernet = <0x1ba>;
11056	11056	status = "disabled";
11057		- phandle = <0x487>;
	11057	+ phandle = <0x488>;
11058	11058	};
11059	11059
11060	11060	ethernet@fe1b0000 {
11061		- compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
	11061	+ compatible = "atemsys", "!!rockchip,rk3588-gmac", "!!snps,dwmac-4.20a";
11062	11062	reg = <0x0 0xfe1b0000 0x0 0x10000>;
11063	11063	interrupts = <0x0 0xe3 0x4 0x0 0xe2 0x4>;
11064	11064	interrupt-names = "macirq", "eth_wake_irq";
..	..	@@ -11074,14 +11074,29 @@
11074	11074	snps,axi-config = <0x1bb>;
11075	11075	snps,mtl-rx-config = <0x1bc>;
11076	11076	snps,mtl-tx-config = <0x1bd>;
11077		- status = "disabled";
	11077	+ status = "okay";
	11078	+ phy-mode = "rgmii-rxid";
	11079	+ clock_in_out = "output";
	11080	+ snps,reset-gpio = <0x1be 0xd 0x1>;
	11081	+ snps,reset-active-low;
	11082	+ snps,reset-delays-us = <0x0 0x4e20 0x186a0>;
	11083	+ pinctrl-names = "default";
	11084	+ pinctrl-0 = <0x1bf 0x1c0 0x1c1 0x1c2 0x1c3 0x1c4 0x1c5>;
	11085	+ tx_delay = <0x44>;
	11086	+ phy-handle = <0x1c6>;
11078	11087	phandle = <0x1ba>;
11079	11088
11080	11089	mdio {
11081	11090	compatible = "snps,dwmac-mdio";
11082	11091	#address-cells = <0x1>;
11083	11092	#size-cells = <0x0>;
11084		- phandle = <0x488>;
	11093	+ phandle = <0x489>;
	11094	+
	11095	+ phy@1 {
	11096	+ compatible = "ethernet-phy-ieee802.3-c22";
	11097	+ reg = <0x1>;
	11098	+ phandle = <0x1c6>;
	11099	+ };
11085	11100	};
11086	11101
11087	11102	stmmac-axi-config {
..	..	@@ -11119,7 +11134,7 @@
11119	11134	phy-names = "sata-phy";
11120	11135	ports-implemented = <0x1>;
11121	11136	status = "disabled";
11122		- phandle = <0x489>;
	11137	+ phandle = <0x48a>;
11123	11138	};
11124	11139
11125	11140	phy@fed70000 {
..	..	@@ -11129,7 +11144,7 @@
11129	11144	clock-names = "ref", "apb";
11130	11145	resets = <0x2 0x486 0x2 0xc003f 0x2 0xc0040 0x2 0xc0041>;
11131	11146	reset-names = "apb", "init", "cmn", "lane";
11132		- rockchip,grf = <0x1be>;
	11147	+ rockchip,grf = <0x1c7>;
11133	11148	#phy-cells = <0x0>;
11134	11149	status = "okay";
11135	11150	phandle = <0x1ac>;
..	..	@@ -11142,7 +11157,7 @@
11142	11157	clock-names = "ref", "apb";
11143	11158	resets = <0x2 0x491 0x2 0x486 0x2 0xc003f 0x2 0xc0040 0x2 0xc0041 0x2 0x48f 0x2 0x490>;
11144	11159	reset-names = "phy", "apb", "init", "cmn", "lane", "ropll", "lcpll";
11145		- rockchip,grf = <0x1be>;
	11160	+ rockchip,grf = <0x1c7>;
11146	11161	#phy-cells = <0x0>;
11147	11162	status = "disabled";
11148	11163	phandle = <0x1a9>;
..	..	@@ -11157,16 +11172,16 @@
11157	11172	phy@fed90000 {
11158	11173	compatible = "rockchip,rk3588-usbdp-phy";
11159	11174	reg = <0x0 0xfed90000 0x0 0x10000>;
11160		- rockchip,u2phy-grf = <0x1bf>;
	11175	+ rockchip,u2phy-grf = <0x1c8>;
11161	11176	rockchip,usb-grf = <0x6a>;
11162		- rockchip,usbdpphy-grf = <0x1c0>;
	11177	+ rockchip,usbdpphy-grf = <0x1c9>;
11163	11178	rockchip,vo-grf = <0xf2>;
11164		- clocks = <0x2 0x2b6 0x2 0x280 0x2 0x26a 0x1c1>;
	11179	+ clocks = <0x2 0x2b6 0x2 0x280 0x2 0x26a 0x1ca>;
11165	11180	clock-names = "refclk", "immortal", "pclk", "utmi";
11166	11181	resets = <0x2 0x2f 0x2 0x30 0x2 0x31 0x2 0x32 0x2 0x484>;
11167	11182	reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
11168	11183	status = "okay";
11169		- phandle = <0x48a>;
	11184	+ phandle = <0x48b>;
11170	11185
11171	11186	dp-port {
11172	11187	#phy-cells = <0x0>;
..	..	@@ -11192,7 +11207,7 @@
11192	11207	resets = <0x2 0x20006 0x2 0x4d7>;
11193	11208	reset-names = "combphy-apb", "combphy";
11194	11209	rockchip,pipe-grf = <0x6c>;
11195		- rockchip,pipe-phy-grf = <0x1c2>;
	11210	+ rockchip,pipe-phy-grf = <0x1cb>;
11196	11211	rockchip,pcie1ln-sel-bits = <0x100 0x0 0x0 0x0>;
11197	11212	status = "okay";
11198	11213	phandle = <0x1b9>;
..	..	@@ -11207,7 +11222,7 @@
11207	11222	resets = <0x2 0x2000a>;
11208	11223	reset-names = "phy";
11209	11224	rockchip,pipe-grf = <0x6c>;
11210		- rockchip,phy-grf = <0x1c3>;
	11225	+ rockchip,phy-grf = <0x1cc>;
11211	11226	status = "disabled";
11212	11227	rockchip,pcie30-phymode = <0x4>;
11213	11228	phandle = <0x1b5>;
..	..	@@ -11215,11 +11230,11 @@
11215	11230
11216	11231	adc-keys {
11217	11232	compatible = "adc-keys";
11218		- io-channels = <0x1c4 0x1>;
	11233	+ io-channels = <0x1cd 0x1>;
11219	11234	io-channel-names = "buttons";
11220	11235	keyup-threshold-microvolt = <0x1b7740>;
11221	11236	poll-interval = <0x64>;
11222		- phandle = <0x48b>;
	11237	+ phandle = <0x48c>;
11223	11238
11224	11239	vol-up-key {
11225	11240	label = "volume up";
..	..	@@ -11250,7 +11265,7 @@
11250	11265	compatible = "pwm-backlight";
11251	11266	brightness-levels = <0x0 0x14 0x14 0x15 0x15 0x16 0x16 0x17 0x17 0x18 0x18 0x19 0x19 0x1a 0x1a 0x1b 0x1b 0x1c 0x1c 0x1d 0x1d 0x1e 0x1e 0x1f 0x1f 0x20 0x20 0x21 0x21 0x22 0x22 0x23 0x23 0x24 0x24 0x25 0x25 0x26 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff>;
11252	11267	default-brightness-level = <0xc8>;
11253		- pwms = <0x1c5 0x0 0x61a8 0x0>;
	11268	+ pwms = <0x1ce 0x0 0x61a8 0x0>;
11254	11269	status = "okay";
11255	11270	phandle = <0xee>;
11256	11271	};
..	..	@@ -11259,7 +11274,7 @@
11259	11274	compatible = "pwm-backlight";
11260	11275	brightness-levels = <0x0 0x14 0x14 0x15 0x15 0x16 0x16 0x17 0x17 0x18 0x18 0x19 0x19 0x1a 0x1a 0x1b 0x1b 0x1c 0x1c 0x1d 0x1d 0x1e 0x1e 0x1f 0x1f 0x20 0x20 0x21 0x21 0x22 0x22 0x23 0x23 0x24 0x24 0x25 0x25 0x26 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff>;
11261	11276	default-brightness-level = <0xc8>;
11262		- pwms = <0x1c6 0x0 0x61a8 0x0>;
	11277	+ pwms = <0x1cf 0x0 0x61a8 0x0>;
11263	11278	status = "disabled";
11264	11279	phandle = <0xe9>;
11265	11280	};
..	..	@@ -11268,7 +11283,7 @@
11268	11283	status = "disabled";
11269	11284	compatible = "delta,dfbmcs320";
11270	11285	#sound-dai-cells = <0x1>;
11271		- phandle = <0x1c8>;
	11286	+ phandle = <0x1d1>;
11272	11287	};
11273	11288
11274	11289	bt-sound {
..	..	@@ -11278,14 +11293,14 @@
11278	11293	simple-audio-card,bitclock-inversion = <0x0>;
11279	11294	simple-audio-card,mclk-fs = <0x100>;
11280	11295	simple-audio-card,name = "rockchip,bt";
11281		- phandle = <0x48c>;
	11296	+ phandle = <0x48d>;
11282	11297
11283	11298	simple-audio-card,cpu {
11284		- sound-dai = <0x1c7>;
	11299	+ sound-dai = <0x1d0>;
11285	11300	};
11286	11301
11287	11302	simple-audio-card,codec {
11288		- sound-dai = <0x1c8 0x1>;
	11303	+ sound-dai = <0x1d1 0x1>;
11289	11304	};
11290	11305	};
11291	11306
..	..	@@ -11294,10 +11309,10 @@
11294	11309	compatible = "rockchip,hdmi";
11295	11310	rockchip,mclk-fs = <0x80>;
11296	11311	rockchip,card-name = "rockchip-hdmi0";
11297		- rockchip,cpu = <0x1c9>;
11298		- rockchip,codec = <0x1ca>;
	11312	+ rockchip,cpu = <0x1d2>;
	11313	+ rockchip,codec = <0x1d3>;
11299	11314	rockchip,jack-det;
11300		- phandle = <0x48d>;
	11315	+ phandle = <0x48e>;
11301	11316	};
11302	11317
11303	11318	hdmi1-sound {
..	..	@@ -11305,10 +11320,10 @@
11305	11320	compatible = "rockchip,hdmi";
11306	11321	rockchip,mclk-fs = <0x80>;
11307	11322	rockchip,card-name = "rockchip-hdmi1";
11308		- rockchip,cpu = <0x1cb>;
11309		- rockchip,codec = <0x1cc>;
	11323	+ rockchip,cpu = <0x1d4>;
	11324	+ rockchip,codec = <0x1d5>;
11310	11325	rockchip,jack-det;
11311		- phandle = <0x48e>;
	11326	+ phandle = <0x48f>;
11312	11327	};
11313	11328
11314	11329	dp0-sound {
..	..	@@ -11316,10 +11331,10 @@
11316	11331	compatible = "rockchip,hdmi";
11317	11332	rockchip,card-name = "rockchip-dp0";
11318	11333	rockchip,mclk-fs = <0x200>;
11319		- rockchip,cpu = <0x1cd>;
11320		- rockchip,codec = <0x1ce 0x1>;
	11334	+ rockchip,cpu = <0x1d6>;
	11335	+ rockchip,codec = <0x1d7 0x1>;
11321	11336	rockchip,jack-det;
11322		- phandle = <0x48f>;
	11337	+ phandle = <0x490>;
11323	11338	};
11324	11339
11325	11340	dp1-sound {
..	..	@@ -11327,20 +11342,20 @@
11327	11342	compatible = "rockchip,hdmi";
11328	11343	rockchip,card-name = "rockchip-dp1";
11329	11344	rockchip,mclk-fs = <0x200>;
11330		- rockchip,cpu = <0x1cf>;
11331		- rockchip,codec = <0x1d0 0x1>;
	11345	+ rockchip,cpu = <0x1d8>;
	11346	+ rockchip,codec = <0x1d9 0x1>;
11332	11347	rockchip,jack-det;
11333		- phandle = <0x490>;
	11348	+ phandle = <0x491>;
11334	11349	};
11335	11350
11336	11351	leds {
11337	11352	compatible = "gpio-leds";
11338		- phandle = <0x491>;
	11353	+ phandle = <0x492>;
11339	11354
11340	11355	sys_led {
11341	11356	gpios = <0x1b2 0x1e 0x0>;
11342	11357	linux,default-trigger = "heartbeat";
11343		- phandle = <0x492>;
	11358	+ phandle = <0x493>;
11344	11359	};
11345	11360	};
11346	11361
..	..	@@ -11348,7 +11363,7 @@
11348	11363	status = "disabled";
11349	11364	compatible = "linux,spdif-dit";
11350	11365	#sound-dai-cells = <0x0>;
11351		- phandle = <0x1d2>;
	11366	+ phandle = <0x1db>;
11352	11367	};
11353	11368
11354	11369	spdif-tx0-sound {
..	..	@@ -11356,14 +11371,14 @@
11356	11371	compatible = "simple-audio-card";
11357	11372	simple-audio-card,mclk-fs = <0x80>;
11358	11373	simple-audio-card,name = "rockchip,spdif-tx0";
11359		- phandle = <0x493>;
	11374	+ phandle = <0x494>;
11360	11375
11361	11376	simple-audio-card,cpu {
11362		- sound-dai = <0x1d1>;
	11377	+ sound-dai = <0x1da>;
11363	11378	};
11364	11379
11365	11380	simple-audio-card,codec {
11366		- sound-dai = <0x1d2>;
	11381	+ sound-dai = <0x1db>;
11367	11382	};
11368	11383	};
11369	11384
..	..	@@ -11371,7 +11386,7 @@
11371	11386	status = "disabled";
11372	11387	compatible = "linux,spdif-dit";
11373	11388	#sound-dai-cells = <0x0>;
11374		- phandle = <0x1d4>;
	11389	+ phandle = <0x1dd>;
11375	11390	};
11376	11391
11377	11392	spdif-tx1-sound {
..	..	@@ -11379,14 +11394,14 @@
11379	11394	compatible = "simple-audio-card";
11380	11395	simple-audio-card,mclk-fs = <0x80>;
11381	11396	simple-audio-card,name = "rockchip,spdif-tx1";
11382		- phandle = <0x494>;
	11397	+ phandle = <0x495>;
11383	11398
11384	11399	simple-audio-card,cpu {
11385		- sound-dai = <0x1d3>;
	11400	+ sound-dai = <0x1dc>;
11386	11401	};
11387	11402
11388	11403	simple-audio-card,codec {
11389		- sound-dai = <0x1d4>;
	11404	+ sound-dai = <0x1dd>;
11390	11405	};
11391	11406	};
11392	11407
..	..	@@ -11401,7 +11416,7 @@
11401	11416	regulator-boot-on;
11402	11417	regulator-min-microvolt = <0xb71b00>;
11403	11418	regulator-max-microvolt = <0xb71b00>;
11404		- phandle = <0x1d5>;
	11419	+ phandle = <0x1de>;
11405	11420	};
11406	11421
11407	11422	vcc5v0-sys {
..	..	@@ -11411,7 +11426,7 @@
11411	11426	regulator-boot-on;
11412	11427	regulator-min-microvolt = <0x4c4b40>;
11413	11428	regulator-max-microvolt = <0x4c4b40>;
11414		- vin-supply = <0x1d5>;
	11429	+ vin-supply = <0x1de>;
11415	11430	phandle = <0x6e>;
11416	11431	};
11417	11432
..	..	@@ -11422,8 +11437,8 @@
11422	11437	regulator-boot-on;
11423	11438	regulator-min-microvolt = <0x4c4b40>;
11424	11439	regulator-max-microvolt = <0x4c4b40>;
11425		- vin-supply = <0x1d5>;
11426		- phandle = <0x1d6>;
	11440	+ vin-supply = <0x1de>;
	11441	+ phandle = <0x1df>;
11427	11442	};
11428	11443
11429	11444	vcc5v0-usb {
..	..	@@ -11433,8 +11448,8 @@
11433	11448	regulator-boot-on;
11434	11449	regulator-min-microvolt = <0x4c4b40>;
11435	11450	regulator-max-microvolt = <0x4c4b40>;
11436		- vin-supply = <0x1d6>;
11437		- phandle = <0x1e2>;
	11451	+ vin-supply = <0x1df>;
	11452	+ phandle = <0x1eb>;
11438	11453	};
11439	11454
11440	11455	reserved-memory {
..	..	@@ -11459,7 +11474,7 @@
11459	11474	drm-cubic-lut@00000000 {
11460	11475	compatible = "rockchip,drm-cubic-lut";
11461	11476	reg = <0x0 0x0 0x0 0x0>;
11462		- phandle = <0x495>;
	11477	+ phandle = <0x496>;
11463	11478	};
11464	11479
11465	11480	ramoops@110000 {
..	..	@@ -11469,25 +11484,25 @@
11469	11484	console-size = <0x80000>;
11470	11485	ftrace-size = <0x0>;
11471	11486	pmsg-size = <0x50000>;
11472		- phandle = <0x496>;
	11487	+ phandle = <0x497>;
11473	11488	};
11474	11489	};
11475	11490
11476	11491	es8316-sound {
11477		- status = "okay";
	11492	+ status = "disabled";
11478	11493	compatible = "rockchip,multicodecs-card";
11479	11494	rockchip,card-name = "rockchip-es8316";
11480	11495	rockchip,format = "i2s";
11481	11496	rockchip,mclk-fs = <0x100>;
11482		- rockchip,cpu = <0x1d7>;
11483		- rockchip,codec = <0x1d8>;
	11497	+ rockchip,cpu = <0x1e0>;
	11498	+ rockchip,codec = <0x1e1>;
11484	11499	poll-interval = <0x64>;
11485		- io-channels = <0x1c4 0x3>;
	11500	+ io-channels = <0x1cd 0x3>;
11486	11501	io-channel-names = "adc-detect";
11487	11502	keyup-threshold-microvolt = <0x1b7740>;
11488		- pinctrl-0 = <0x1d9>;
	11503	+ pinctrl-0 = <0x1e2>;
11489	11504	pinctrl-names = "default";
11490		- phandle = <0x497>;
	11505	+ phandle = <0x498>;
11491	11506
11492	11507	play-pause-key {
11493	11508	label = "playpause";
..	..	@@ -11499,21 +11514,21 @@
11499	11514	pwm-fan {
11500	11515	compatible = "pwm-fan";
11501	11516	#cooling-cells = <0x2>;
11502		- pwms = <0x1c5 0x0 0xc350 0x0>;
	11517	+ pwms = <0x1ce 0x0 0xc350 0x0>;
11503	11518	cooling-levels = <0x0 0x32 0x64 0x96 0xc8 0xff>;
11504	11519	rockchip,temp-trips = <0xc350 0x1 0xd6d8 0x2 0xea60 0x3 0xfde8 0x4 0x11170 0x5>;
11505		- phandle = <0x498>;
	11520	+ phandle = <0x499>;
11506	11521	};
11507	11522
11508	11523	hdmiin-sound {
11509	11524	compatible = "rockchip,hdmi";
11510	11525	rockchip,mclk-fs = <0x80>;
11511	11526	rockchip,format = "i2s";
11512		- rockchip,bitclock-master = <0x1da>;
11513		- rockchip,frame-master = <0x1da>;
	11527	+ rockchip,bitclock-master = <0x1e3>;
	11528	+ rockchip,frame-master = <0x1e3>;
11514	11529	rockchip,card-name = "rockchip,hdmiin";
11515		- rockchip,cpu = <0x1db>;
11516		- rockchip,codec = <0x1da 0x0>;
	11530	+ rockchip,cpu = <0x1e4>;
	11531	+ rockchip,codec = <0x1e3 0x0>;
11517	11532	rockchip,jack-det;
11518	11533	};
11519	11534
..	..	@@ -11524,8 +11539,8 @@
11524	11539	regulator-always-on;
11525	11540	regulator-min-microvolt = <0xcf850>;
11526	11541	regulator-max-microvolt = <0xcf850>;
11527		- vin-supply = <0x1dc>;
11528		- phandle = <0x499>;
	11542	+ vin-supply = <0x1e5>;
	11543	+ phandle = <0x49a>;
11529	11544	};
11530	11545
11531	11546	pcie20-avdd1v8 {
..	..	@@ -11535,8 +11550,8 @@
11535	11550	regulator-always-on;
11536	11551	regulator-min-microvolt = <0x1b7740>;
11537	11552	regulator-max-microvolt = <0x1b7740>;
11538		- vin-supply = <0x1dd>;
11539		- phandle = <0x49a>;
	11553	+ vin-supply = <0x1e6>;
	11554	+ phandle = <0x49b>;
11540	11555	};
11541	11556
11542	11557	pcie30-avdd0v75 {
..	..	@@ -11546,8 +11561,8 @@
11546	11561	regulator-always-on;
11547	11562	regulator-min-microvolt = <0xb71b0>;
11548	11563	regulator-max-microvolt = <0xb71b0>;
11549		- vin-supply = <0x1de>;
11550		- phandle = <0x49b>;
	11564	+ vin-supply = <0x1e7>;
	11565	+ phandle = <0x49c>;
11551	11566	};
11552	11567
11553	11568	pcie30-avdd1v8 {
..	..	@@ -11557,16 +11572,16 @@
11557	11572	regulator-always-on;
11558	11573	regulator-min-microvolt = <0x1b7740>;
11559	11574	regulator-max-microvolt = <0x1b7740>;
11560		- vin-supply = <0x1dd>;
11561		- phandle = <0x49c>;
	11575	+ vin-supply = <0x1e6>;
	11576	+ phandle = <0x49d>;
11562	11577	};
11563	11578
11564	11579	sdio-pwrseq {
11565	11580	compatible = "mmc-pwrseq-simple";
11566		- clocks = <0x1df>;
	11581	+ clocks = <0x1e8>;
11567	11582	clock-names = "ext_clock";
11568	11583	pinctrl-names = "default";
11569		- pinctrl-0 = <0x1e0>;
	11584	+ pinctrl-0 = <0x1e9>;
11570	11585	post-power-on-delay-ms = <0xc8>;
11571	11586	reset-gpios = <0x1b2 0x16 0x1>;
11572	11587	phandle = <0x11a>;
..	..	@@ -11578,9 +11593,9 @@
11578	11593	headset_gpio = <0x108 0x1d 0x0>;
11579	11594	spk_ctl_gpio = <0xfc 0xc 0x1>;
11580	11595	pinctrl-names = "default";
11581		- pinctrl-0 = <0x1e1>;
11582		- io-channels = <0x1c4 0x3>;
11583		- phandle = <0x49d>;
	11596	+ pinctrl-0 = <0x1ea>;
	11597	+ io-channels = <0x1cd 0x3>;
	11598	+ phandle = <0x49e>;
11584	11599	};
11585	11600
11586	11601	vcc-1v1-nldo-s3 {
..	..	@@ -11612,7 +11627,7 @@
11612	11627	regulator-max-microvolt = <0x325aa0>;
11613	11628	enable-active-high;
11614	11629	startup-delay-us = <0x1388>;
11615		- vin-supply = <0x1d5>;
	11630	+ vin-supply = <0x1de>;
11616	11631	phandle = <0x105>;
11617	11632	};
11618	11633
..	..	@@ -11625,9 +11640,9 @@
11625	11640	regulator-max-microvolt = <0x4c4b40>;
11626	11641	enable-active-high;
11627	11642	gpio = <0xfc 0x8 0x0>;
11628		- vin-supply = <0x1e2>;
	11643	+ vin-supply = <0x1eb>;
11629	11644	pinctrl-names = "default";
11630		- pinctrl-0 = <0x1e3>;
	11645	+ pinctrl-0 = <0x1ec>;
11631	11646	phandle = <0x6b>;
11632	11647	};
11633	11648
..	..	@@ -11640,61 +11655,31 @@
11640	11655
11641	11656	wireless-bluetooth {
11642	11657	compatible = "bluetooth-platdata";
11643		- clocks = <0x1df>;
	11658	+ clocks = <0x1e8>;
11644	11659	clock-names = "ext_clock";
11645	11660	uart_rts_gpios = <0xfc 0x14 0x1>;
11646	11661	pinctrl-names = "default", "rts_gpio";
11647		- pinctrl-0 = <0x1e4 0x1e5>;
11648		- pinctrl-1 = <0x1e6>;
	11662	+ pinctrl-0 = <0x1ed 0x1ee>;
	11663	+ pinctrl-1 = <0x1ef>;
11649	11664	BT,reset_gpio = <0x15b 0xa 0x0>;
11650		- status = "okay";
11651		- phandle = <0x49e>;
	11665	+ status = "disabled";
	11666	+ phandle = <0x49f>;
11652	11667	};
11653	11668
11654	11669	wireless-wlan {
11655	11670	compatible = "wlan-platdata";
11656	11671	wifi_chip_type = "ap6398s";
11657		- status = "okay";
11658		- phandle = <0x49f>;
	11672	+ status = "disabled";
	11673	+ phandle = <0x4a0>;
11659	11674	};
11660	11675
11661	11676	ndj_io_init {
11662	11677	compatible = "nk_io_control";
11663	11678	pinctrl-names = "default";
11664		- pinctrl-0 = <0x1e7>;
11665		-
11666		- vcc_12v {
11667		- gpio_num = <0x15b 0x1b 0x0>;
11668		- gpio_function = <0x0>;
11669		- };
11670		-
11671		- vcc_3v {
11672		- gpio_num = <0xfc 0x1 0x0>;
11673		- gpio_function = <0x0>;
11674		- };
	11679	+ pinctrl-0 = <0x1f0>;
11675	11680
11676	11681	hub_5V_reset {
11677	11682	gpio_num = <0xfc 0xe 0x0>;
11678		- gpio_function = <0x3>;
11679		- };
11680		-
11681		- 4g_power {
11682		- gpio_num = <0x15b 0x16 0x0>;
11683		- gpio_function = <0x0>;
11684		- };
11685		-
11686		- wake_wifi_bt {
11687		- gpio_num = <0x1e8 0xd 0x1>;
11688		- gpio_function = <0x0>;
11689		- };
11690		-
11691		- air_mode_4g {
11692		- gpio_num = <0x1e8 0xc 0x1>;
11693		- gpio_function = <0x0>;
11694		- };
11695		-
11696		- reset_4g {
11697		- gpio_num = <0x1e8 0x13 0x1>;
11698	11683	gpio_function = <0x3>;
11699	11684	};
11700	11685	};
..	..	@@ -11712,15 +11697,15 @@
11712	11697	bpc = <0x8>;
11713	11698	prepare-delay-ms = <0xc8>;
11714	11699	enable-delay-ms = <0x14>;
11715		- lvds-gpio0 = <0x1e8 0x15 0x0>;
	11700	+ lvds-gpio0 = <0x1be 0x15 0x0>;
11716	11701	lvds-gpio1 = <0xfc 0x12 0x0>;
11717	11702	lvds-gpio2 = <0xfc 0x13 0x0>;
11718	11703	lvds-gpio3 = <0xfc 0x16 0x0>;
11719	11704	nodka-lvds = <0xf>;
11720		- phandle = <0x4a0>;
	11705	+ phandle = <0x4a1>;
11721	11706
11722	11707	display-timings {
11723		- native-mode = <0x1e9>;
	11708	+ native-mode = <0x1f1>;
11724	11709
11725	11710	timing0 {
11726	11711	clock-frequency = <0x459e440>;
..	..	@@ -11736,14 +11721,14 @@
11736	11721	vsync-active = <0x0>;
11737	11722	de-active = <0x0>;
11738	11723	pixelclk-active = <0x0>;
11739		- phandle = <0x1e9>;
	11724	+ phandle = <0x1f1>;
11740	11725	};
11741	11726	};
11742	11727
11743	11728	port {
11744	11729
11745	11730	endpoint {
11746		- remote-endpoint = <0x1ea>;
	11731	+ remote-endpoint = <0x1f2>;
11747	11732	phandle = <0x1af>;
11748	11733	};
11749	11734	};
..	..	@@ -11751,19 +11736,19 @@
11751	11736
11752	11737	chosen {
11753	11738	bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTUUID=614e0000-0000 rw rootwait net.ifnames=0";
11754		- phandle = <0x4a1>;
	11739	+ phandle = <0x4a2>;
11755	11740	};
11756	11741
11757	11742	cspmu@fd10c000 {
11758	11743	compatible = "rockchip,cspmu";
11759	11744	reg = <0x0 0xfd10c000 0x0 0x1000 0x0 0xfd10d000 0x0 0x1000 0x0 0xfd10e000 0x0 0x1000 0x0 0xfd10f000 0x0 0x1000 0x0 0xfd12c000 0x0 0x1000 0x0 0xfd12d000 0x0 0x1000 0x0 0xfd12e000 0x0 0x1000 0x0 0xfd12f000 0x0 0x1000>;
11760		- phandle = <0x4a2>;
	11745	+ phandle = <0x4a3>;
11761	11746	};
11762	11747
11763	11748	debug@fd104000 {
11764	11749	compatible = "rockchip,debug";
11765	11750	reg = <0x0 0xfd104000 0x0 0x1000 0x0 0xfd105000 0x0 0x1000 0x0 0xfd106000 0x0 0x1000 0x0 0xfd107000 0x0 0x1000 0x0 0xfd124000 0x0 0x1000 0x0 0xfd125000 0x0 0x1000 0x0 0xfd126000 0x0 0x1000 0x0 0xfd127000 0x0 0x1000>;
11766		- phandle = <0x4a3>;
	11751	+ phandle = <0x4a4>;
11767	11752	};
11768	11753
11769	11754	fiq-debugger {
..	..	@@ -11774,9 +11759,9 @@
11774	11759	rockchip,baudrate = <0x16e360>;
11775	11760	interrupts = <0x0 0x1a7 0x8>;
11776	11761	pinctrl-names = "default";
11777		- pinctrl-0 = <0x1eb>;
	11762	+ pinctrl-0 = <0x1f3>;
11778	11763	status = "okay";
11779		- phandle = <0x4a4>;
	11764	+ phandle = <0x4a5>;
11780	11765	};
11781	11766
11782	11767	__symbols__ {
..	..	@@ -12159,7 +12144,7 @@
12159	12144	gmac_uio1 = "/uio@fe1c0000";
12160	12145	gmac1 = "/ethernet@fe1c0000";
12161	12146	mdio1 = "/ethernet@fe1c0000/mdio";
12162		- rgmii_phy = "/ethernet@fe1c0000/mdio/phy@1";
	12147	+ rgmii_phy1 = "/ethernet@fe1c0000/mdio/phy@1";
12163	12148	gmac1_stmmac_axi_setup = "/ethernet@fe1c0000/stmmac-axi-config";
12164	12149	gmac1_mtl_rx_setup = "/ethernet@fe1c0000/rx-queues-config";
12165	12150	gmac1_mtl_tx_setup = "/ethernet@fe1c0000/tx-queues-config";
..	..	@@ -12920,6 +12905,7 @@
12920	12905	gmac_uio0 = "/uio@fe1b0000";
12921	12906	gmac0 = "/ethernet@fe1b0000";
12922	12907	mdio0 = "/ethernet@fe1b0000/mdio";
	12908	+ rgmii_phy0 = "/ethernet@fe1b0000/mdio/phy@1";
12923	12909	gmac0_stmmac_axi_setup = "/ethernet@fe1b0000/stmmac-axi-config";
12924	12910	gmac0_mtl_rx_setup = "/ethernet@fe1b0000/rx-queues-config";
12925	12911	gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config";