hc
2024-11-15 a46a1ad097419aeea7350987dd95230f50d90392
kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -27,7 +27,7 @@
2727 };
2828
2929 es8316_sound: es8316-sound {
30
- status = "okay";
30
+ status = "disabled";
3131 compatible = "rockchip,multicodecs-card";
3232 rockchip,card-name = "rockchip-es8316";
3333 rockchip,format = "i2s";
....@@ -38,7 +38,7 @@
3838 io-channels = <&saradc 3>;
3939 io-channel-names = "adc-detect";
4040 keyup-threshold-microvolt = <1800000>;
41
- pinctrl-0 = <&spk_con>;
41
+ //pinctrl-0 = <&spk_con>;
4242 pinctrl-names = "default";
4343 //hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
4444 //spk-con-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
....@@ -114,7 +114,7 @@
114114 regulator-max-microvolt = <1800000>;
115115 vin-supply = <&avcc_1v8_s0>;
116116 };
117
-
117
+#if 0
118118 sdio_pwrseq: sdio-pwrseq {
119119 compatible = "mmc-pwrseq-simple";
120120 clocks = <&hym8563>;
....@@ -132,15 +132,15 @@
132132 };
133133
134134 rk_headset: rk-headset {
135
- status = "okay";
135
+ status = "disabled";
136136 compatible = "rockchip_headset";
137
- headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138
- spk_ctl_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
137
+ //headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138
+ //spk_ctl_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
139139 pinctrl-names = "default";
140140 pinctrl-0 = <&hp_det>;
141141 io-channels = <&saradc 3>;
142142 };
143
-
143
+#endif
144144
145145 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
146146 compatible = "regulator-fixed";
....@@ -182,10 +182,10 @@
182182 regulator-min-microvolt = <5000000>;
183183 regulator-max-microvolt = <5000000>;
184184 enable-active-high;
185
- gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
185
+ //gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
186186 vin-supply = <&vcc5v0_usb>;
187
- pinctrl-names = "default";
188
- pinctrl-0 = <&vcc5v0_host_en>;
187
+ //pinctrl-names = "default";
188
+ //pinctrl-0 = <&vcc5v0_host_en>;
189189 };
190190 /*
191191 vcc_mipicsi0: vcc-mipicsi0-regulator {
....@@ -229,13 +229,13 @@
229229 clocks = <&hym8563>;
230230 clock-names = "ext_clock";
231231 uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
232
- pinctrl-names = "default", "rts_gpio";
233
- pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
234
- pinctrl-1 = <&uart9_gpios>;
235
- BT,reset_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
232
+ //pinctrl-names = "default", "rts_gpio";
233
+ //pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
234
+ //pinctrl-1 = <&uart9_gpios>;
235
+ //BT,reset_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236236 //BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237237 //BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
- status = "okay";
238
+ status = "disabled";
239239 };
240240
241241 wireless_wlan: wireless-wlan {
....@@ -245,7 +245,7 @@
245245 // pinctrl-0 = <&wifi_host_wake_irq>;
246246 // WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
247247 // WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
248
- status = "okay";
248
+ status = "disabled";
249249 };
250250
251251 ndj_io_init {
....@@ -253,45 +253,13 @@
253253 pinctrl-names = "default";
254254 pinctrl-0 = <&ndj_io_gpio>;
255255
256
- vcc_12v {
257
- gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
258
- gpio_function = <0>;
259
- };//VCC12_IO_EN_GPIO0_D3_u_3V3
260
-
261
- vcc_3v {
262
- gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
263
- gpio_function = <0>;
264
- };//VCC3_IO_EN_GPIO4_A1_d_3V3
256
+
265257
266258 hub_5V_reset {
267259 gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
268260 gpio_function = <3>;
269261 };//HUB_RESET_GPIO4_B6_d_3V3
270262
271
- 4g_power {
272
- gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
273
- gpio_function = <0>;
274
- };//4G_PWREN_GPIO3_C7_u_3V3
275
-
276
- 5g_power {
277
- gpio_num =<&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
278
- gpio_function = <0>;
279
- };
280
-
281
- wake_wifi_bt {
282
- gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
283
- gpio_function = <0>;
284
- };//GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
285
-
286
- air_mode_4g {
287
- gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
288
- gpio_function = <0>;
289
- }; //GPIO2_B4_u_1V8_4G_AIR_MODE_IN
290
-
291
- reset_4g {
292
- gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
293
- gpio_function = <3>;
294
- }; //GPIO2_C3_d_1V8_4G_RESET_N_IN
295263
296264
297265 };
....@@ -439,7 +407,7 @@
439407 };
440408
441409 &dsi0_in_vp3 {
442
- status = "okay";
410
+ status = "disabled";
443411 };
444412
445413 /*
....@@ -472,6 +440,31 @@
472440 //pinctrl-0 = <&lcd_rst_gpio>;
473441 };
474442
443
+&gmac0 {
444
+ /* Use rgmii-rxid mode to disable rx delay inside Soc */
445
+ phy-mode = "rgmii-rxid";
446
+ clock_in_out = "output";
447
+
448
+ snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
449
+ snps,reset-active-low;
450
+ /* Reset time is 20ms, 100ms for rtl8211f */
451
+ snps,reset-delays-us = <0 20000 100000>;
452
+
453
+ pinctrl-names = "default";
454
+ pinctrl-0 = <&gmac0_miim
455
+ &gmac0_tx_bus2
456
+ &gmac0_rx_bus2
457
+ &gmac0_rgmii_clk
458
+ &gmac0_rgmii_bus
459
+ &eth0_pins
460
+ &gmac0_clkinout>;
461
+ tx_delay = <0x44>;
462
+ /* rx_delay = <0x4f>; */
463
+
464
+ phy-handle = <&rgmii_phy0>;
465
+ status = "okay";
466
+};
467
+
475468 &gmac1 {
476469 /* Use rgmii-rxid mode to disable rx delay inside Soc */
477470 phy-mode = "rgmii-rxid";
....@@ -492,7 +485,7 @@
492485 tx_delay = <0x43>;
493486 /* rx_delay = <0x3f>; */
494487
495
- phy-handle = <&rgmii_phy>;
488
+ phy-handle = <&rgmii_phy1>;
496489 status = "okay";
497490 };
498491
....@@ -524,7 +517,7 @@
524517
525518 /* Should work with at least 128MB cma reserved above. */
526519 &hdmirx_ctrler {
527
- status = "okay";
520
+ status = "disabled";
528521
529522 #sound-dai-cells = <1>;
530523 /* Effective level used to trigger HPD: 0-low, 1-high */
....@@ -663,8 +656,8 @@
663656 gt1x: gt1x@14 {
664657 compatible = "goodix,gt1x";
665658 reg = <0x14>;
666
- pinctrl-names = "default";
667
- pinctrl-0 = <&touch_gpio>;
659
+ //pinctrl-names = "default";
660
+ //pinctrl-0 = <&touch_gpio>;
668661 goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
669662 goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
670663 power-supply = <&vcc3v3_lcd_n>;
....@@ -824,12 +817,18 @@
824817 };
825818
826819 &mdio1 {
827
- rgmii_phy: phy@1 {
820
+ rgmii_phy1: phy@1 {
828821 compatible = "ethernet-phy-ieee802.3-c22";
829822 reg = <0x1>;
830823 };
831824 };
832825
826
+&mdio0 {
827
+ rgmii_phy0: phy@1 {
828
+ compatible = "ethernet-phy-ieee802.3-c22";
829
+ reg = <0x1>;
830
+ };
831
+};
833832
834833
835834 &mipi_dcphy1 {
....@@ -838,7 +837,7 @@
838837
839838 &pcie2x1l2 {
840839 phys = <&combphy0_ps PHY_TYPE_PCIE>;
841
- reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
840
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
842841 vpcie3v3-supply = <&vcc3v3_pcie30>;
843842 status = "okay";
844843 };//MINIPCIE
....@@ -847,7 +846,7 @@
847846 phys = <&combphy2_psu PHY_TYPE_PCIE>;
848847 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
849848 vpcie3v3-supply = <&vcc3v3_pcie30>;
850
- status = "disabled";
849
+ status = "okay";
851850 };//M.2 WIFI6
852851
853852 &pcie2x1l0 {
....@@ -900,7 +899,7 @@
900899 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
901900 };
902901 };
903
-
902
+/*
904903 headphone {
905904 hp_det: hp-det {
906905 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
....@@ -910,7 +909,7 @@
910909 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
911910 };
912911 };
913
-
912
+*/
914913 hym8563 {
915914 hym8563_int: hym8563-int {
916915 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
....@@ -928,19 +927,19 @@
928927 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
929928 };
930929 };
931
-
930
+/*
932931 sdio-pwrseq {
933932 wifi_enable_h: wifi-enable-h {
934933 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
935934 };
936935 };
937
-/*
936
+
938937 sdmmc {
939938 sd_s0_pwr: sd-s0-pwr {
940939 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
941940 };
942941 };
943
-*/
942
+
944943 touch {
945944 touch_gpio: touch-gpio {
946945 rockchip,pins =
....@@ -965,7 +964,7 @@
965964 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
966965 };
967966 };
968
-/*
967
+
969968 wireless-wlan {
970969 wifi_host_wake_irq: wifi-host-wake-irq {
971970 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
....@@ -976,21 +975,17 @@
976975 ndj_io_init{
977976 ndj_io_gpio: ndj_io_gpio_col{
978977 rockchip,pins =
979
- <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
980
- <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
981
- <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
982
- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
983
- <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
984
- <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
985
- <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, //vcc_5v
986
- <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_MISO_M2_1V8 41
987
- <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MISO_M2_1V8 32
988
- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_MOSI_M2_3V3 42
989
- <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MOSI_M2_1V8 33
990
- <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CLK_M2_1V8 43
991
- <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_CLK_M2_1V8 34
992
- <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CS0_M2_1V8 44
993
- <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; //SPI4_CS0_M2_1V8 35
978
+ <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO1_C6_d_1V8
979
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO0_C6_u_3V3
980
+ <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO0_D3_u_3V3
981
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_A6_d_3V3
982
+ <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_C6_u_3V3
983
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_D5_d_3V3
984
+ <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO4_B0_d_3V3
985
+ <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO4_B4_d_3V3
986
+ <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO4_B5_d_3V3
987
+ <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; //GPIO4_B6_d_3V3
988
+
994989 };
995990 };
996991 };
....@@ -1044,12 +1039,12 @@
10441039 cap-sd-highspeed;
10451040 cap-sdio-irq;
10461041 keep-power-in-suspend;
1047
- mmc-pwrseq = <&sdio_pwrseq>;
1042
+ //mmc-pwrseq = <&sdio_pwrseq>;
10481043 non-removable;
10491044 pinctrl-names = "default";
10501045 pinctrl-0 = <&sdiom0_pins>;
10511046 sd-uhs-sdr104;
1052
- status = "okay";
1047
+ status = "disabled";
10531048 };
10541049
10551050 &sdmmc {
....@@ -1109,7 +1104,7 @@
11091104 #endif
11101105
11111106 &uart1 {
1112
- status = "okay";
1107
+ status = "disabled";
11131108 // dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
11141109 pinctrl-names = "default";
11151110 pinctrl-0 = <&uart1m0_xfer>;
....@@ -1123,7 +1118,7 @@
11231118
11241119
11251120 &uart4 {
1126
- status = "okay";
1121
+ status = "disabled";
11271122 pinctrl-names = "default";
11281123 pinctrl-0 = <&uart4m0_xfer>;
11291124 };
....@@ -1141,7 +1136,7 @@
11411136 };
11421137
11431138 &uart7 {
1144
- status = "okay";
1139
+ status = "disabled";
11451140 pinctrl-names = "default";
11461141 pinctrl-0 = <&uart7m1_xfer>;
11471142 };
....@@ -1154,7 +1149,7 @@
11541149
11551150
11561151 &uart9 {
1157
- status = "okay";
1152
+ status = "disabled";
11581153 pinctrl-names = "default";
11591154 pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
11601155 };