.. | .. |
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128 | 128 | * - PDN (power down when low) |
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129 | 129 | */ |
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130 | 130 | post-power-on-delay-ms = <200>; |
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131 | | - reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; //WIFI_REG_ON_H |
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| 131 | + reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; //BT_DISABLE_GPIO1_C6_d_1V8 |
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132 | 132 | }; |
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133 | 133 | |
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134 | 134 | rk_headset: rk-headset { |
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.. | .. |
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162 | 162 | gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; |
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163 | 163 | vin-supply = <&vcc_1v8_s0>; |
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164 | 164 | }; |
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165 | | - |
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166 | | - vcc3v3_lcd1_n: vcc3v3-lcd1-n { |
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167 | | - compatible = "regulator-fixed"; |
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168 | | - regulator-name = "vcc3v3_lcd1_n"; |
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169 | | - regulator-boot-on; |
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170 | | - regulator-min-microvolt = <3300000>; |
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171 | | - regulator-max-microvolt = <3300000>; |
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172 | | - enable-active-high; |
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173 | | - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; |
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174 | | - }; |
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175 | | - |
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176 | 165 | |
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177 | 166 | vcc3v3_pcie30: vcc3v3-pcie30 { |
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178 | 167 | compatible = "regulator-fixed"; |
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.. | .. |
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241 | 230 | clock-names = "ext_clock"; |
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242 | 231 | uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT |
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243 | 232 | pinctrl-names = "default", "rts_gpio"; |
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244 | | - pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>; |
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| 233 | + pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>; |
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245 | 234 | pinctrl-1 = <&uart9_gpios>; |
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246 | | - BT,reset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H |
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247 | | - BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H |
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248 | | - BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H |
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| 235 | + BT,reset_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8 |
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| 236 | + //BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H |
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| 237 | + //BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H |
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249 | 238 | status = "okay"; |
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250 | 239 | }; |
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251 | 240 | |
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.. | .. |
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263 | 252 | compatible = "nk_io_control"; |
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264 | 253 | pinctrl-names = "default"; |
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265 | 254 | pinctrl-0 = <&ndj_io_gpio>; |
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266 | | - |
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267 | | - usb_power { |
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268 | | - gpio_num = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; |
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269 | | - gpio_function = <0>; |
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270 | | - };//USB_HOST_PWREN_H |
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271 | | - |
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| 255 | + |
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272 | 256 | vcc_12v { |
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273 | 257 | gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; |
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274 | 258 | gpio_function = <0>; |
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.. | .. |
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436 | 420 | * when dsi0 is enabled |
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437 | 421 | */ |
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438 | 422 | &mipi_dcphy0 { |
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439 | | - status = "okay"; |
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| 423 | + status = "disabled"; |
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440 | 424 | }; |
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441 | 425 | |
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442 | 426 | &dsi0 { |
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443 | | - status = "okay"; |
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| 427 | + status = "disabled"; |
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444 | 428 | }; |
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445 | 429 | |
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446 | 430 | &dsi0_in_vp2 { |
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.. | .. |
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449 | 433 | |
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450 | 434 | &dsi0_in_vp3 { |
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451 | 435 | status = "okay"; |
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452 | | -}; |
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453 | | - |
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454 | | -&dsi0_panel { |
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455 | | - power-supply = <&vcc3v3_lcd1_n>; //LCD_PWREN_H |
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456 | | - vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; |
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457 | | - reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; //MIPIDIS_RST_GPIO1_A0_d_1V8 |
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458 | | - vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //MIPIDIS_PWR_EN_1V8 |
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459 | | - pinctrl-names = "default"; |
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460 | | - pinctrl-0 = <&lcd_rst_gpio>; |
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461 | 436 | }; |
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462 | 437 | |
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463 | 438 | /* |
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.. | .. |
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949 | 924 | |
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950 | 925 | sdio-pwrseq { |
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951 | 926 | wifi_enable_h: wifi-enable-h { |
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952 | | - rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; |
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| 927 | + rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; |
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953 | 928 | }; |
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954 | 929 | }; |
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955 | 930 | |
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.. | .. |
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980 | 955 | }; |
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981 | 956 | |
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982 | 957 | bt_reset_gpio: bt-reset-gpio { |
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983 | | - rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; |
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984 | | - }; |
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985 | | - |
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986 | | - bt_wake_gpio: bt-wake-gpio { |
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987 | | - rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; |
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988 | | - }; |
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989 | | - |
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990 | | - bt_irq_gpio: bt-irq-gpio { |
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991 | | - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 958 | + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; |
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992 | 959 | }; |
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993 | 960 | }; |
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994 | 961 | |
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.. | .. |
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1002 | 969 | ndj_io_init{ |
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1003 | 970 | ndj_io_gpio: ndj_io_gpio_col{ |
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1004 | 971 | rockchip,pins = |
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1005 | | - <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, |
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1006 | 972 | <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, |
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1007 | 973 | <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, |
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1008 | 974 | <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, |
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.. | .. |
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1015 | 981 | <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CLK_M2_1V8 |
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1016 | 982 | <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CS0_M2_1V8 |
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1017 | 983 | <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MISO_M2_1V8 |
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1018 | | - <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MOSI_M2_1V8 |
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1019 | | - <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_A7_u_3V3 |
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1020 | | - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; //GPIO3_A0_u_3V3 |
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1021 | | - |
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| 984 | + <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; //SPI4_MOSI_M2_1V8 |
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1022 | 985 | }; |
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1023 | 986 | }; |
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1024 | 987 | }; |
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.. | .. |
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1028 | 991 | }; |
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1029 | 992 | |
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1030 | 993 | &route_dsi0 { |
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1031 | | - status = "okay"; |
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| 994 | + status = "disabled"; |
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1032 | 995 | connect = <&vp3_out_dsi0>; |
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1033 | 996 | }; |
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1034 | 997 | |
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