gpio config

hc

2024-11-01 830ce1f69238136c0197858242f16cf44e0d6cb9

 kernel/arch/arm64/kernel/entry.S
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@@ -39,6 +39,12 @@
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 #endif
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 	.endm
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+	.macro user_exit_el0_irq
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+#if defined(CONFIG_CONTEXT_TRACKING) || defined(CONFIG_TRACE_IRQFLAGS)
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+	bl	enter_el0_irq
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+#endif
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+	.endm
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+
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 	.macro user_enter_irqoff
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 #if defined(CONFIG_CONTEXT_TRACKING) || defined(CONFIG_TRACE_IRQFLAGS)
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 	bl	exit_to_user_mode
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@@ -534,6 +540,21 @@
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 	mov	x24, scs_sp		// preserve the original shadow stack
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 #endif
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+#ifdef CONFIG_DOVETAIL
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+	/*
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+	 * When the pipeline is enabled, context switches over the irq
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+	 * stack are allowed (for the co-kernel), and more interrupts
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+	 * can be taken over sibling stack contexts. So we need a not so
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+	 * subtle way of figuring out whether the irq stack was actually
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+	 * exited, which cannot depend on the current task pointer.
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+	 */
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+	adr_this_cpu x25, irq_nesting, x26
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+	ldr	w26, [x25]
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+	cmp	w26, #0
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+	add	w26, w26, #1
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+	str	w26, [x25]
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+	b.ne	9998f
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+#else
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 	/*
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 	 * Compare sp with the base of the task stack.
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 	 * If the top ~(THREAD_SIZE - 1) bits match, we are on a task stack,
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@@ -543,6 +564,7 @@
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 	eor	x25, x25, x19
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 	and	x25, x25, #~(THREAD_SIZE - 1)
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 	cbnz	x25, 9998f
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+#endif
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 	ldr_this_cpu x25, irq_stack_ptr, x26
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 	mov	x26, #IRQ_STACK_SIZE
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@@ -563,11 +585,18 @@
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 	 * The callee-saved regs (x19-x29) should be preserved between
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 	 * irq_stack_entry and irq_stack_exit, but note that kernel_entry
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 	 * uses x20-x23 to store data for later use.
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+	 * IRQ_PIPELINE: caution, we have to preserve w0.
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 	 */
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 	.macro	irq_stack_exit
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 	mov	sp, x19
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 #ifdef CONFIG_SHADOW_CALL_STACK
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 	mov	scs_sp, x24
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+#endif
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+#ifdef CONFIG_DOVETAIL
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+	adr_this_cpu x1, irq_nesting, x2
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+	ldr	w2, [x1]
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+	add	w2, w2, #-1
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+	str	w2, [x1]
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 #endif
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 	.endm
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@@ -578,7 +607,15 @@
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  * Interrupt handling.
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  */
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 	.macro	irq_handler, handler:req
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+#ifdef CONFIG_IRQ_PIPELINE
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+#	.if	\handler == handle_arch_irq
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+	ldr	x1, =handle_arch_irq_pipelined
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+#	.else
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+#	.error	"irq_pipeline: cannot handle interrupt"
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+#	.endif
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+#else
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 	ldr_l	x1, \handler
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+#endif
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 	mov	x0, sp
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 	irq_stack_entry
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 	blr	x1
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@@ -616,6 +653,9 @@
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 	irq_handler	\handler
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+#ifdef CONFIG_IRQ_PIPELINE
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+	cbz     w0, 66f				// skip epilogue if oob or in-band stalled
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+#endif
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 #ifdef CONFIG_PREEMPTION
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 	ldr	x24, [tsk, #TSK_TI_PREEMPT]	// get preempt count
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 alternative_if ARM64_HAS_IRQ_PRIO_MASKING
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@@ -630,13 +670,13 @@
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 	bl	arm64_preempt_schedule_irq	// irq en/disable is done inside
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 1:
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 #endif
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-
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+66:
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 	mov	x0, sp
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 	bl	exit_el1_irq_or_nmi
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 	.endm
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 	.macro el0_interrupt_handler, handler:req
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-	user_exit_irqoff
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+	user_exit_el0_irq
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 	enable_da_f
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 	tbz	x22, #55, 1f
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@@ -815,6 +855,9 @@
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 	kernel_entry 0
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 el0_irq_naked:
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 	el0_interrupt_handler handle_arch_irq
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+#ifdef CONFIG_IRQ_PIPELINE
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+	cbz	w0, fast_ret_from_el0_irq	// skip epilogue if oob
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+#endif
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 	b	ret_to_user
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 SYM_CODE_END(el0_irq)
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@@ -846,6 +889,11 @@
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 SYM_CODE_START_LOCAL(ret_to_user)
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 	disable_daif
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 	gic_prio_kentry_setup tmp=x3
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+#ifdef CONFIG_IRQ_PIPELINE
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+	ldr	x0, [tsk, #TSK_TI_LOCAL_FLAGS]
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+	tst	x0, #_TLF_OOB
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+	b.ne	fast_ret_to_user
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+#endif
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 #ifdef CONFIG_TRACE_IRQFLAGS
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 	bl	trace_hardirqs_off
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 #endif
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@@ -854,12 +902,22 @@
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 	cbnz	x2, work_pending
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 finish_ret_to_user:
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 	user_enter_irqoff
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+ret_to_user_naked:
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 	enable_step_tsk x19, x2
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 #ifdef CONFIG_GCC_PLUGIN_STACKLEAK
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 	bl	stackleak_erase
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 #endif
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 	kernel_exit 0
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+#ifdef CONFIG_IRQ_PIPELINE
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+fast_ret_from_el0_irq:	
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+ 	disable_daif
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+ 	gic_prio_kentry_setup tmp=x3
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+fast_ret_to_user:
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+	ldr	x19, [tsk, #TSK_TI_FLAGS]
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+	b	ret_to_user_naked
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+#endif
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+
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 /*
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  * Ok, we need to do extra processing, enter the slow path.
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  */