.. | .. |
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158 | 158 | { PCI_VDEVICE(REALTEK, 0x8129) }, |
---|
159 | 159 | { PCI_VDEVICE(REALTEK, 0x8136), RTL_CFG_NO_GBIT }, |
---|
160 | 160 | { PCI_VDEVICE(REALTEK, 0x8161) }, |
---|
161 | | - { PCI_VDEVICE(REALTEK, 0x8162) }, |
---|
162 | 161 | { PCI_VDEVICE(REALTEK, 0x8167) }, |
---|
163 | 162 | { PCI_VDEVICE(REALTEK, 0x8168) }, |
---|
164 | 163 | { PCI_VDEVICE(NCUBE, 0x8168) }, |
---|
.. | .. |
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3201 | 3200 | { 0x01, 0xffff, 0x068b } |
---|
3202 | 3201 | }; |
---|
3203 | 3202 | int rg_saw_cnt; |
---|
3204 | | - |
---|
3205 | 3203 | /* disable aspm and clock request before access ephy */ |
---|
3206 | 3204 | rtl_hw_aspm_clkreq_enable(tp, false); |
---|
3207 | 3205 | rtl_ephy_init(tp, e_info_8168h_1); |
---|
.. | .. |
---|
3227 | 3225 | |
---|
3228 | 3226 | RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN); |
---|
3229 | 3227 | RTL_W8(tp, MISC_1, RTL_R8(tp, MISC_1) & ~PFM_D3COLD_EN); |
---|
3230 | | - |
---|
| 3228 | + |
---|
3231 | 3229 | RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~TX_10M_PS_EN); |
---|
| 3230 | + |
---|
| 3231 | + |
---|
| 3232 | + printk("troy 0x18 value init: %x\n",RTL_R16(tp,0x18)); |
---|
| 3233 | + RTL_W16(tp, 0x18, 0x042F); |
---|
| 3234 | + printk("troy 0x18 value write: %x\n",RTL_R16(tp,0x18)); |
---|
3232 | 3235 | |
---|
3233 | 3236 | rtl_eri_clear_bits(tp, 0x1b0, BIT(12)); |
---|
3234 | 3237 | |
---|
.. | .. |
---|
4184 | 4187 | static bool rtl8169_tso_csum_v2(struct rtl8169_private *tp, |
---|
4185 | 4188 | struct sk_buff *skb, u32 *opts) |
---|
4186 | 4189 | { |
---|
| 4190 | + u32 transport_offset = (u32)skb_transport_offset(skb); |
---|
4187 | 4191 | struct skb_shared_info *shinfo = skb_shinfo(skb); |
---|
4188 | 4192 | u32 mss = shinfo->gso_size; |
---|
4189 | 4193 | |
---|
.. | .. |
---|
4200 | 4204 | WARN_ON_ONCE(1); |
---|
4201 | 4205 | } |
---|
4202 | 4206 | |
---|
4203 | | - opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT; |
---|
| 4207 | + opts[0] |= transport_offset << GTTCPHO_SHIFT; |
---|
4204 | 4208 | opts[1] |= mss << TD1_MSS_SHIFT; |
---|
4205 | 4209 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { |
---|
4206 | 4210 | u8 ip_protocol; |
---|
.. | .. |
---|
4228 | 4232 | else |
---|
4229 | 4233 | WARN_ON_ONCE(1); |
---|
4230 | 4234 | |
---|
4231 | | - opts[1] |= skb_transport_offset(skb) << TCPHO_SHIFT; |
---|
| 4235 | + opts[1] |= transport_offset << TCPHO_SHIFT; |
---|
4232 | 4236 | } else { |
---|
4233 | 4237 | unsigned int padto = rtl_quirk_packet_padto(tp, skb); |
---|
4234 | 4238 | |
---|
.. | .. |
---|
4401 | 4405 | struct net_device *dev, |
---|
4402 | 4406 | netdev_features_t features) |
---|
4403 | 4407 | { |
---|
| 4408 | + int transport_offset = skb_transport_offset(skb); |
---|
4404 | 4409 | struct rtl8169_private *tp = netdev_priv(dev); |
---|
4405 | 4410 | |
---|
4406 | 4411 | if (skb_is_gso(skb)) { |
---|
4407 | 4412 | if (tp->mac_version == RTL_GIGA_MAC_VER_34) |
---|
4408 | 4413 | features = rtl8168evl_fix_tso(skb, features); |
---|
4409 | 4414 | |
---|
4410 | | - if (skb_transport_offset(skb) > GTTCPHO_MAX && |
---|
| 4415 | + if (transport_offset > GTTCPHO_MAX && |
---|
4411 | 4416 | rtl_chip_supports_csum_v2(tp)) |
---|
4412 | 4417 | features &= ~NETIF_F_ALL_TSO; |
---|
4413 | 4418 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { |
---|
.. | .. |
---|
4418 | 4423 | if (rtl_quirk_packet_padto(tp, skb)) |
---|
4419 | 4424 | features &= ~NETIF_F_CSUM_MASK; |
---|
4420 | 4425 | |
---|
4421 | | - if (skb_transport_offset(skb) > TCPHO_MAX && |
---|
| 4426 | + if (transport_offset > TCPHO_MAX && |
---|
4422 | 4427 | rtl_chip_supports_csum_v2(tp)) |
---|
4423 | 4428 | features &= ~NETIF_F_CSUM_MASK; |
---|
4424 | 4429 | } |
---|
.. | .. |
---|
5291 | 5296 | |
---|
5292 | 5297 | return rc; |
---|
5293 | 5298 | } |
---|
5294 | | - |
---|
| 5299 | +extern ssize_t at24_mac1_read(unsigned char* mac); |
---|
5295 | 5300 | static void rtl_init_mac_address(struct rtl8169_private *tp) |
---|
5296 | 5301 | { |
---|
5297 | 5302 | struct net_device *dev = tp->dev; |
---|
5298 | 5303 | u8 *mac_addr = dev->dev_addr; |
---|
5299 | | - int rc; |
---|
5300 | | - |
---|
| 5304 | + int rc,i; |
---|
| 5305 | + unsigned char mac[6]; |
---|
| 5306 | +/* |
---|
5301 | 5307 | rc = eth_platform_get_mac_address(tp_to_dev(tp), mac_addr); |
---|
5302 | 5308 | if (!rc) |
---|
5303 | 5309 | goto done; |
---|
.. | .. |
---|
5309 | 5315 | rtl_read_mac_from_reg(tp, mac_addr, MAC0); |
---|
5310 | 5316 | if (is_valid_ether_addr(mac_addr)) |
---|
5311 | 5317 | goto done; |
---|
| 5318 | +*/ |
---|
| 5319 | + memset(mac, 0x00, 6); |
---|
| 5320 | + at24_mac1_read(mac); |
---|
| 5321 | + |
---|
| 5322 | + if ((mac[0] == 0x68) && (mac[1] == 0xed)) |
---|
| 5323 | + { |
---|
| 5324 | + printk("troy : rtl811h mac read from eeprom success!! \n"); |
---|
| 5325 | + for (i = 0; i < ETH_ALEN; i++) |
---|
| 5326 | + dev->dev_addr[i] = mac[i]; |
---|
| 5327 | + } |
---|
| 5328 | + else |
---|
| 5329 | + { |
---|
| 5330 | + printk("troy : rtl811h mac read from eeprom error!! \n"); |
---|
| 5331 | + dev->dev_addr[0] = 0x66; |
---|
| 5332 | + dev->dev_addr[1] = 0xED; |
---|
| 5333 | + dev->dev_addr[2] = 0xB5; |
---|
| 5334 | + dev->dev_addr[3] = 0x64; |
---|
| 5335 | + dev->dev_addr[4] = 0x72; |
---|
| 5336 | + dev->dev_addr[5] = 0x2C; |
---|
| 5337 | + } |
---|
| 5338 | + if (is_valid_ether_addr(mac_addr)) |
---|
| 5339 | + goto done; |
---|
| 5340 | + |
---|
5312 | 5341 | |
---|
5313 | 5342 | eth_hw_addr_random(dev); |
---|
5314 | 5343 | dev_warn(tp_to_dev(tp), "can't read MAC address, setting random one\n"); |
---|
.. | .. |
---|
5323 | 5352 | enum mac_version chipset; |
---|
5324 | 5353 | struct net_device *dev; |
---|
5325 | 5354 | u16 xid; |
---|
| 5355 | + unsigned char mac[6]; |
---|
5326 | 5356 | |
---|
5327 | 5357 | dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp)); |
---|
5328 | 5358 | if (!dev) |
---|
.. | .. |
---|
5518 | 5548 | #endif |
---|
5519 | 5549 | }; |
---|
5520 | 5550 | |
---|
5521 | | -module_pci_driver(rtl8169_pci_driver); |
---|
| 5551 | +//module_pci_driver(rtl8169_pci_driver); |
---|
| 5552 | +module_pci_driver2(rtl8169_pci_driver); //late_initcall(); |
---|