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5 | 5 | #include <vdso/datapage.h> |
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6 | 6 | #include <vdso/helpers.h> |
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7 | 7 | |
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| 8 | +static int do_hres_timens(const struct vdso_data *vdns, clockid_t clk, |
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| 9 | + struct __kernel_timespec *ts); |
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| 10 | + |
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| 11 | +#ifndef vdso_clocksource_ok |
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| 12 | +static inline bool vdso_clocksource_ok(const struct vdso_data *vd) |
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| 13 | +{ |
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| 14 | + return vd->clock_mode != VDSO_CLOCKMODE_NONE; |
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| 15 | +} |
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| 16 | +#endif |
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| 17 | + |
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| 18 | +#ifndef vdso_cycles_ok |
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| 19 | +static inline bool vdso_cycles_ok(u64 cycles) |
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| 20 | +{ |
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| 21 | + return true; |
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| 22 | +} |
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| 23 | +#endif |
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| 24 | + |
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| 25 | +#if defined(CONFIG_GENERIC_CLOCKSOURCE_VDSO) && !defined(BUILD_VDSO32) |
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| 26 | + |
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| 27 | +#include <linux/fcntl.h> |
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| 28 | +#include <linux/io.h> |
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| 29 | +#include <linux/ioctl.h> |
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| 30 | +#include <uapi/linux/clocksource.h> |
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| 31 | + |
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| 32 | +static notrace u64 readl_mmio_up(const struct clksrc_info *vinfo) |
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| 33 | +{ |
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| 34 | + const struct clksrc_user_mmio_info *info = &vinfo->mmio; |
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| 35 | + return readl_relaxed(info->reg_lower); |
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| 36 | +} |
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| 37 | + |
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| 38 | +static notrace u64 readl_mmio_down(const struct clksrc_info *vinfo) |
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| 39 | +{ |
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| 40 | + const struct clksrc_user_mmio_info *info = &vinfo->mmio; |
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| 41 | + return ~(u64)readl_relaxed(info->reg_lower) & info->mask_lower; |
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| 42 | +} |
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| 43 | + |
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| 44 | +static notrace u64 readw_mmio_up(const struct clksrc_info *vinfo) |
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| 45 | +{ |
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| 46 | + const struct clksrc_user_mmio_info *info = &vinfo->mmio; |
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| 47 | + return readw_relaxed(info->reg_lower); |
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| 48 | +} |
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| 49 | + |
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| 50 | +static notrace u64 readw_mmio_down(const struct clksrc_info *vinfo) |
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| 51 | +{ |
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| 52 | + const struct clksrc_user_mmio_info *info = &vinfo->mmio; |
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| 53 | + return ~(u64)readl_relaxed(info->reg_lower) & info->mask_lower; |
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| 54 | +} |
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| 55 | + |
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| 56 | +static notrace u64 readl_dmmio_up(const struct clksrc_info *vinfo) |
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| 57 | +{ |
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| 58 | + const struct clksrc_user_mmio_info *info = &vinfo->mmio; |
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| 59 | + void __iomem *reg_lower, *reg_upper; |
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| 60 | + u32 upper, old_upper, lower; |
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| 61 | + |
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| 62 | + reg_lower = info->reg_lower; |
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| 63 | + reg_upper = info->reg_upper; |
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| 64 | + |
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| 65 | + upper = readl_relaxed(reg_upper); |
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| 66 | + do { |
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| 67 | + old_upper = upper; |
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| 68 | + lower = readl_relaxed(reg_lower); |
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| 69 | + upper = readl_relaxed(reg_upper); |
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| 70 | + } while (upper != old_upper); |
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| 71 | + |
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| 72 | + return (((u64)upper) << info->bits_lower) | lower; |
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| 73 | +} |
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| 74 | + |
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| 75 | +static notrace u64 readw_dmmio_up(const struct clksrc_info *vinfo) |
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| 76 | +{ |
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| 77 | + const struct clksrc_user_mmio_info *info = &vinfo->mmio; |
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| 78 | + void __iomem *reg_lower, *reg_upper; |
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| 79 | + u16 upper, old_upper, lower; |
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| 80 | + |
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| 81 | + reg_lower = info->reg_lower; |
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| 82 | + reg_upper = info->reg_upper; |
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| 83 | + |
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| 84 | + upper = readw_relaxed(reg_upper); |
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| 85 | + do { |
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| 86 | + old_upper = upper; |
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| 87 | + lower = readw_relaxed(reg_lower); |
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| 88 | + upper = readw_relaxed(reg_upper); |
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| 89 | + } while (upper != old_upper); |
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| 90 | + |
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| 91 | + return (((u64)upper) << info->bits_lower) | lower; |
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| 92 | +} |
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| 93 | + |
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| 94 | +static notrace __cold vdso_read_cycles_t *get_mmio_read_cycles(unsigned int type) |
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| 95 | +{ |
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| 96 | + switch (type) { |
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| 97 | + case CLKSRC_MMIO_L_UP: |
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| 98 | + return &readl_mmio_up; |
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| 99 | + case CLKSRC_MMIO_L_DOWN: |
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| 100 | + return &readl_mmio_down; |
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| 101 | + case CLKSRC_MMIO_W_UP: |
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| 102 | + return &readw_mmio_up; |
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| 103 | + case CLKSRC_MMIO_W_DOWN: |
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| 104 | + return &readw_mmio_down; |
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| 105 | + case CLKSRC_DMMIO_L_UP: |
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| 106 | + return &readl_dmmio_up; |
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| 107 | + case CLKSRC_DMMIO_W_UP: |
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| 108 | + return &readw_dmmio_up; |
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| 109 | + default: |
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| 110 | + return NULL; |
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| 111 | + } |
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| 112 | +} |
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| 113 | + |
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| 114 | +static __always_inline u16 to_cs_type(u32 cs_type_seq) |
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| 115 | +{ |
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| 116 | + return cs_type_seq >> 16; |
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| 117 | +} |
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| 118 | + |
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| 119 | +static __always_inline u16 to_seq(u32 cs_type_seq) |
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| 120 | +{ |
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| 121 | + return cs_type_seq; |
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| 122 | +} |
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| 123 | + |
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| 124 | +static __always_inline u32 to_cs_type_seq(u16 type, u16 seq) |
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| 125 | +{ |
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| 126 | + return (u32)type << 16U | seq; |
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| 127 | +} |
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| 128 | + |
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| 129 | +static notrace noinline __cold |
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| 130 | +void map_clocksource(const struct vdso_data *vd, struct vdso_priv *vp, |
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| 131 | + u32 seq, u32 new_cs_type_seq) |
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| 132 | +{ |
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| 133 | + vdso_read_cycles_t *read_cycles = NULL; |
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| 134 | + u32 new_cs_seq, new_cs_type; |
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| 135 | + struct clksrc_info *info; |
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| 136 | + int fd, ret; |
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| 137 | + |
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| 138 | + new_cs_seq = to_seq(new_cs_type_seq); |
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| 139 | + new_cs_type = to_cs_type(new_cs_type_seq); |
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| 140 | + info = &vp->clksrc_info[new_cs_type]; |
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| 141 | + |
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| 142 | + if (new_cs_type < CLOCKSOURCE_VDSO_MMIO) |
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| 143 | + goto done; |
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| 144 | + |
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| 145 | + fd = clock_open_device(vd->cs_mmdev, O_RDONLY); |
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| 146 | + if (fd < 0) |
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| 147 | + goto fallback_to_syscall; |
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| 148 | + |
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| 149 | + if (vdso_read_retry(vd, seq)) { |
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| 150 | + vdso_read_begin(vd); |
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| 151 | + if (to_seq(vd->cs_type_seq) != new_cs_seq) { |
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| 152 | + /* |
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| 153 | + * cs_mmdev no longer corresponds to |
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| 154 | + * vd->cs_type_seq. |
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| 155 | + */ |
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| 156 | + clock_close_device(fd); |
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| 157 | + return; |
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| 158 | + } |
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| 159 | + } |
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| 160 | + |
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| 161 | + ret = clock_ioctl_device(fd, CLKSRC_USER_MMIO_MAP, (long)&info->mmio); |
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| 162 | + clock_close_device(fd); |
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| 163 | + if (ret < 0) |
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| 164 | + goto fallback_to_syscall; |
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| 165 | + |
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| 166 | + read_cycles = get_mmio_read_cycles(info->mmio.type); |
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| 167 | + if (read_cycles == NULL) /* Mmhf, misconfigured. */ |
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| 168 | + goto fallback_to_syscall; |
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| 169 | +done: |
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| 170 | + info->read_cycles = read_cycles; |
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| 171 | + smp_wmb(); |
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| 172 | + new_cs_type_seq = to_cs_type_seq(new_cs_type, new_cs_seq); |
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| 173 | + WRITE_ONCE(vp->current_cs_type_seq, new_cs_type_seq); |
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| 174 | + |
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| 175 | + return; |
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| 176 | + |
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| 177 | +fallback_to_syscall: |
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| 178 | + new_cs_type = CLOCKSOURCE_VDSO_NONE; |
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| 179 | + info = &vp->clksrc_info[new_cs_type]; |
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| 180 | + goto done; |
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| 181 | +} |
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| 182 | + |
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| 183 | +static inline notrace |
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| 184 | +bool get_hw_counter(const struct vdso_data *vd, u32 *r_seq, u64 *cycles) |
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| 185 | +{ |
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| 186 | + const struct clksrc_info *info; |
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| 187 | + struct vdso_priv *vp; |
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| 188 | + u32 seq, cs_type_seq; |
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| 189 | + unsigned int cs; |
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| 190 | + |
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| 191 | + vp = __arch_get_vdso_priv(); |
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| 192 | + |
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| 193 | + for (;;) { |
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| 194 | + seq = vdso_read_begin(vd); |
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| 195 | + cs_type_seq = READ_ONCE(vp->current_cs_type_seq); |
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| 196 | + if (likely(to_seq(cs_type_seq) == to_seq(vd->cs_type_seq))) |
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| 197 | + break; |
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| 198 | + |
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| 199 | + map_clocksource(vd, vp, seq, vd->cs_type_seq); |
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| 200 | + } |
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| 201 | + |
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| 202 | + switch (to_cs_type(cs_type_seq)) { |
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| 203 | + case CLOCKSOURCE_VDSO_NONE: |
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| 204 | + return false; /* Use fallback. */ |
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| 205 | + case CLOCKSOURCE_VDSO_ARCHITECTED: |
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| 206 | + if (unlikely(!vdso_clocksource_ok(vd))) |
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| 207 | + return false; |
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| 208 | + *cycles = __arch_get_hw_counter(vd->clock_mode, vd); |
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| 209 | + if (unlikely(!vdso_cycles_ok(*cycles))) |
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| 210 | + return false; |
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| 211 | + break; |
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| 212 | + default: |
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| 213 | + cs = to_cs_type(READ_ONCE(cs_type_seq)); |
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| 214 | + info = &vp->clksrc_info[cs]; |
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| 215 | + *cycles = info->read_cycles(info); |
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| 216 | + break; |
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| 217 | + } |
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| 218 | + |
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| 219 | + *r_seq = seq; |
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| 220 | + |
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| 221 | + return true; |
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| 222 | +} |
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| 223 | + |
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| 224 | +#else |
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| 225 | + |
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| 226 | +static inline notrace |
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| 227 | +bool get_hw_counter(const struct vdso_data *vd, u32 *r_seq, u64 *cycles) |
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| 228 | +{ |
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| 229 | + *r_seq = vdso_read_begin(vd); |
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| 230 | + |
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| 231 | + /* |
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| 232 | + * CAUTION: checking the clocksource mode must happen inside |
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| 233 | + * the seqlocked section. |
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| 234 | + */ |
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| 235 | + if (unlikely(!vdso_clocksource_ok(vd))) |
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| 236 | + return false; |
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| 237 | + |
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| 238 | + *cycles = __arch_get_hw_counter(vd->clock_mode, vd); |
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| 239 | + if (unlikely(!vdso_cycles_ok(*cycles))) |
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| 240 | + return false; |
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| 241 | + |
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| 242 | + return true; |
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| 243 | +} |
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| 244 | + |
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| 245 | +#endif /* CONFIG_GENERIC_CLOCKSOURCE_VDSO */ |
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| 246 | + |
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8 | 247 | #ifndef vdso_calc_delta |
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9 | 248 | /* |
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10 | 249 | * Default implementation which works for all sane clocksources. That |
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.. | .. |
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31 | 270 | } |
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32 | 271 | #endif |
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33 | 272 | |
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34 | | -#ifndef vdso_clocksource_ok |
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35 | | -static inline bool vdso_clocksource_ok(const struct vdso_data *vd) |
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36 | | -{ |
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37 | | - return vd->clock_mode != VDSO_CLOCKMODE_NONE; |
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38 | | -} |
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39 | | -#endif |
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40 | | - |
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41 | | -#ifndef vdso_cycles_ok |
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42 | | -static inline bool vdso_cycles_ok(u64 cycles) |
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43 | | -{ |
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44 | | - return true; |
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45 | | -} |
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46 | | -#endif |
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47 | | - |
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48 | 273 | #ifdef CONFIG_TIME_NS |
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49 | 274 | static __always_inline int do_hres_timens(const struct vdso_data *vdns, clockid_t clk, |
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50 | 275 | struct __kernel_timespec *ts) |
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.. | .. |
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63 | 288 | vdso_ts = &vd->basetime[clk]; |
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64 | 289 | |
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65 | 290 | do { |
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66 | | - seq = vdso_read_begin(vd); |
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67 | | - |
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68 | | - if (unlikely(!vdso_clocksource_ok(vd))) |
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69 | | - return -1; |
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70 | | - |
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71 | | - cycles = __arch_get_hw_counter(vd->clock_mode, vd); |
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72 | | - if (unlikely(!vdso_cycles_ok(cycles))) |
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| 291 | + if (!get_hw_counter(vd, &seq, &cycles)) |
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73 | 292 | return -1; |
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74 | 293 | ns = vdso_ts->nsec; |
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75 | 294 | last = vd->cycle_last; |
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.. | .. |
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117 | 336 | |
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118 | 337 | do { |
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119 | 338 | /* |
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120 | | - * Open coded to handle VDSO_CLOCKMODE_TIMENS. Time namespace |
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121 | | - * enabled tasks have a special VVAR page installed which |
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122 | | - * has vd->seq set to 1 and vd->clock_mode set to |
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123 | | - * VDSO_CLOCKMODE_TIMENS. For non time namespace affected tasks |
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124 | | - * this does not affect performance because if vd->seq is |
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125 | | - * odd, i.e. a concurrent update is in progress the extra |
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| 339 | + * Open coded to handle VDSO_CLOCKMODE_TIMENS. Time |
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| 340 | + * namespace enabled tasks have a special VVAR page |
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| 341 | + * installed which has vd->seq set to 1 and |
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| 342 | + * vd->clock_mode set to VDSO_CLOCKMODE_TIMENS. For |
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| 343 | + * non time namespace affected tasks this does not |
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| 344 | + * affect performance because if vd->seq is odd, |
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| 345 | + * i.e. a concurrent update is in progress the extra |
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126 | 346 | * check for vd->clock_mode is just a few extra |
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127 | | - * instructions while spin waiting for vd->seq to become |
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128 | | - * even again. |
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| 347 | + * instructions while spin waiting for vd->seq to |
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| 348 | + * become even again. |
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129 | 349 | */ |
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130 | 350 | while (unlikely((seq = READ_ONCE(vd->seq)) & 1)) { |
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131 | 351 | if (IS_ENABLED(CONFIG_TIME_NS) && |
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132 | | - vd->clock_mode == VDSO_CLOCKMODE_TIMENS) |
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| 352 | + vd->clock_mode == VDSO_CLOCKMODE_TIMENS) |
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133 | 353 | return do_hres_timens(vd, clk, ts); |
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134 | 354 | cpu_relax(); |
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135 | 355 | } |
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| 356 | + |
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136 | 357 | smp_rmb(); |
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137 | 358 | |
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138 | | - if (unlikely(!vdso_clocksource_ok(vd))) |
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| 359 | + if (!get_hw_counter(vd, &seq, &cycles)) |
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139 | 360 | return -1; |
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140 | 361 | |
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141 | | - cycles = __arch_get_hw_counter(vd->clock_mode, vd); |
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142 | | - if (unlikely(!vdso_cycles_ok(cycles))) |
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143 | | - return -1; |
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144 | 362 | ns = vdso_ts->nsec; |
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145 | 363 | last = vd->cycle_last; |
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146 | 364 | ns += vdso_calc_delta(cycles, last, vd->mask, vd->mult); |
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