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2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404

 kernel/arch/x86/mm/tlb.c
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@@ -5,6 +5,7 @@
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 #include <linux/spinlock.h>
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 #include <linux/smp.h>
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 #include <linux/interrupt.h>
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+#include <linux/irq_pipeline.h>
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 #include <linux/export.h>
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 #include <linux/cpu.h>
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 #include <linux/debugfs.h>
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@@ -309,10 +310,12 @@
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 void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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 	       struct task_struct *tsk)
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 {
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-	unsigned long flags;
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+	unsigned long flags, _flags;
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 	local_irq_save(flags);
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+	protect_inband_mm(_flags);
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 	switch_mm_irqs_off(prev, next, tsk);
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+	unprotect_inband_mm(_flags);
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 	local_irq_restore(flags);
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 }
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@@ -440,7 +443,9 @@
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 	 */
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 	/* We don't want flush_tlb_func_* to run concurrently with us. */
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-	if (IS_ENABLED(CONFIG_PROVE_LOCKING))
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+	if (IS_ENABLED(CONFIG_DOVETAIL))
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+		WARN_ON_ONCE(!hard_irqs_disabled());
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+	else if (IS_ENABLED(CONFIG_PROVE_LOCKING))
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 		WARN_ON_ONCE(!irqs_disabled());
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 	/*
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@@ -666,15 +671,24 @@
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 	 *                   wants us to catch up to.
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 	 */
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 	struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
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-	u32 loaded_mm_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
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-	u64 mm_tlb_gen = atomic64_read(&loaded_mm->context.tlb_gen);
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-	u64 local_tlb_gen = this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].tlb_gen);
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+	u32 loaded_mm_asid;
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+	u64 mm_tlb_gen;
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+	u64 local_tlb_gen;
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+	unsigned long flags;
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 	/* This code cannot presently handle being reentered. */
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 	VM_WARN_ON(!irqs_disabled());
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-	if (unlikely(loaded_mm == &init_mm))
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+	protect_inband_mm(flags);
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+
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+	loaded_mm_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
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+	mm_tlb_gen = atomic64_read(&loaded_mm->context.tlb_gen);
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+	local_tlb_gen = this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].tlb_gen);
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+
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+	if (unlikely(loaded_mm == &init_mm)) {
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+		unprotect_inband_mm(flags);
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 		return;
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+	}
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 	VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].ctx_id) !=
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 		   loaded_mm->context.ctx_id);
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@@ -690,6 +704,7 @@
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 		 * IPIs to lazy TLB mode CPUs.
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 		 */
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 		switch_mm_irqs_off(NULL, &init_mm, NULL);
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+		unprotect_inband_mm(flags);
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 		return;
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 	}
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@@ -700,12 +715,15 @@
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 		 * be handled can catch us all the way up, leaving no work for
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 		 * the second flush.
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 		 */
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+		unprotect_inband_mm(flags);
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 		trace_tlb_flush(reason, 0);
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 		return;
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 	}
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 	WARN_ON_ONCE(local_tlb_gen > mm_tlb_gen);
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 	WARN_ON_ONCE(f->new_tlb_gen > mm_tlb_gen);
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+
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+	unprotect_inband_mm(flags);
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 	/*
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 	 * If we get to this point, we know that our TLB is out of date.
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@@ -1063,7 +1081,7 @@
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 	 * from interrupts. (Use the raw variant because this code can
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 	 * be called from deep inside debugging code.)
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 	 */
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-	raw_local_irq_save(flags);
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+	flags = hard_local_irq_save();
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 	cr4 = this_cpu_read(cpu_tlbstate.cr4);
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 	/* toggle PGE */
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@@ -1071,7 +1089,7 @@
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 	/* write old PGE again and flush TLBs */
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 	native_write_cr4(cr4);
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-	raw_local_irq_restore(flags);
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+	hard_local_irq_restore(flags);
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 }
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 /*
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@@ -1079,6 +1097,8 @@
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  */
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 STATIC_NOPV void native_flush_tlb_local(void)
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 {
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+	unsigned long flags;
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+
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 	/*
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 	 * Preemption or interrupts must be disabled to protect the access
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 	 * to the per CPU variable and to prevent being preempted between
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@@ -1086,10 +1106,14 @@
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 	 */
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 	WARN_ON_ONCE(preemptible());
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+	flags = hard_cond_local_irq_save();
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+
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 	invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
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 	/* If current->mm == NULL then the read_cr3() "borrows" an mm */
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 	native_write_cr3(__native_read_cr3());
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+
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+	hard_cond_local_irq_restore(flags);
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 }
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 void flush_tlb_local(void)
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@@ -1165,6 +1189,16 @@
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 	VM_WARN_ON_ONCE(!loaded_mm);
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 	/*
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+	 * There would be no way for the companion core to switch an
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+	 * out-of-band task back in-band in order to handle an access
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+	 * fault over NMI safely. Tell the caller that uaccess from
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+	 * NMI is NOT ok if the preempted task was running
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+	 * out-of-band.
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+	 */
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+	if (running_oob())
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+		return false;
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+
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+	/*
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 	 * The condition we want to check is
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 	 * current_mm->pgd == __va(read_cr3_pa()).  This may be slow, though,
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 	 * if we're running in a VM with shadow paging, and nmi_uaccess_okay()