| .. | .. |
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| 131 | 131 | { |
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| 132 | 132 | unsigned long long ns_now; |
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| 133 | 133 | struct cyc2ns_data data; |
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| 134 | + unsigned long flags; |
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| 134 | 135 | struct cyc2ns *c2n; |
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| 136 | + |
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| 137 | + flags = hard_cond_local_irq_save(); |
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| 135 | 138 | |
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| 136 | 139 | ns_now = cycles_2_ns(tsc_now); |
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| 137 | 140 | |
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| .. | .. |
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| 163 | 166 | c2n->data[0] = data; |
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| 164 | 167 | raw_write_seqcount_latch(&c2n->seq); |
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| 165 | 168 | c2n->data[1] = data; |
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| 169 | + |
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| 170 | + hard_cond_local_irq_restore(flags); |
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| 166 | 171 | } |
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| 167 | 172 | |
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| 168 | 173 | static void set_cyc2ns_scale(unsigned long khz, int cpu, unsigned long long tsc_now) |
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| .. | .. |
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| 759 | 764 | * calibration, which will take at least 50ms, and |
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| 760 | 765 | * read the end value. |
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| 761 | 766 | */ |
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| 762 | | - local_irq_save(flags); |
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| 767 | + flags = hard_local_irq_save(); |
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| 763 | 768 | tsc1 = tsc_read_refs(&ref1, hpet); |
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| 764 | 769 | tsc_pit_khz = pit_calibrate_tsc(latch, ms, loopmin); |
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| 765 | 770 | tsc2 = tsc_read_refs(&ref2, hpet); |
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| 766 | | - local_irq_restore(flags); |
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| 771 | + hard_local_irq_restore(flags); |
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| 767 | 772 | |
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| 768 | 773 | /* Pick the lowest PIT TSC calibration so far */ |
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| 769 | 774 | tsc_pit_min = min(tsc_pit_min, tsc_pit_khz); |
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| .. | .. |
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| 872 | 877 | if (!fast_calibrate) |
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| 873 | 878 | fast_calibrate = cpu_khz_from_msr(); |
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| 874 | 879 | if (!fast_calibrate) { |
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| 875 | | - local_irq_save(flags); |
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| 880 | + flags = hard_local_irq_save(); |
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| 876 | 881 | fast_calibrate = quick_pit_calibrate(); |
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| 877 | | - local_irq_restore(flags); |
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| 882 | + hard_local_irq_restore(flags); |
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| 878 | 883 | } |
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| 879 | 884 | return fast_calibrate; |
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| 880 | 885 | } |
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| .. | .. |
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| 942 | 947 | if (!sched_clock_stable()) |
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| 943 | 948 | return; |
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| 944 | 949 | |
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| 945 | | - local_irq_save(flags); |
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| 950 | + flags = hard_local_irq_save(); |
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| 946 | 951 | |
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| 947 | 952 | /* |
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| 948 | 953 | * We're coming out of suspend, there's no concurrency yet; don't |
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| .. | .. |
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| 960 | 965 | per_cpu(cyc2ns.data[1].cyc2ns_offset, cpu) = offset; |
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| 961 | 966 | } |
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| 962 | 967 | |
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| 963 | | - local_irq_restore(flags); |
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| 968 | + hard_local_irq_restore(flags); |
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| 964 | 969 | } |
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| 965 | 970 | |
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| 966 | 971 | #ifdef CONFIG_CPU_FREQ |
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| .. | .. |
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| 1411 | 1416 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC_S3)) |
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| 1412 | 1417 | clocksource_tsc.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP; |
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| 1413 | 1418 | |
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| 1419 | + clocksource_tsc.vdso_type = CLOCKSOURCE_VDSO_ARCHITECTED; |
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| 1420 | + |
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| 1414 | 1421 | /* |
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| 1415 | 1422 | * When TSC frequency is known (retrieved via MSR or CPUID), we skip |
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| 1416 | 1423 | * the refined calibration and directly register it as a clocksource. |
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