.. | .. |
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41 | 41 | * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in |
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42 | 42 | * a random state. |
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43 | 43 | */ |
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44 | | -static inline void fpregs_lock(void) |
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| 44 | +static inline unsigned long fpregs_lock(void) |
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45 | 45 | { |
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46 | | - preempt_disable(); |
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47 | | - local_bh_disable(); |
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| 46 | + if (IS_ENABLED(CONFIG_IRQ_PIPELINE)) { |
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| 47 | + return hard_preempt_disable(); |
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| 48 | + } else { |
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| 49 | + preempt_disable(); |
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| 50 | + local_bh_disable(); |
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| 51 | + return 0; |
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| 52 | + } |
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48 | 53 | } |
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49 | 54 | |
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50 | | -static inline void fpregs_unlock(void) |
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| 55 | +static inline void fpregs_unlock(unsigned long flags) |
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51 | 56 | { |
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52 | | - local_bh_enable(); |
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53 | | - preempt_enable(); |
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| 57 | + if (IS_ENABLED(CONFIG_IRQ_PIPELINE)) { |
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| 58 | + hard_preempt_enable(flags); |
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| 59 | + } else { |
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| 60 | + local_bh_enable(); |
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| 61 | + preempt_enable(); |
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| 62 | + } |
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54 | 63 | } |
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55 | 64 | |
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56 | 65 | #ifdef CONFIG_X86_DEBUG_FPU |
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.. | .. |
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64 | 73 | */ |
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65 | 74 | extern void switch_fpu_return(void); |
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66 | 75 | |
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| 76 | +/* For Dovetail context switching. */ |
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| 77 | +void fpu__suspend_inband(void); |
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| 78 | +void fpu__resume_inband(void); |
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| 79 | + |
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67 | 80 | /* |
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68 | 81 | * Query the presence of one or more xfeatures. Works on any legacy CPU as well. |
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69 | 82 | * |
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