hc
2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404
kernel/arch/arm64/mm/context.c
....@@ -18,7 +18,7 @@
1818 #include <asm/tlbflush.h>
1919
2020 static u32 asid_bits;
21
-static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
21
+static DEFINE_HARD_SPINLOCK(cpu_asid_lock);
2222
2323 static atomic64_t asid_generation;
2424 static unsigned long *asid_map;
....@@ -217,6 +217,9 @@
217217 unsigned long flags;
218218 unsigned int cpu;
219219 u64 asid, old_active_asid;
220
+ bool need_flush;
221
+
222
+ WARN_ON_ONCE(dovetail_debug() && !hard_irqs_disabled());
220223
221224 if (system_supports_cnp())
222225 cpu_set_reserved_ttbr0();
....@@ -252,12 +255,14 @@
252255 }
253256
254257 cpu = smp_processor_id();
255
- if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending))
256
- local_flush_tlb_all();
258
+ need_flush = cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending);
257259
258260 atomic64_set(this_cpu_ptr(&active_asids), asid);
259261 raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
260262
263
+ if (need_flush)
264
+ local_flush_tlb_all();
265
+
261266 switch_mm_fastpath:
262267
263268 arm64_apply_bp_hardening();