.. | .. |
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18 | 18 | #include <asm/tlbflush.h> |
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19 | 19 | |
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20 | 20 | static u32 asid_bits; |
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21 | | -static DEFINE_RAW_SPINLOCK(cpu_asid_lock); |
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| 21 | +static DEFINE_HARD_SPINLOCK(cpu_asid_lock); |
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22 | 22 | |
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23 | 23 | static atomic64_t asid_generation; |
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24 | 24 | static unsigned long *asid_map; |
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.. | .. |
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217 | 217 | unsigned long flags; |
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218 | 218 | unsigned int cpu; |
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219 | 219 | u64 asid, old_active_asid; |
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| 220 | + bool need_flush; |
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| 221 | + |
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| 222 | + WARN_ON_ONCE(dovetail_debug() && !hard_irqs_disabled()); |
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220 | 223 | |
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221 | 224 | if (system_supports_cnp()) |
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222 | 225 | cpu_set_reserved_ttbr0(); |
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.. | .. |
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252 | 255 | } |
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253 | 256 | |
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254 | 257 | cpu = smp_processor_id(); |
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255 | | - if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) |
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256 | | - local_flush_tlb_all(); |
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| 258 | + need_flush = cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending); |
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257 | 259 | |
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258 | 260 | atomic64_set(this_cpu_ptr(&active_asids), asid); |
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259 | 261 | raw_spin_unlock_irqrestore(&cpu_asid_lock, flags); |
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260 | 262 | |
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| 263 | + if (need_flush) |
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| 264 | + local_flush_tlb_all(); |
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| 265 | + |
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261 | 266 | switch_mm_fastpath: |
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262 | 267 | |
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263 | 268 | arm64_apply_bp_hardening(); |
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