hc
2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404
kernel/arch/arm64/kernel/process.c
....@@ -125,6 +125,7 @@
125125 * tricks
126126 */
127127 cpu_do_idle();
128
+ hard_cond_local_irq_enable();
128129 raw_local_irq_enable();
129130 }
130131
....@@ -824,8 +825,41 @@
824825 core_initcall(tagged_addr_init);
825826 #endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */
826827
828
+#ifdef CONFIG_IRQ_PIPELINE
829
+
830
+/*
831
+ * When pipelining interrupts, we have to reconcile the hardware and
832
+ * the virtual states. Hard irqs are off on entry while the current
833
+ * stage has to be unstalled: fix this up by stalling the in-band
834
+ * stage on entry, unstalling on exit.
835
+ */
836
+static inline void arm64_preempt_irq_enter(void)
837
+{
838
+ WARN_ON_ONCE(irq_pipeline_debug() && test_inband_stall());
839
+ stall_inband();
840
+ trace_hardirqs_off();
841
+}
842
+
843
+static inline void arm64_preempt_irq_exit(void)
844
+{
845
+ trace_hardirqs_on();
846
+ unstall_inband();
847
+}
848
+
849
+#else
850
+
851
+static inline void arm64_preempt_irq_enter(void)
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+{ }
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+
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+static inline void arm64_preempt_irq_exit(void)
855
+{ }
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+
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+#endif
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+
827859 asmlinkage void __sched arm64_preempt_schedule_irq(void)
828860 {
861
+ arm64_preempt_irq_enter();
862
+
829863 lockdep_assert_irqs_disabled();
830864
831865 /*
....@@ -838,6 +872,8 @@
838872 */
839873 if (system_capabilities_finalized())
840874 preempt_schedule_irq();
875
+
876
+ arm64_preempt_irq_exit();
841877 }
842878
843879 #ifdef CONFIG_BINFMT_ELF