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2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404

 kernel/arch/arm64/include/asm/irqflags.h
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@@ -10,6 +10,10 @@
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 #include <asm/ptrace.h>
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 #include <asm/sysreg.h>
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+#define IRQMASK_I_BIT	PSR_I_BIT
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+#define IRQMASK_I_POS	7
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+#define IRQMASK_i_POS	31
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+
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 /*
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  * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
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  * FIQ exceptions, in the 'daif' register. We mask and unmask them in 'dai'
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@@ -26,7 +30,7 @@
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 /*
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  * CPU interrupt mask handling.
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  */
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-static inline void arch_local_irq_enable(void)
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+static inline void native_irq_enable(void)
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 {
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 	if (system_has_prio_mask_debugging()) {
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 		u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
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@@ -35,7 +39,7 @@
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 	}
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 	asm volatile(ALTERNATIVE(
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-		"msr	daifclr, #2		// arch_local_irq_enable",
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+		"msr	daifclr, #2		// native_irq_enable",
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 		__msr_s(SYS_ICC_PMR_EL1, "%0"),
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 		ARM64_HAS_IRQ_PRIO_MASKING)
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 		:
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@@ -45,7 +49,7 @@
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 	pmr_sync();
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 }
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-static inline void arch_local_irq_disable(void)
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+static inline void native_irq_disable(void)
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 {
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 	if (system_has_prio_mask_debugging()) {
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 		u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
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@@ -54,7 +58,7 @@
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 	}
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 	asm volatile(ALTERNATIVE(
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-		"msr	daifset, #2		// arch_local_irq_disable",
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+		"msr	daifset, #2		// native_irq_disable",
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 		__msr_s(SYS_ICC_PMR_EL1, "%0"),
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 		ARM64_HAS_IRQ_PRIO_MASKING)
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 		:
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@@ -62,10 +66,17 @@
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 		: "memory");
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 }
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68
 
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+static inline void native_irq_sync(void)
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+{
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+	native_irq_enable();
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+	isb();
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+	native_irq_disable();
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+}
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+
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 /*
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  * Save the current interrupt enable state.
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  */
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-static inline unsigned long arch_local_save_flags(void)
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+static inline unsigned long native_save_flags(void)
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 {
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 	unsigned long flags;
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@@ -80,7 +91,7 @@
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 	return flags;
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 }
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-static inline int arch_irqs_disabled_flags(unsigned long flags)
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+static inline int native_irqs_disabled_flags(unsigned long flags)
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 {
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 	int res;
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@@ -95,23 +106,18 @@
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 	return res;
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 }
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-static inline int arch_irqs_disabled(void)
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-{
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-	return arch_irqs_disabled_flags(arch_local_save_flags());
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-}
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-
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-static inline unsigned long arch_local_irq_save(void)
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+static inline unsigned long native_irq_save(void)
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 {
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 	unsigned long flags;
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-	flags = arch_local_save_flags();
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+	flags = native_save_flags();
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 	/*
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 	 * There are too many states with IRQs disabled, just keep the current
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 	 * state if interrupts are already disabled/masked.
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 	 */
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-	if (!arch_irqs_disabled_flags(flags))
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-		arch_local_irq_disable();
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+	if (!native_irqs_disabled_flags(flags))
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+		native_irq_disable();
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 	return flags;
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 }
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@@ -119,7 +125,7 @@
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 /*
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  * restore saved IRQ state
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  */
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-static inline void arch_local_irq_restore(unsigned long flags)
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+static inline void native_irq_restore(unsigned long flags)
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 {
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 	asm volatile(ALTERNATIVE(
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 		"msr	daif, %0",
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@@ -132,4 +138,12 @@
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 	pmr_sync();
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 }
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+static inline bool native_irqs_disabled(void)
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+{
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+	unsigned long flags = native_save_flags();
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+	return native_irqs_disabled_flags(flags);
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+}
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+
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+#include <asm/irq_pipeline.h>
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+
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 #endif /* __ASM_IRQFLAGS_H */