forked from ~ljy/RK3588_XEN

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2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404 
 kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -27,7 +27,7 @@
2727 	};
2828 
2929 	es8316_sound: es8316-sound {
30
-		status = "okay";
30
+		status = "disabled";
3131 		compatible = "rockchip,multicodecs-card";
3232 		rockchip,card-name = "rockchip-es8316";
3333 		rockchip,format = "i2s";
....@@ -128,14 +128,14 @@
128128 		 * - PDN (power down when low)
129129 		 */
130130 		post-power-on-delay-ms = <200>;
131
-		reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;  //WIFI_REG_ON_H
131
+		reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;  //BT_DISABLE_GPIO1_C6_d_1V8
132132 	};
133133 
134134 	rk_headset: rk-headset {
135135 		status = "okay";
136136 		compatible = "rockchip_headset";
137
-		headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
138
-		spk_ctl_gpio  = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
137
+		headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138
+		spk_ctl_gpio  = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
139139 		pinctrl-names = "default";
140140 		pinctrl-0 = <&hp_det>;
141141 		io-channels = <&saradc 3>;
....@@ -159,7 +159,7 @@
159159 		regulator-boot-on;
160160 		enable-active-high;
161161 		//gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
162
-		gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
162
+		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
163163 		vin-supply = <&vcc_1v8_s0>;
164164 	};
165165 
....@@ -217,9 +217,9 @@
217217 */
218218 	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
219219 		compatible = "regulator-fixed";
220
-		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
221
-		pinctrl-names = "default";
222
-		pinctrl-0 = <&sd_s0_pwr>;
220
+		//gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
221
+		//pinctrl-names = "default";
222
+		//pinctrl-0 = <&sd_s0_pwr>;
223223 		regulator-name = "vcc_3v3_sd_s0";
224224 		enable-active-high;
225225 	};
....@@ -230,80 +230,38 @@
230230 		clock-names = "ext_clock";
231231 		uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
232232 		pinctrl-names = "default", "rts_gpio";
233
-		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
233
+		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
234234 		pinctrl-1 = <&uart9_gpios>;
235
-		BT,reset_gpio    = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H
236
-		BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237
-		BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
-		status = "okay";
235
+		BT,reset_gpio    = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236
+		//BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237
+		//BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
+		status = "disabled";
239239 	};
240240 
241241 	wireless_wlan: wireless-wlan {
242242 		compatible = "wlan-platdata";
243243 		wifi_chip_type = "ap6398s";
244
-		pinctrl-names = "default";
245
-		pinctrl-0 = <&wifi_host_wake_irq>;
246
-		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //WIFI_WAKE_HOST_H
244
+	//	pinctrl-names = "default";
245
+	//	pinctrl-0 = <&wifi_host_wake_irq>;
246
+	//	WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
247247 	//	WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
248
-		status = "okay";
248
+		status = "disabled";
249249 	};
250250 	
251251 	ndj_io_init {
252252            	compatible = "nk_io_control";
253253 			pinctrl-names = "default";
254254           	pinctrl-0 = <&ndj_io_gpio>;
255
-						
256
-//			vcc_5v {
257
-//				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
258
-//				gpio_function = <0>;
259
-//			};
260
-			
261
-			vcc_12v {
262
-				gpio_num = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
263
-				gpio_function = <0>;
264
-			};
265
-			
266
-			vcc_3v {
267
-				gpio_num = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
268
-				gpio_function = <0>;
269
-			};
255
+									
256
+
270257 			
271258            	hub_5V_reset {
272
-				gpio_num = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
259
+				gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 
273260 				gpio_function = <3>;
274
-			};
261
+			};//HUB_RESET_GPIO4_B6_d_3V3
275262 			
276
-			4g_power {
277
-				gpio_num = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
278
-				gpio_function = <0>;
279
-			};
280263 			
281
-           	wake_4g {
282
-				gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
283
-				gpio_function = <0>;
284
-			};
285264 			
286
-			air_mode_4g {
287
-				gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
288
-				gpio_function = <0>;
289
-			};			
290
-			
291
-			reset_4g {
292
-				gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
293
-				gpio_function = <3>;
294
-			};	
295
-/*
296
-			spk_ctl {
297
-				gpio_num = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
298
-				gpio_function = <0>;
299
-			};
300
-			
301
-			hp_det
302
-			 {
303
-				gpio_num = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
304
-				gpio_function = <1>;
305
-			};
306
-*/
307265 		};
308266 		
309267 		
....@@ -311,12 +269,11 @@
311269                compatible = "simple-panel";
312270                backlight = <&backlight>;
313271                power-supply = <&vcc3v3_lcd_n>;
314
-			   vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
315
-			   vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;  //MIPIDIS_PWR_EN_1V8
316
-               enable-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN
317
-               reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
318
-               edp-bl-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;  //LCD_BLK-PWR_EN
319
-               edp-bl-en = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_D4_d_3V3
272
+			   vcc-5v-gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;	//VCC5_IO_EN_GPIO4_B5_d_3V3		   
273
+               enable-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN_GPIO3_C6_u_3V3
274
+               reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
275
+               edp-bl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;  //LCD_BKL_PWM3_3V3
276
+               edp-bl-en = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_A6_d_3V3
320277                bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
321278                bpc = <8>;
322279                prepare-delay-ms = <200>;
....@@ -383,8 +340,13 @@
383340 };
384341 
385342 &backlight {
386
-	pwms = <&pwm10 0 25000 0>;
343
+	pwms = <&pwm3 0 25000 0>;
387344 	status = "okay";
345
+};
346
+
347
+&backlight1 {
348
+	pwms = <&pwm11 0 25000 0>;
349
+	status = "disabled";
388350 };
389351 
390352 &combphy0_ps {
....@@ -432,6 +394,10 @@
432394  * mipi_dcphy0 needs to be enabled
433395  * when dsi0 is enabled
434396  */
397
+&mipi_dcphy0 {
398
+	status = "disabled";
399
+}; 
400
+ 
435401 &dsi0 {
436402 	status = "disabled";
437403 };
....@@ -442,13 +408,6 @@
442408 
443409 &dsi0_in_vp3 {
444410 	status = "disabled";
445
-};
446
-
447
-&dsi0_panel {
448
-	power-supply = <&vcc3v3_lcd_n>;
449
-	reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
450
-	pinctrl-names = "default";
451
-	pinctrl-0 = <&lcd_rst_gpio>;
452411 };
453412 
454413 /*
....@@ -481,6 +440,31 @@
481440 	//pinctrl-0 = <&lcd_rst_gpio>;
482441 };
483442 
443
+&gmac0 {
444
+	/* Use rgmii-rxid mode to disable rx delay inside Soc */
445
+	phy-mode = "rgmii-rxid";
446
+	clock_in_out = "output";
447
+
448
+	snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
449
+	snps,reset-active-low;
450
+	/* Reset time is 20ms, 100ms for rtl8211f */
451
+	snps,reset-delays-us = <0 20000 100000>;
452
+
453
+	pinctrl-names = "default";
454
+	pinctrl-0 = <&gmac0_miim
455
+                     &gmac0_tx_bus2
456
+                     &gmac0_rx_bus2
457
+                     &gmac0_rgmii_clk
458
+                     &gmac0_rgmii_bus
459
+                     &eth0_pins
460
+		     &gmac0_clkinout>;
461
+	tx_delay = <0x44>;
462
+	/* rx_delay = <0x4f>; */
463
+
464
+	phy-handle = <&rgmii_phy0>;
465
+	status = "okay";
466
+};
467
+
484468 &gmac1 {
485469 	/* Use rgmii-rxid mode to disable rx delay inside Soc */
486470 	phy-mode = "rgmii-rxid";
....@@ -501,8 +485,8 @@
501485 	tx_delay = <0x43>;
502486 	/* rx_delay = <0x3f>; */
503487 
504
-	phy-handle = <&rgmii_phy>;
505
-	status = "disabled";
488
+	phy-handle = <&rgmii_phy1>;
489
+	status = "okay";
506490 };
507491 
508492 &hdmi0 {
....@@ -538,7 +522,7 @@
538522 	#sound-dai-cells = <1>;
539523 	/* Effective level used to trigger HPD: 0-low, 1-high */
540524 	hpd-trigger-level = <1>;
541
-	hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
525
+	hdmirx-det-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
542526 	pinctrl-names = "default";
543527 	pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
544528 };
....@@ -709,6 +693,12 @@
709693                 compatible = "atmel,24c256";
710694                 reg = <0x50>;
711695     };
696
+		
697
+	eeprom@53 {
698
+                //compatible = "atmel,24c02";
699
+                compatible = "atmel,24c256";
700
+                reg = <0x53>;
701
+    };
712702 #if 0
713703 	usbc0: fusb302@22 {
714704                 compatible = "fcs,fusb302";
....@@ -827,15 +817,19 @@
827817 };
828818 
829819 &mdio1 {
830
-	rgmii_phy: phy@1 {
820
+	rgmii_phy1: phy@1 {
831821 		compatible = "ethernet-phy-ieee802.3-c22";
832822 		reg = <0x1>;
833823 	};
834824 };
835825 
836
-&mipi_dcphy0 {
837
-	status = "okay";
826
+&mdio0 {
827
+	rgmii_phy0: phy@1 {
828
+		compatible = "ethernet-phy-ieee802.3-c22";
829
+		reg = <0x1>;
830
+	};
838831 };
832
+
839833 
840834 &mipi_dcphy1 {
841835 	status = "disabled";
....@@ -843,21 +837,21 @@
843837 
844838 &pcie2x1l2 {
845839 	phys = <&combphy0_ps PHY_TYPE_PCIE>;
846
-	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
840
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
847841 	vpcie3v3-supply = <&vcc3v3_pcie30>;
848842 	status = "okay";
849843 };//MINIPCIE
850844 
851845 &pcie2x1l1 {
852846 	phys = <&combphy2_psu PHY_TYPE_PCIE>;
853
-	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
847
+	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
854848 	vpcie3v3-supply = <&vcc3v3_pcie30>;
855849 	status = "okay";
856850 };//M.2 WIFI6
857851 
858852 &pcie2x1l0 {
859853 	phys = <&combphy1_ps PHY_TYPE_PCIE>;
860
-	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
854
+	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;  //PCIEx1_0_PERSTn_M1_L
861855 	vpcie3v3-supply = <&vcc3v3_pcie30>;
862856 	status = "okay";
863857 };//RTL8111H
....@@ -902,17 +896,17 @@
902896 
903897 	hdmi {
904898 		hdmirx_det: hdmirx-det {
905
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
899
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
906900 		};
907901 	};
908902 
909903 	headphone {
910904 		hp_det: hp-det {
911
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
905
+			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
912906 		};
913907 		
914908 		spk_con: spk-con {
915
-			rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
909
+			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
916910 		};
917911 	};
918912 
....@@ -924,7 +918,7 @@
924918 
925919 	lcd {
926920 		lcd_rst_gpio: lcd-rst-gpio {
927
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
921
+			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
928922 		};
929923 	};
930924 
....@@ -936,16 +930,16 @@
936930 
937931 	sdio-pwrseq {
938932 		wifi_enable_h: wifi-enable-h {
939
-			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
933
+			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
940934 		};
941935 	};
942
-
936
+/*
943937 	sdmmc {
944938 		sd_s0_pwr: sd-s0-pwr {
945939 			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
946940 		};
947941 	};
948
-
942
+*/
949943 	touch {
950944 		touch_gpio: touch-gpio {
951945 			rockchip,pins =
....@@ -967,55 +961,32 @@
967961 		};
968962 
969963 		bt_reset_gpio: bt-reset-gpio {
970
-			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
971
-		};
972
-
973
-		bt_wake_gpio: bt-wake-gpio {
974
-			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
975
-		};
976
-
977
-		bt_irq_gpio: bt-irq-gpio {
978
-			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
964
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
979965 		};
980966 	};
981
-
967
+/*
982968 	wireless-wlan {
983969 		wifi_host_wake_irq: wifi-host-wake-irq {
984
-			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
970
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
985971 		};
986972 	};
987
-	
973
+*/	
988974 	
989975 	ndj_io_init{
990976 		ndj_io_gpio: ndj_io_gpio_col{
991977 				rockchip,pins =
992
-					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
993
-					<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
994
-					<4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
995
-					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
996
-					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
997
-					<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
998
-					<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
999
-					<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //vcc_5v
1000
-					<4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B5_d_3V3
1001
-					<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B6_d_3V3
1002
-					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B0_u_3V3
1003
-					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B2_d_3V3
1004
-					<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B3_u_3V3
1005
-					<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B4_u_3V3
1006
-					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_A7_u_3V3
1007
-					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;  //GPIO3_A0_u_3V3
1008
-
978
+				
979
+					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;  //SPI4_CS0_M2_1V8  35		 		
1009980 		};
1010981 	};
1011982 };
1012983 &pwm3 {
1013
-	pinctrl-0 = <&pwm3m1_pins>;
1014984 	status = "okay";
985
+	pinctrl-0 = <&pwm3m1_pins>;
1015986 };
1016987 
1017988 &route_dsi0 {
1018
-	status = "okay";
989
+	status = "disabled";
1019990 	connect = <&vp3_out_dsi0>;
1020991 };
1021992 
....@@ -1025,8 +996,13 @@
1025996 };
1026997 
1027998 &pwm10 {
1028
-	status = "okay";
999
+	status = "disabled";
10291000 	pinctrl-0 = <&pwm10m2_pins>;
1001
+};
1002
+
1003
+&pwm11 {
1004
+	status = "disabled";
1005
+	pinctrl-0 = <&pwm11m3_pins>;
10301006 };
10311007 
10321008 &route_hdmi0 {
....@@ -1039,6 +1015,10 @@
10391015 
10401016 &sata0 {
10411017 	status = "disabled";
1018
+};
1019
+
1020
+&sata2 {
1021
+	status = "okay";
10421022 };
10431023 
10441024 &sdio {
....@@ -1055,7 +1035,7 @@
10551035 	pinctrl-names = "default";
10561036 	pinctrl-0 = <&sdiom0_pins>;
10571037 	sd-uhs-sdr104;
1058
-	status = "okay";
1038
+	status = "disabled";
10591039 };
10601040 
10611041 &sdmmc {
....@@ -1115,21 +1095,21 @@
11151095 #endif
11161096 
11171097 &uart1 {
1118
-	status = "okay";
1098
+	status = "disabled";
11191099 //	dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
11201100 	pinctrl-names = "default";
11211101 	pinctrl-0 = <&uart1m0_xfer>;
11221102 };
11231103 
11241104 &uart3 {
1125
-	status = "okay";
1105
+	status = "disabled";
11261106 	pinctrl-names = "default";
11271107 	pinctrl-0 = <&uart3m1_xfer>;
11281108 };
11291109 
11301110 
11311111 &uart4 {
1132
-	status = "okay";
1112
+	status = "disabled";
11331113 	pinctrl-names = "default";
11341114 	pinctrl-0 = <&uart4m0_xfer>;
11351115 };
....@@ -1147,20 +1127,34 @@
11471127 };
11481128 
11491129 &uart7 {
1150
-	status = "okay";
1130
+	status = "disabled";
11511131 	pinctrl-names = "default";
11521132 	pinctrl-0 = <&uart7m1_xfer>;
11531133 };
11541134 
11551135 &uart8 {
1156
-	status = "okay";
1136
+	status = "disabled";
11571137 	pinctrl-names = "default";
11581138 	pinctrl-0 = <&uart8m1_xfer>;
11591139 };
11601140 
11611141 
11621142 &uart9 {
1163
-	status = "okay";
1143
+	status = "disabled";
11641144 	pinctrl-names = "default";
11651145 	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;	
11661146 };
1147
+
1148
+
1149
+&can0 {
1150
+	status = "okay";
1151
+	pinctrl-names = "default";
1152
+	pinctrl-0 = <&can0m0_pins>;
1153
+};
1154
+
1155
+
1156
+&can1 {
1157
+	status = "okay";
1158
+	pinctrl-names = "default";
1159
+	pinctrl-0 = <&can1m1_pins>;
1160
+};