forked from ~ljy/RK3588_XEN

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2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404 
 kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -27,7 +27,7 @@
2727 	};
2828 
2929 	es8316_sound: es8316-sound {
30
-		status = "okay";
30
+		status = "disabled";
3131 		compatible = "rockchip,multicodecs-card";
3232 		rockchip,card-name = "rockchip-es8316";
3333 		rockchip,format = "i2s";
....@@ -38,10 +38,10 @@
3838 		io-channels = <&saradc 3>;
3939 		io-channel-names = "adc-detect";
4040 		keyup-threshold-microvolt = <1800000>;
41
-		pinctrl-0 = <&hp_det>;
41
+		pinctrl-0 = <&spk_con>;
4242 		pinctrl-names = "default";
43
-		hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
44
-		spk-con-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
43
+		//hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
44
+		//spk-con-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
4545 		play-pause-key {
4646 			label = "playpause";
4747 			linux,code = <164>;
....@@ -128,13 +128,14 @@
128128 		 * - PDN (power down when low)
129129 		 */
130130 		post-power-on-delay-ms = <200>;
131
-		reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;  //WIFI_REG_ON_H
131
+		reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;  //BT_DISABLE_GPIO1_C6_d_1V8
132132 	};
133133 
134134 	rk_headset: rk-headset {
135
-		status = "disabled";
135
+		status = "okay";
136136 		compatible = "rockchip_headset";
137
-		headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
137
+		headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138
+		spk_ctl_gpio  = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
138139 		pinctrl-names = "default";
139140 		pinctrl-0 = <&hp_det>;
140141 		io-channels = <&saradc 3>;
....@@ -158,7 +159,7 @@
158159 		regulator-boot-on;
159160 		enable-active-high;
160161 		//gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
161
-		gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
162
+		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
162163 		vin-supply = <&vcc_1v8_s0>;
163164 	};
164165 
....@@ -216,9 +217,9 @@
216217 */
217218 	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
218219 		compatible = "regulator-fixed";
219
-		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
220
-		pinctrl-names = "default";
221
-		pinctrl-0 = <&sd_s0_pwr>;
220
+		//gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
221
+		//pinctrl-names = "default";
222
+		//pinctrl-0 = <&sd_s0_pwr>;
222223 		regulator-name = "vcc_3v3_sd_s0";
223224 		enable-active-high;
224225 	};
....@@ -229,80 +230,38 @@
229230 		clock-names = "ext_clock";
230231 		uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
231232 		pinctrl-names = "default", "rts_gpio";
232
-		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
233
+		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
233234 		pinctrl-1 = <&uart9_gpios>;
234
-		BT,reset_gpio    = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H
235
-		BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
236
-		BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
237
-		status = "okay";
235
+		BT,reset_gpio    = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236
+		//BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237
+		//BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
+		status = "disabled";
238239 	};
239240 
240241 	wireless_wlan: wireless-wlan {
241242 		compatible = "wlan-platdata";
242243 		wifi_chip_type = "ap6398s";
243
-		pinctrl-names = "default";
244
-		pinctrl-0 = <&wifi_host_wake_irq>;
245
-		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //WIFI_WAKE_HOST_H
244
+	//	pinctrl-names = "default";
245
+	//	pinctrl-0 = <&wifi_host_wake_irq>;
246
+	//	WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
246247 	//	WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
247
-		status = "okay";
248
+		status = "disabled";
248249 	};
249250 	
250251 	ndj_io_init {
251252            	compatible = "nk_io_control";
252253 			pinctrl-names = "default";
253254           	pinctrl-0 = <&ndj_io_gpio>;
254
-						
255
-//			vcc_5v {
256
-//				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
257
-//				gpio_function = <0>;
258
-//			};
259
-			
260
-			vcc_12v {
261
-				gpio_num = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
262
-				gpio_function = <0>;
263
-			};
264
-			
265
-			vcc_3v {
266
-				gpio_num = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
267
-				gpio_function = <0>;
268
-			};
255
+									
256
+
269257 			
270258            	hub_5V_reset {
271
-				gpio_num = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
259
+				gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 
272260 				gpio_function = <3>;
273
-			};
261
+			};//HUB_RESET_GPIO4_B6_d_3V3
274262 			
275
-			4g_power {
276
-				gpio_num = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
277
-				gpio_function = <0>;
278
-			};
279263 			
280
-           	wake_4g {
281
-				gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
282
-				gpio_function = <0>;
283
-			};
284264 			
285
-			air_mode_4g {
286
-				gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
287
-				gpio_function = <0>;
288
-			};			
289
-			
290
-			reset_4g {
291
-				gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
292
-				gpio_function = <3>;
293
-			};	
294
-/*
295
-			spk_ctl {
296
-				gpio_num = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
297
-				gpio_function = <0>;
298
-			};
299
-			
300
-			hp_det
301
-			 {
302
-				gpio_num = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
303
-				gpio_function = <1>;
304
-			};
305
-*/
306265 		};
307266 		
308267 		
....@@ -310,12 +269,11 @@
310269                compatible = "simple-panel";
311270                backlight = <&backlight>;
312271                power-supply = <&vcc3v3_lcd_n>;
313
-			   vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
314
-			   vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;  //MIPIDIS_PWR_EN_1V8
315
-               enable-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN
316
-               reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
317
-               edp-bl-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;  //LCD_BLK-PWR_EN
318
-               edp-bl-en = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_D4_d_3V3
272
+			   vcc-5v-gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;	//VCC5_IO_EN_GPIO4_B5_d_3V3		   
273
+               enable-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN_GPIO3_C6_u_3V3
274
+               reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
275
+               edp-bl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;  //LCD_BKL_PWM3_3V3
276
+               edp-bl-en = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_A6_d_3V3
319277                bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
320278                bpc = <8>;
321279                prepare-delay-ms = <200>;
....@@ -382,13 +340,26 @@
382340 };
383341 
384342 &backlight {
385
-	pwms = <&pwm10 0 25000 0>;
343
+	pwms = <&pwm3 0 25000 0>;
386344 	status = "okay";
345
+};
346
+
347
+&backlight1 {
348
+	pwms = <&pwm11 0 25000 0>;
349
+	status = "disabled";
387350 };
388351 
389352 &combphy0_ps {
390353 	status = "okay";
391354 };
355
+
356
+/*
357
+&usbdrd_dwc3_0 {
358
+       dr_mode = "otg";
359
+       extcon = <&u2phy0>;
360
+       status = "okay";
361
+};
362
+*/
392363 
393364 &combphy1_ps {
394365 	status = "okay";
....@@ -423,6 +394,10 @@
423394  * mipi_dcphy0 needs to be enabled
424395  * when dsi0 is enabled
425396  */
397
+&mipi_dcphy0 {
398
+	status = "disabled";
399
+}; 
400
+ 
426401 &dsi0 {
427402 	status = "disabled";
428403 };
....@@ -433,13 +408,6 @@
433408 
434409 &dsi0_in_vp3 {
435410 	status = "disabled";
436
-};
437
-
438
-&dsi0_panel {
439
-	power-supply = <&vcc3v3_lcd_n>;
440
-	reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
441
-	pinctrl-names = "default";
442
-	pinctrl-0 = <&lcd_rst_gpio>;
443411 };
444412 
445413 /*
....@@ -472,6 +440,31 @@
472440 	//pinctrl-0 = <&lcd_rst_gpio>;
473441 };
474442 
443
+&gmac0 {
444
+	/* Use rgmii-rxid mode to disable rx delay inside Soc */
445
+	phy-mode = "rgmii-rxid";
446
+	clock_in_out = "output";
447
+
448
+	snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
449
+	snps,reset-active-low;
450
+	/* Reset time is 20ms, 100ms for rtl8211f */
451
+	snps,reset-delays-us = <0 20000 100000>;
452
+
453
+	pinctrl-names = "default";
454
+	pinctrl-0 = <&gmac0_miim
455
+                     &gmac0_tx_bus2
456
+                     &gmac0_rx_bus2
457
+                     &gmac0_rgmii_clk
458
+                     &gmac0_rgmii_bus
459
+                     &eth0_pins
460
+		     &gmac0_clkinout>;
461
+	tx_delay = <0x44>;
462
+	/* rx_delay = <0x4f>; */
463
+
464
+	phy-handle = <&rgmii_phy0>;
465
+	status = "okay";
466
+};
467
+
475468 &gmac1 {
476469 	/* Use rgmii-rxid mode to disable rx delay inside Soc */
477470 	phy-mode = "rgmii-rxid";
....@@ -492,8 +485,8 @@
492485 	tx_delay = <0x43>;
493486 	/* rx_delay = <0x3f>; */
494487 
495
-	phy-handle = <&rgmii_phy>;
496
-	status = "disabled";
488
+	phy-handle = <&rgmii_phy1>;
489
+	status = "okay";
497490 };
498491 
499492 &hdmi0 {
....@@ -529,7 +522,7 @@
529522 	#sound-dai-cells = <1>;
530523 	/* Effective level used to trigger HPD: 0-low, 1-high */
531524 	hpd-trigger-level = <1>;
532
-	hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
525
+	hdmirx-det-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
533526 	pinctrl-names = "default";
534527 	pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
535528 };
....@@ -700,6 +693,12 @@
700693                 compatible = "atmel,24c256";
701694                 reg = <0x50>;
702695     };
696
+		
697
+	eeprom@53 {
698
+                //compatible = "atmel,24c02";
699
+                compatible = "atmel,24c256";
700
+                reg = <0x53>;
701
+    };
703702 #if 0
704703 	usbc0: fusb302@22 {
705704                 compatible = "fcs,fusb302";
....@@ -818,15 +817,19 @@
818817 };
819818 
820819 &mdio1 {
821
-	rgmii_phy: phy@1 {
820
+	rgmii_phy1: phy@1 {
822821 		compatible = "ethernet-phy-ieee802.3-c22";
823822 		reg = <0x1>;
824823 	};
825824 };
826825 
827
-&mipi_dcphy0 {
828
-	status = "okay";
826
+&mdio0 {
827
+	rgmii_phy0: phy@1 {
828
+		compatible = "ethernet-phy-ieee802.3-c22";
829
+		reg = <0x1>;
830
+	};
829831 };
832
+
830833 
831834 &mipi_dcphy1 {
832835 	status = "disabled";
....@@ -834,21 +837,21 @@
834837 
835838 &pcie2x1l2 {
836839 	phys = <&combphy0_ps PHY_TYPE_PCIE>;
837
-	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
840
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
838841 	vpcie3v3-supply = <&vcc3v3_pcie30>;
839842 	status = "okay";
840843 };//MINIPCIE
841844 
842845 &pcie2x1l1 {
843846 	phys = <&combphy2_psu PHY_TYPE_PCIE>;
844
-	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
847
+	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
845848 	vpcie3v3-supply = <&vcc3v3_pcie30>;
846849 	status = "okay";
847850 };//M.2 WIFI6
848851 
849852 &pcie2x1l0 {
850853 	phys = <&combphy1_ps PHY_TYPE_PCIE>;
851
-	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
854
+	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;  //PCIEx1_0_PERSTn_M1_L
852855 	vpcie3v3-supply = <&vcc3v3_pcie30>;
853856 	status = "okay";
854857 };//RTL8111H
....@@ -893,13 +896,17 @@
893896 
894897 	hdmi {
895898 		hdmirx_det: hdmirx-det {
896
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
899
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
897900 		};
898901 	};
899902 
900903 	headphone {
901904 		hp_det: hp-det {
902
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
905
+			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
906
+		};
907
+		
908
+		spk_con: spk-con {
909
+			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
903910 		};
904911 	};
905912 
....@@ -911,7 +918,7 @@
911918 
912919 	lcd {
913920 		lcd_rst_gpio: lcd-rst-gpio {
914
-			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
921
+			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
915922 		};
916923 	};
917924 
....@@ -923,16 +930,16 @@
923930 
924931 	sdio-pwrseq {
925932 		wifi_enable_h: wifi-enable-h {
926
-			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
933
+			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
927934 		};
928935 	};
929
-
936
+/*
930937 	sdmmc {
931938 		sd_s0_pwr: sd-s0-pwr {
932939 			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
933940 		};
934941 	};
935
-
942
+*/
936943 	touch {
937944 		touch_gpio: touch-gpio {
938945 			rockchip,pins =
....@@ -954,55 +961,32 @@
954961 		};
955962 
956963 		bt_reset_gpio: bt-reset-gpio {
957
-			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
958
-		};
959
-
960
-		bt_wake_gpio: bt-wake-gpio {
961
-			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
962
-		};
963
-
964
-		bt_irq_gpio: bt-irq-gpio {
965
-			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
964
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
966965 		};
967966 	};
968
-
967
+/*
969968 	wireless-wlan {
970969 		wifi_host_wake_irq: wifi-host-wake-irq {
971
-			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
970
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
972971 		};
973972 	};
974
-	
973
+*/	
975974 	
976975 	ndj_io_init{
977976 		ndj_io_gpio: ndj_io_gpio_col{
978977 				rockchip,pins =
979
-					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
980
-					<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
981
-					<4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
982
-					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
983
-					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
984
-					<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
985
-					<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
986
-					<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //vcc_5v
987
-					<4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B5_d_3V3
988
-					<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B6_d_3V3
989
-					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B0_u_3V3
990
-					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B2_d_3V3
991
-					<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B3_u_3V3
992
-					<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B4_u_3V3
993
-					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_A7_u_3V3
994
-					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;  //GPIO3_A0_u_3V3
995
-
978
+				
979
+					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;  //SPI4_CS0_M2_1V8  35		 		
996980 		};
997981 	};
998982 };
999983 &pwm3 {
1000
-	pinctrl-0 = <&pwm3m1_pins>;
1001984 	status = "okay";
985
+	pinctrl-0 = <&pwm3m1_pins>;
1002986 };
1003987 
1004988 &route_dsi0 {
1005
-	status = "okay";
989
+	status = "disabled";
1006990 	connect = <&vp3_out_dsi0>;
1007991 };
1008992 
....@@ -1012,8 +996,13 @@
1012996 };
1013997 
1014998 &pwm10 {
1015
-	status = "okay";
999
+	status = "disabled";
10161000 	pinctrl-0 = <&pwm10m2_pins>;
1001
+};
1002
+
1003
+&pwm11 {
1004
+	status = "disabled";
1005
+	pinctrl-0 = <&pwm11m3_pins>;
10171006 };
10181007 
10191008 &route_hdmi0 {
....@@ -1026,6 +1015,10 @@
10261015 
10271016 &sata0 {
10281017 	status = "disabled";
1018
+};
1019
+
1020
+&sata2 {
1021
+	status = "okay";
10291022 };
10301023 
10311024 &sdio {
....@@ -1042,7 +1035,7 @@
10421035 	pinctrl-names = "default";
10431036 	pinctrl-0 = <&sdiom0_pins>;
10441037 	sd-uhs-sdr104;
1045
-	status = "okay";
1038
+	status = "disabled";
10461039 };
10471040 
10481041 &sdmmc {
....@@ -1050,14 +1043,9 @@
10501043 	vmmc-supply = <&vcc_3v3_sd_s0>;
10511044 };
10521045 
1053
-&uart9 {
1054
-	status = "okay";
1055
-	pinctrl-names = "default";
1056
-	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
1057
-};
1058
-
10591046 &u2phy0_otg {
10601047 	status = "okay";
1048
+	phy-supply = <&vcc5v0_host>;
10611049 };
10621050 
10631051 &u2phy1_otg {
....@@ -1071,7 +1059,7 @@
10711059 &u2phy3_host {
10721060 	phy-supply = <&vcc5v0_host>;
10731061 };
1074
-
1062
+#if 0
10751063 &usbdp_phy0 {
10761064 	rockchip,dp-lane-mux = <2 3>;
10771065 	status = "okay";
....@@ -1099,34 +1087,29 @@
10991087 	status = "okay";
11001088 };
11011089 
1102
-&usbdrd_dwc3_0 {
1103
-	dr_mode = "otg";
1104
-	extcon = <&u2phy0>;
1105
-	status = "okay";
1106
-};
1107
-
11081090 &usbdrd_dwc3_1 {
11091091 	dr_mode = "host";
11101092 	maximum-speed = "high-speed";
11111093 	status = "okay";
11121094 };
1095
+#endif
11131096 
11141097 &uart1 {
1115
-	status = "okay";
1098
+	status = "disabled";
11161099 //	dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
11171100 	pinctrl-names = "default";
11181101 	pinctrl-0 = <&uart1m0_xfer>;
11191102 };
11201103 
11211104 &uart3 {
1122
-	status = "okay";
1105
+	status = "disabled";
11231106 	pinctrl-names = "default";
11241107 	pinctrl-0 = <&uart3m1_xfer>;
11251108 };
11261109 
11271110 
11281111 &uart4 {
1129
-	status = "okay";
1112
+	status = "disabled";
11301113 	pinctrl-names = "default";
11311114 	pinctrl-0 = <&uart4m0_xfer>;
11321115 };
....@@ -1144,20 +1127,34 @@
11441127 };
11451128 
11461129 &uart7 {
1147
-	status = "okay";
1130
+	status = "disabled";
11481131 	pinctrl-names = "default";
11491132 	pinctrl-0 = <&uart7m1_xfer>;
11501133 };
11511134 
11521135 &uart8 {
1153
-	status = "okay";
1136
+	status = "disabled";
11541137 	pinctrl-names = "default";
11551138 	pinctrl-0 = <&uart8m1_xfer>;
11561139 };
11571140 
11581141 
11591142 &uart9 {
1160
-	status = "okay";
1143
+	status = "disabled";
11611144 	pinctrl-names = "default";
11621145 	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;	
11631146 };
1147
+
1148
+
1149
+&can0 {
1150
+	status = "okay";
1151
+	pinctrl-names = "default";
1152
+	pinctrl-0 = <&can0m0_pins>;
1153
+};
1154
+
1155
+
1156
+&can1 {
1157
+	status = "okay";
1158
+	pinctrl-names = "default";
1159
+	pinctrl-0 = <&can1m1_pins>;
1160
+};