hc
2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404
kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -27,7 +27,7 @@
2727 };
2828
2929 es8316_sound: es8316-sound {
30
- status = "okay";
30
+ status = "disabled";
3131 compatible = "rockchip,multicodecs-card";
3232 rockchip,card-name = "rockchip-es8316";
3333 rockchip,format = "i2s";
....@@ -235,7 +235,7 @@
235235 BT,reset_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236236 //BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237237 //BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
- status = "okay";
238
+ status = "disabled";
239239 };
240240
241241 wireless_wlan: wireless-wlan {
....@@ -245,7 +245,7 @@
245245 // pinctrl-0 = <&wifi_host_wake_irq>;
246246 // WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
247247 // WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
248
- status = "okay";
248
+ status = "disabled";
249249 };
250250
251251 ndj_io_init {
....@@ -253,40 +253,15 @@
253253 pinctrl-names = "default";
254254 pinctrl-0 = <&ndj_io_gpio>;
255255
256
- vcc_12v {
257
- gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
258
- gpio_function = <0>;
259
- };//VCC12_IO_EN_GPIO0_D3_u_3V3
260
-
261
- vcc_3v {
262
- gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
263
- gpio_function = <0>;
264
- };//VCC3_IO_EN_GPIO4_A1_d_3V3
256
+
265257
266258 hub_5V_reset {
267259 gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
268260 gpio_function = <3>;
269261 };//HUB_RESET_GPIO4_B6_d_3V3
270262
271
- 4g_power {
272
- gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
273
- gpio_function = <0>;
274
- };//4G_PWREN_GPIO3_C7_u_3V3
275263
276
- wake_wifi_bt {
277
- gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
278
- gpio_function = <0>;
279
- };//GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
280264
281
- air_mode_4g {
282
- gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
283
- gpio_function = <0>;
284
- }; //GPIO2_B4_u_1V8_4G_AIR_MODE_IN
285
-
286
- reset_4g {
287
- gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
288
- gpio_function = <3>;
289
- }; //GPIO2_C3_d_1V8_4G_RESET_N_IN
290265 };
291266
292267
....@@ -365,13 +340,13 @@
365340 };
366341
367342 &backlight {
368
- pwms = <&pwm10 0 25000 0>;
343
+ pwms = <&pwm3 0 25000 0>;
369344 status = "okay";
370345 };
371346
372347 &backlight1 {
373348 pwms = <&pwm11 0 25000 0>;
374
- status = "okay";
349
+ status = "disabled";
375350 };
376351
377352 &combphy0_ps {
....@@ -432,7 +407,7 @@
432407 };
433408
434409 &dsi0_in_vp3 {
435
- status = "okay";
410
+ status = "disabled";
436411 };
437412
438413 /*
....@@ -465,6 +440,31 @@
465440 //pinctrl-0 = <&lcd_rst_gpio>;
466441 };
467442
443
+&gmac0 {
444
+ /* Use rgmii-rxid mode to disable rx delay inside Soc */
445
+ phy-mode = "rgmii-rxid";
446
+ clock_in_out = "output";
447
+
448
+ snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
449
+ snps,reset-active-low;
450
+ /* Reset time is 20ms, 100ms for rtl8211f */
451
+ snps,reset-delays-us = <0 20000 100000>;
452
+
453
+ pinctrl-names = "default";
454
+ pinctrl-0 = <&gmac0_miim
455
+ &gmac0_tx_bus2
456
+ &gmac0_rx_bus2
457
+ &gmac0_rgmii_clk
458
+ &gmac0_rgmii_bus
459
+ &eth0_pins
460
+ &gmac0_clkinout>;
461
+ tx_delay = <0x44>;
462
+ /* rx_delay = <0x4f>; */
463
+
464
+ phy-handle = <&rgmii_phy0>;
465
+ status = "okay";
466
+};
467
+
468468 &gmac1 {
469469 /* Use rgmii-rxid mode to disable rx delay inside Soc */
470470 phy-mode = "rgmii-rxid";
....@@ -485,7 +485,7 @@
485485 tx_delay = <0x43>;
486486 /* rx_delay = <0x3f>; */
487487
488
- phy-handle = <&rgmii_phy>;
488
+ phy-handle = <&rgmii_phy1>;
489489 status = "okay";
490490 };
491491
....@@ -517,7 +517,7 @@
517517
518518 /* Should work with at least 128MB cma reserved above. */
519519 &hdmirx_ctrler {
520
- status = "okay";
520
+ status = "disabled";
521521
522522 #sound-dai-cells = <1>;
523523 /* Effective level used to trigger HPD: 0-low, 1-high */
....@@ -817,12 +817,18 @@
817817 };
818818
819819 &mdio1 {
820
- rgmii_phy: phy@1 {
820
+ rgmii_phy1: phy@1 {
821821 compatible = "ethernet-phy-ieee802.3-c22";
822822 reg = <0x1>;
823823 };
824824 };
825825
826
+&mdio0 {
827
+ rgmii_phy0: phy@1 {
828
+ compatible = "ethernet-phy-ieee802.3-c22";
829
+ reg = <0x1>;
830
+ };
831
+};
826832
827833
828834 &mipi_dcphy1 {
....@@ -831,7 +837,7 @@
831837
832838 &pcie2x1l2 {
833839 phys = <&combphy0_ps PHY_TYPE_PCIE>;
834
- reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
840
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
835841 vpcie3v3-supply = <&vcc3v3_pcie30>;
836842 status = "okay";
837843 };//MINIPCIE
....@@ -969,27 +975,14 @@
969975 ndj_io_init{
970976 ndj_io_gpio: ndj_io_gpio_col{
971977 rockchip,pins =
972
- <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
973
- <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
974
- <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
975
- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
976
- <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
977
- <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
978
- <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, //vcc_5v
979
- <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_MISO_M2_1V8 41
980
- <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MISO_M2_1V8 32
981
- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_MOSI_M2_3V3 42
982
- <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MOSI_M2_1V8 33
983
- <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CLK_M2_1V8 43
984
- <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_CLK_M2_1V8 34
985
- <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CS0_M2_1V8 44
978
+
986979 <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; //SPI4_CS0_M2_1V8 35
987980 };
988981 };
989982 };
990983 &pwm3 {
991
- pinctrl-0 = <&pwm3m1_pins>;
992984 status = "okay";
985
+ pinctrl-0 = <&pwm3m1_pins>;
993986 };
994987
995988 &route_dsi0 {
....@@ -1003,12 +996,12 @@
1003996 };
1004997
1005998 &pwm10 {
1006
- status = "okay";
999
+ status = "disabled";
10071000 pinctrl-0 = <&pwm10m2_pins>;
10081001 };
10091002
10101003 &pwm11 {
1011
- status = "okay";
1004
+ status = "disabled";
10121005 pinctrl-0 = <&pwm11m3_pins>;
10131006 };
10141007
....@@ -1042,7 +1035,7 @@
10421035 pinctrl-names = "default";
10431036 pinctrl-0 = <&sdiom0_pins>;
10441037 sd-uhs-sdr104;
1045
- status = "okay";
1038
+ status = "disabled";
10461039 };
10471040
10481041 &sdmmc {
....@@ -1102,7 +1095,7 @@
11021095 #endif
11031096
11041097 &uart1 {
1105
- status = "okay";
1098
+ status = "disabled";
11061099 // dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
11071100 pinctrl-names = "default";
11081101 pinctrl-0 = <&uart1m0_xfer>;
....@@ -1116,7 +1109,7 @@
11161109
11171110
11181111 &uart4 {
1119
- status = "okay";
1112
+ status = "disabled";
11201113 pinctrl-names = "default";
11211114 pinctrl-0 = <&uart4m0_xfer>;
11221115 };
....@@ -1134,7 +1127,7 @@
11341127 };
11351128
11361129 &uart7 {
1137
- status = "okay";
1130
+ status = "disabled";
11381131 pinctrl-names = "default";
11391132 pinctrl-0 = <&uart7m1_xfer>;
11401133 };
....@@ -1147,7 +1140,7 @@
11471140
11481141
11491142 &uart9 {
1150
- status = "okay";
1143
+ status = "disabled";
11511144 pinctrl-names = "default";
11521145 pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
11531146 };