hc
2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404
kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -27,7 +27,7 @@
2727 };
2828
2929 es8316_sound: es8316-sound {
30
- status = "okay";
30
+ status = "disabled";
3131 compatible = "rockchip,multicodecs-card";
3232 rockchip,card-name = "rockchip-es8316";
3333 rockchip,format = "i2s";
....@@ -128,13 +128,13 @@
128128 * - PDN (power down when low)
129129 */
130130 post-power-on-delay-ms = <200>;
131
- reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; //WIFI_REG_ON_H
131
+ reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; //BT_DISABLE_GPIO1_C6_d_1V8
132132 };
133133
134134 rk_headset: rk-headset {
135135 status = "okay";
136136 compatible = "rockchip_headset";
137
- headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
137
+ headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138138 spk_ctl_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
139139 pinctrl-names = "default";
140140 pinctrl-0 = <&hp_det>;
....@@ -162,17 +162,6 @@
162162 gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
163163 vin-supply = <&vcc_1v8_s0>;
164164 };
165
-
166
- vcc3v3_lcd1_n: vcc3v3-lcd1-n {
167
- compatible = "regulator-fixed";
168
- regulator-name = "vcc3v3_lcd1_n";
169
- regulator-boot-on;
170
- regulator-min-microvolt = <3300000>;
171
- regulator-max-microvolt = <3300000>;
172
- enable-active-high;
173
- gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
174
- };
175
-
176165
177166 vcc3v3_pcie30: vcc3v3-pcie30 {
178167 compatible = "regulator-fixed";
....@@ -228,9 +217,9 @@
228217 */
229218 vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
230219 compatible = "regulator-fixed";
231
- gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
232
- pinctrl-names = "default";
233
- pinctrl-0 = <&sd_s0_pwr>;
220
+ //gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
221
+ //pinctrl-names = "default";
222
+ //pinctrl-0 = <&sd_s0_pwr>;
234223 regulator-name = "vcc_3v3_sd_s0";
235224 enable-active-high;
236225 };
....@@ -241,68 +230,38 @@
241230 clock-names = "ext_clock";
242231 uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
243232 pinctrl-names = "default", "rts_gpio";
244
- pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
233
+ pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
245234 pinctrl-1 = <&uart9_gpios>;
246
- BT,reset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H
247
- BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
248
- BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
249
- status = "okay";
235
+ BT,reset_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236
+ //BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237
+ //BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
+ status = "disabled";
250239 };
251240
252241 wireless_wlan: wireless-wlan {
253242 compatible = "wlan-platdata";
254243 wifi_chip_type = "ap6398s";
255
- pinctrl-names = "default";
256
- pinctrl-0 = <&wifi_host_wake_irq>;
257
- WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
244
+ // pinctrl-names = "default";
245
+ // pinctrl-0 = <&wifi_host_wake_irq>;
246
+ // WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
258247 // WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
259
- status = "okay";
248
+ status = "disabled";
260249 };
261250
262251 ndj_io_init {
263252 compatible = "nk_io_control";
264253 pinctrl-names = "default";
265254 pinctrl-0 = <&ndj_io_gpio>;
266
-
267
- usb_power {
268
- gpio_num = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
269
- gpio_function = <0>;
270
- };//USB_HOST_PWREN_H
271
-
272
- vcc_12v {
273
- gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
274
- gpio_function = <0>;
275
- };//VCC12_IO_EN_GPIO0_D3_u_3V3
276
-
277
- vcc_3v {
278
- gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
279
- gpio_function = <0>;
280
- };//VCC3_IO_EN_GPIO4_A1_d_3V3
255
+
256
+
281257
282258 hub_5V_reset {
283259 gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
284260 gpio_function = <3>;
285261 };//HUB_RESET_GPIO4_B6_d_3V3
286262
287
- 4g_power {
288
- gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
289
- gpio_function = <0>;
290
- };//4G_PWREN_GPIO3_C7_u_3V3
291263
292
-// wake_4g {
293
-// gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
294
-// gpio_function = <0>;
295
-// };//GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
296264
297
- air_mode_4g {
298
- gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
299
- gpio_function = <0>;
300
- }; //GPIO2_B4_u_1V8_4G_AIR_MODE_IN
301
-
302
- reset_4g {
303
- gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
304
- gpio_function = <3>;
305
- }; //GPIO2_C3_d_1V8_4G_RESET_N_IN
306265 };
307266
308267
....@@ -381,13 +340,13 @@
381340 };
382341
383342 &backlight {
384
- pwms = <&pwm10 0 25000 0>;
343
+ pwms = <&pwm3 0 25000 0>;
385344 status = "okay";
386345 };
387346
388347 &backlight1 {
389348 pwms = <&pwm11 0 25000 0>;
390
- status = "okay";
349
+ status = "disabled";
391350 };
392351
393352 &combphy0_ps {
....@@ -436,11 +395,11 @@
436395 * when dsi0 is enabled
437396 */
438397 &mipi_dcphy0 {
439
- status = "okay";
398
+ status = "disabled";
440399 };
441400
442401 &dsi0 {
443
- status = "okay";
402
+ status = "disabled";
444403 };
445404
446405 &dsi0_in_vp2 {
....@@ -448,16 +407,7 @@
448407 };
449408
450409 &dsi0_in_vp3 {
451
- status = "okay";
452
-};
453
-
454
-&dsi0_panel {
455
- power-supply = <&vcc3v3_lcd1_n>; //LCD_PWREN_H
456
- vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
457
- reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; //MIPIDIS_RST_GPIO1_A0_d_1V8
458
- vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //MIPIDIS_PWR_EN_1V8
459
- pinctrl-names = "default";
460
- pinctrl-0 = <&lcd_rst_gpio>;
410
+ status = "disabled";
461411 };
462412
463413 /*
....@@ -490,6 +440,31 @@
490440 //pinctrl-0 = <&lcd_rst_gpio>;
491441 };
492442
443
+&gmac0 {
444
+ /* Use rgmii-rxid mode to disable rx delay inside Soc */
445
+ phy-mode = "rgmii-rxid";
446
+ clock_in_out = "output";
447
+
448
+ snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
449
+ snps,reset-active-low;
450
+ /* Reset time is 20ms, 100ms for rtl8211f */
451
+ snps,reset-delays-us = <0 20000 100000>;
452
+
453
+ pinctrl-names = "default";
454
+ pinctrl-0 = <&gmac0_miim
455
+ &gmac0_tx_bus2
456
+ &gmac0_rx_bus2
457
+ &gmac0_rgmii_clk
458
+ &gmac0_rgmii_bus
459
+ &eth0_pins
460
+ &gmac0_clkinout>;
461
+ tx_delay = <0x44>;
462
+ /* rx_delay = <0x4f>; */
463
+
464
+ phy-handle = <&rgmii_phy0>;
465
+ status = "okay";
466
+};
467
+
493468 &gmac1 {
494469 /* Use rgmii-rxid mode to disable rx delay inside Soc */
495470 phy-mode = "rgmii-rxid";
....@@ -510,7 +485,7 @@
510485 tx_delay = <0x43>;
511486 /* rx_delay = <0x3f>; */
512487
513
- phy-handle = <&rgmii_phy>;
488
+ phy-handle = <&rgmii_phy1>;
514489 status = "okay";
515490 };
516491
....@@ -547,7 +522,7 @@
547522 #sound-dai-cells = <1>;
548523 /* Effective level used to trigger HPD: 0-low, 1-high */
549524 hpd-trigger-level = <1>;
550
- hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
525
+ hdmirx-det-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
551526 pinctrl-names = "default";
552527 pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
553528 };
....@@ -842,12 +817,18 @@
842817 };
843818
844819 &mdio1 {
845
- rgmii_phy: phy@1 {
820
+ rgmii_phy1: phy@1 {
846821 compatible = "ethernet-phy-ieee802.3-c22";
847822 reg = <0x1>;
848823 };
849824 };
850825
826
+&mdio0 {
827
+ rgmii_phy0: phy@1 {
828
+ compatible = "ethernet-phy-ieee802.3-c22";
829
+ reg = <0x1>;
830
+ };
831
+};
851832
852833
853834 &mipi_dcphy1 {
....@@ -856,7 +837,7 @@
856837
857838 &pcie2x1l2 {
858839 phys = <&combphy0_ps PHY_TYPE_PCIE>;
859
- reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
840
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
860841 vpcie3v3-supply = <&vcc3v3_pcie30>;
861842 status = "okay";
862843 };//MINIPCIE
....@@ -915,13 +896,13 @@
915896
916897 hdmi {
917898 hdmirx_det: hdmirx-det {
918
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
899
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
919900 };
920901 };
921902
922903 headphone {
923904 hp_det: hp-det {
924
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
905
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
925906 };
926907
927908 spk_con: spk-con {
....@@ -949,16 +930,16 @@
949930
950931 sdio-pwrseq {
951932 wifi_enable_h: wifi-enable-h {
952
- rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
933
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
953934 };
954935 };
955
-
936
+/*
956937 sdmmc {
957938 sd_s0_pwr: sd-s0-pwr {
958939 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
959940 };
960941 };
961
-
942
+*/
962943 touch {
963944 touch_gpio: touch-gpio {
964945 rockchip,pins =
....@@ -980,55 +961,32 @@
980961 };
981962
982963 bt_reset_gpio: bt-reset-gpio {
983
- rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
984
- };
985
-
986
- bt_wake_gpio: bt-wake-gpio {
987
- rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
988
- };
989
-
990
- bt_irq_gpio: bt-irq-gpio {
991
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
964
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
992965 };
993966 };
994
-
967
+/*
995968 wireless-wlan {
996969 wifi_host_wake_irq: wifi-host-wake-irq {
997
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
970
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
998971 };
999972 };
1000
-
973
+*/
1001974
1002975 ndj_io_init{
1003976 ndj_io_gpio: ndj_io_gpio_col{
1004977 rockchip,pins =
1005
- <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
1006
- <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
1007
- <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
1008
- <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
1009
- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
1010
- <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
1011
- <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
1012
- <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, //vcc_5v
1013
- <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_MISO_M2_1V8
1014
- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_MISO_M2_1V8
1015
- <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CLK_M2_1V8
1016
- <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //SPI0_CS0_M2_1V8
1017
- <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MISO_M2_1V8
1018
- <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, //SPI4_MOSI_M2_1V8
1019
- <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_A7_u_3V3
1020
- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; //GPIO3_A0_u_3V3
1021
-
978
+
979
+ <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; //SPI4_CS0_M2_1V8 35
1022980 };
1023981 };
1024982 };
1025983 &pwm3 {
1026
- pinctrl-0 = <&pwm3m1_pins>;
1027984 status = "okay";
985
+ pinctrl-0 = <&pwm3m1_pins>;
1028986 };
1029987
1030988 &route_dsi0 {
1031
- status = "okay";
989
+ status = "disabled";
1032990 connect = <&vp3_out_dsi0>;
1033991 };
1034992
....@@ -1038,12 +996,12 @@
1038996 };
1039997
1040998 &pwm10 {
1041
- status = "okay";
999
+ status = "disabled";
10421000 pinctrl-0 = <&pwm10m2_pins>;
10431001 };
10441002
10451003 &pwm11 {
1046
- status = "okay";
1004
+ status = "disabled";
10471005 pinctrl-0 = <&pwm11m3_pins>;
10481006 };
10491007
....@@ -1057,6 +1015,10 @@
10571015
10581016 &sata0 {
10591017 status = "disabled";
1018
+};
1019
+
1020
+&sata2 {
1021
+ status = "okay";
10601022 };
10611023
10621024 &sdio {
....@@ -1073,7 +1035,7 @@
10731035 pinctrl-names = "default";
10741036 pinctrl-0 = <&sdiom0_pins>;
10751037 sd-uhs-sdr104;
1076
- status = "okay";
1038
+ status = "disabled";
10771039 };
10781040
10791041 &sdmmc {
....@@ -1133,7 +1095,7 @@
11331095 #endif
11341096
11351097 &uart1 {
1136
- status = "okay";
1098
+ status = "disabled";
11371099 // dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
11381100 pinctrl-names = "default";
11391101 pinctrl-0 = <&uart1m0_xfer>;
....@@ -1147,7 +1109,7 @@
11471109
11481110
11491111 &uart4 {
1150
- status = "okay";
1112
+ status = "disabled";
11511113 pinctrl-names = "default";
11521114 pinctrl-0 = <&uart4m0_xfer>;
11531115 };
....@@ -1165,7 +1127,7 @@
11651127 };
11661128
11671129 &uart7 {
1168
- status = "okay";
1130
+ status = "disabled";
11691131 pinctrl-names = "default";
11701132 pinctrl-0 = <&uart7m1_xfer>;
11711133 };
....@@ -1178,7 +1140,21 @@
11781140
11791141
11801142 &uart9 {
1181
- status = "okay";
1143
+ status = "disabled";
11821144 pinctrl-names = "default";
11831145 pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
11841146 };
1147
+
1148
+
1149
+&can0 {
1150
+ status = "okay";
1151
+ pinctrl-names = "default";
1152
+ pinctrl-0 = <&can0m0_pins>;
1153
+};
1154
+
1155
+
1156
+&can1 {
1157
+ status = "okay";
1158
+ pinctrl-names = "default";
1159
+ pinctrl-0 = <&can1m1_pins>;
1160
+};